Pub Date : 2026-01-26DOI: 10.1109/OJIES.2026.3657269
{"title":"2025 Index IEEE Open Journal of the Industrial Electronics Society Vol. 6","authors":"","doi":"10.1109/OJIES.2026.3657269","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3657269","url":null,"abstract":"","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"1-32"},"PeriodicalIF":4.3,"publicationDate":"2026-01-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11363656","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-16DOI: 10.1109/OJIES.2026.3654869
Christoph Klaassen;Gernot Steindl;René Hofmann
Digital Twins (DTs) play a key role in shaping intelligent ecosystems. They create precise digital representations of components, harmonizing the virtual and physical worlds. Traditional DT design processes do not cover the complete lifecycle, as a result of high evolution complexity, leading to integration challenges. Addressing those barriers and inspired by the software development and operations (DevOps) framework, this article introduces a methodology to offer a more adaptable and holistic DT lifecycle approach. It integrates existing DevOps phases with DT-specific aspects, representing the evolution and operation progress of DT components. The methodology is embodied in a comprehensive and adaptable development, operate, monitor, and analysis (DevOMA) lifecycle model, which is designed to evolve and operate all components of a DT. A feasibility study applied the DevOMA lifecycle model to deploy and operate a DT for research purposes in the industrial energy sector. This DT represents a laboratory-scale distributed energy system, enabling the optimization of its components and various scenarios. This article aims to contribute to the advancement of engineering and operating DTs through handling their complexity while offering a flexible DevOMA lifecycle model, proven in a real-world case study.
{"title":"An Iterative Lifecycle Model for Engineering and Operating Digital Twins","authors":"Christoph Klaassen;Gernot Steindl;René Hofmann","doi":"10.1109/OJIES.2026.3654869","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3654869","url":null,"abstract":"Digital Twins (DTs) play a key role in shaping intelligent ecosystems. They create precise digital representations of components, harmonizing the virtual and physical worlds. Traditional DT design processes do not cover the complete lifecycle, as a result of high evolution complexity, leading to integration challenges. Addressing those barriers and inspired by the software development and operations (DevOps) framework, this article introduces a methodology to offer a more adaptable and holistic DT lifecycle approach. It integrates existing DevOps phases with DT-specific aspects, representing the evolution and operation progress of DT components. The methodology is embodied in a comprehensive and adaptable <italic>development, operate, monitor, and analysis (DevOMA) lifecycle model</i>, which is designed to evolve and operate all components of a DT. A feasibility study applied the <italic>DevOMA lifecycle model</i> to deploy and operate a DT for research purposes in the industrial energy sector. This DT represents a laboratory-scale distributed energy system, enabling the optimization of its components and various scenarios. This article aims to contribute to the advancement of engineering and operating DTs through handling their complexity while offering a flexible <italic>DevOMA lifecycle model</i>, proven in a real-world case study.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"257-278"},"PeriodicalIF":4.3,"publicationDate":"2026-01-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11355861","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-15DOI: 10.1109/OJIES.2026.3654167
Ali Sharida;Naheel Faisal Kamal;Younes Mohammed Tsabet;Sertac Bayhan;Haitham Abu-Rub
This article proposes a single loop model predictive control approach for dc fast electric vehicle chargers. The proposed controller simultaneously regulates the dc-link voltage, grid current, and charging power through a unified cost function, while incorporating an intelligent prediction of dc-link voltage dynamics and power delivery behavior to the battery. The prediction stage aims to forecast the dc-link voltage behavior and generate an optimal grid current reference for the rectifier and phase shift reference for the dual active bridge dc–dc converter. The forecasted dc-link voltage is compared with the measured value in the subsequent control cycle, and the resulting deviation is utilized to adapt and refine the forecasting rules. The proposed controller includes four-control intervals, dc side and electric vehicle side capacitors charging for smooth startup and inrush current elimination, dc-link voltage forming for precharging initialization, and dc-link voltage regulation during the charging process. The main objectives of the proposed controller are to eliminate the need for an outer loop and cascaded voltage controller, mitigate losses and current reference generation errors, and ensure compatibility with various grid voltage levels (e.g., 110 and 240 V) as well as a wide charging voltage range (200–1000 V), without requiring any modification to the controller structure or control gains. The proposed controller is experimentally implemented on an industry-scale 30 kW charging module prototype.
{"title":"Single-Loop Model Predictive Control for Fast Electric Vehicle Chargers","authors":"Ali Sharida;Naheel Faisal Kamal;Younes Mohammed Tsabet;Sertac Bayhan;Haitham Abu-Rub","doi":"10.1109/OJIES.2026.3654167","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3654167","url":null,"abstract":"This article proposes a single loop model predictive control approach for dc fast electric vehicle chargers. The proposed controller simultaneously regulates the dc-link voltage, grid current, and charging power through a unified cost function, while incorporating an intelligent prediction of dc-link voltage dynamics and power delivery behavior to the battery. The prediction stage aims to forecast the dc-link voltage behavior and generate an optimal grid current reference for the rectifier and phase shift reference for the dual active bridge dc–dc converter. The forecasted dc-link voltage is compared with the measured value in the subsequent control cycle, and the resulting deviation is utilized to adapt and refine the forecasting rules. The proposed controller includes four-control intervals, dc side and electric vehicle side capacitors charging for smooth startup and inrush current elimination, dc-link voltage forming for precharging initialization, and dc-link voltage regulation during the charging process. The main objectives of the proposed controller are to eliminate the need for an outer loop and cascaded voltage controller, mitigate losses and current reference generation errors, and ensure compatibility with various grid voltage levels (e.g., 110 and 240 V) as well as a wide charging voltage range (200–1000 V), without requiring any modification to the controller structure or control gains. The proposed controller is experimentally implemented on an industry-scale 30 kW charging module prototype.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"245-256"},"PeriodicalIF":4.3,"publicationDate":"2026-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11352797","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-12DOI: 10.1109/OJIES.2026.3652095
Saher Albatran;Issam A. Smadi;Mohammad M. AlKhreisheh;Laith A. Al-Sarayreh;Mohd S. Ali;Amirul Syafiq
Modern electrical power systems are increasingly relying on interconnection with renewable energy sources (RES), resulting in larger, more complex networks. These modifications introduce new challenges in fault identification, especially given the variability associated with RES. Traditional fault detection techniques struggle to handle these environments, prompting the exploration of intelligent approaches. Furthermore, unbalanced loading conditions complicate protection management, as they introduce additional challenges for accurate, timely fault diagnosis. To overcome these challenges and achieve reliable fault detection, classification, and location with fewer measurements, this study proposes a novel artificial neural network (ANN) framework. To evaluate the performance of the proposed work, the ANN model is trained and validated on the IEEE 13-Bus and 9-Bus systems, with evaluations conducted under various fault types and locations, including both with and without renewable energy integration, as well as unbalanced load scenarios. Moreover, the proposed model relies solely on current-based data, eliminating the need for voltage-based data, thereby significantly simplifying data collection while preserving high accuracy. The performance of the proposed technique is compared with that of an adaptive neuro-fuzzy inference system (ANFIS). The findings show that the proposed ANN can reliably detect, locate, and classify faults in both balanced and unbalanced systems, even in the presence of RES. The method is confirmed to be data-efficient, reliable, and generalizable. Compared to ANFIS and conventional ANN methods, this ANN model offers comparable performance with higher test accuracy while requiring simpler implementation and lower costs.
{"title":"A Novel Artificial Neural Network-Based Method for Fault Diagnosis Considering Unbalanced Loading and Renewable Energy Resources","authors":"Saher Albatran;Issam A. Smadi;Mohammad M. AlKhreisheh;Laith A. Al-Sarayreh;Mohd S. Ali;Amirul Syafiq","doi":"10.1109/OJIES.2026.3652095","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3652095","url":null,"abstract":"Modern electrical power systems are increasingly relying on interconnection with renewable energy sources (RES), resulting in larger, more complex networks. These modifications introduce new challenges in fault identification, especially given the variability associated with RES. Traditional fault detection techniques struggle to handle these environments, prompting the exploration of intelligent approaches. Furthermore, unbalanced loading conditions complicate protection management, as they introduce additional challenges for accurate, timely fault diagnosis. To overcome these challenges and achieve reliable fault detection, classification, and location with fewer measurements, this study proposes a novel artificial neural network (ANN) framework. To evaluate the performance of the proposed work, the ANN model is trained and validated on the IEEE 13-Bus and 9-Bus systems, with evaluations conducted under various fault types and locations, including both with and without renewable energy integration, as well as unbalanced load scenarios. Moreover, the proposed model relies solely on current-based data, eliminating the need for voltage-based data, thereby significantly simplifying data collection while preserving high accuracy. The performance of the proposed technique is compared with that of an adaptive neuro-fuzzy inference system (ANFIS). The findings show that the proposed ANN can reliably detect, locate, and classify faults in both balanced and unbalanced systems, even in the presence of RES. The method is confirmed to be data-efficient, reliable, and generalizable. Compared to ANFIS and conventional ANN methods, this ANN model offers comparable performance with higher test accuracy while requiring simpler implementation and lower costs.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"227-244"},"PeriodicalIF":4.3,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11340665","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-12DOI: 10.1109/OJIES.2026.3652993
Gensheng Li;Yanliang Xu;Changhu Wang;Fenghui Xu
Conventionally, flywheel machines are designed by selecting the maximum speed as the rated speed and determining the rated power under Id = 0 control strategy. Such an approach leads to current overloading during constant power operation at low speed and fails to guarantee a sufficient constant power speed range (CPSR). To overcome these limitations, this article proposes a CPSR-oriented design methodology for surface-mounted permanent magnet synchronous machines considering Id = 0 control. Unlike existing studies that rely on single-speed design or multipoint optimization, the proposed method directly plans the permanent magnet (PM) flux linkage and synchronous inductance based on the operating characteristics of flywheel machines to achieve a specified CPSR. Specifically, a comprehensive analytical model is established to quantitatively reveal the influence of PM flux linkage and inductance on CPSR, from which explicit design constraints are derived. Based on these constraints, the optimal PM flux linkage and inductance are determined by considering the power factor and minimizing the average charge/discharge current over the entire CPSR. Furthermore, an efficient and iterative dimensional design procedure is developed to ensure that the machine geometry accurately realizes the selected electromagnetic parameters. The effectiveness of the proposed design strategy is validated through finite element method analysis and experimental testing of a fabricated prototype.
{"title":"Design Methodology of Constant Power Speed Range for Surface-Mounted Permanent Magnet Machine in Flywheel Energy Storage System","authors":"Gensheng Li;Yanliang Xu;Changhu Wang;Fenghui Xu","doi":"10.1109/OJIES.2026.3652993","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3652993","url":null,"abstract":"Conventionally, flywheel machines are designed by selecting the maximum speed as the rated speed and determining the rated power under <italic>I</i><sub>d</sub> = 0 control strategy. Such an approach leads to current overloading during constant power operation at low speed and fails to guarantee a sufficient constant power speed range (CPSR). To overcome these limitations, this article proposes a CPSR-oriented design methodology for surface-mounted permanent magnet synchronous machines considering <italic>I</i><sub>d</sub> = 0 control. Unlike existing studies that rely on single-speed design or multipoint optimization, the proposed method directly plans the permanent magnet (PM) flux linkage and synchronous inductance based on the operating characteristics of flywheel machines to achieve a specified CPSR. Specifically, a comprehensive analytical model is established to quantitatively reveal the influence of PM flux linkage and inductance on CPSR, from which explicit design constraints are derived. Based on these constraints, the optimal PM flux linkage and inductance are determined by considering the power factor and minimizing the average charge/discharge current over the entire CPSR. Furthermore, an efficient and iterative dimensional design procedure is developed to ensure that the machine geometry accurately realizes the selected electromagnetic parameters. The effectiveness of the proposed design strategy is validated through finite element method analysis and experimental testing of a fabricated prototype.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"173-183"},"PeriodicalIF":4.3,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11345980","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-12DOI: 10.1109/OJIES.2026.3653129
Victor Diaz;Andres Barrado;Pablo Zumel;Antonio Lazaro
The four-switch buck–boost converter is a widely used topology due to its bidirectional capability and wide operating voltage range in applications such as battery chargers, photovoltaic applications, or smart grids. This article proposes an improved modulation strategy that reduces the average inductor current, like other state-of-the-art strategies, while also minimizing the inductor’s current ripple and the maximum current during the buck–boost operating mode. The objective is to minimize core power losses and reduce conduction power losses in the transistors, thereby improving overall efficiency. To demonstrate this, a state-of-the-art reference modulation strategy is first analyzed. Next, modifications are suggested to obtain the improved strategy, and both are analytically compared. Finally, both modulations are implemented and experimentally validated.
{"title":"Optimized Modulation for the Four-Switch Buck–Boost Converter With Reduced Current Ripple","authors":"Victor Diaz;Andres Barrado;Pablo Zumel;Antonio Lazaro","doi":"10.1109/OJIES.2026.3653129","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3653129","url":null,"abstract":"The four-switch buck–boost converter is a widely used topology due to its bidirectional capability and wide operating voltage range in applications such as battery chargers, photovoltaic applications, or smart grids. This article proposes an improved modulation strategy that reduces the average inductor current, like other state-of-the-art strategies, while also minimizing the inductor’s current ripple and the maximum current during the buck–boost operating mode. The objective is to minimize core power losses and reduce conduction power losses in the transistors, thereby improving overall efficiency. To demonstrate this, a state-of-the-art reference modulation strategy is first analyzed. Next, modifications are suggested to obtain the improved strategy, and both are analytically compared. Finally, both modulations are implemented and experimentally validated.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"184-197"},"PeriodicalIF":4.3,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11345958","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Multilevel power inverters have a complex semiconductor structure that elevates the risk of switch faults. Furthermore, voltage drops across floating capacitors, which are integral components of multilevel power converter structures, can disrupt accurate system status assessment and lead to incorrect or delayed fault detection. This article proposes a novel approach for short-circuit fault detection and location in multilevel power converters using artificial intelligence with a focus on reliability prioritization. Five reference voltage prediction methods were analyzed including a switching algorithm and four deep learning-based techniques i.e., convolutional neural networks, gated recurrent units, long short-term memory networks, and a hybrid model combining convolutional neural networks with long short-term memory networks. Fault location was performed through a reliability-based strategy prioritizing components with higher failure probabilities, significantly improving the fault identification speed. Our method reduced the duration of fault detection compared to similar methods and included a novel fault location method based on prioritizing fault detection according to the lifetime of fundamental components. We predicted and verified online voltage references using four different deep learning methods and compare the outcomes in an experimental setup. Simulation and experimental results demonstrated the effectiveness and practicability of the proposed method in detecting and locating faults in various types of multilevel power inverters.
{"title":"High-Speed Fault Detection and Location Approach for Multilevel Inverters Using Deep Learning and Reliability Evaluation","authors":"Alireza Teimouri;Arman Fathollahi;Mahsa Raeiszadeh;Mohammadamin Rezaei;Amir Mosavi","doi":"10.1109/OJIES.2026.3651309","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3651309","url":null,"abstract":"Multilevel power inverters have a complex semiconductor structure that elevates the risk of switch faults. Furthermore, voltage drops across floating capacitors, which are integral components of multilevel power converter structures, can disrupt accurate system status assessment and lead to incorrect or delayed fault detection. This article proposes a novel approach for short-circuit fault detection and location in multilevel power converters using artificial intelligence with a focus on reliability prioritization. Five reference voltage prediction methods were analyzed including a switching algorithm and four deep learning-based techniques i.e., convolutional neural networks, gated recurrent units, long short-term memory networks, and a hybrid model combining convolutional neural networks with long short-term memory networks. Fault location was performed through a reliability-based strategy prioritizing components with higher failure probabilities, significantly improving the fault identification speed. Our method reduced the duration of fault detection compared to similar methods and included a novel fault location method based on prioritizing fault detection according to the lifetime of fundamental components. We predicted and verified online voltage references using four different deep learning methods and compare the outcomes in an experimental setup. Simulation and experimental results demonstrated the effectiveness and practicability of the proposed method in detecting and locating faults in various types of multilevel power inverters.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"291-312"},"PeriodicalIF":4.3,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11339959","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-12DOI: 10.1109/OJIES.2026.3653115
Almachius Kahwa;Yasutaka Fujimoto
This article presents a novel single-phase dual-buck three-level flying capacitor (FC) inverter. The topology derives from the conventional FC inverter, which is widely studied and applied because of modularity, low voltage stress across the switch, and high efficiency. However, a well-known challenge in the high-power density conventional FC inverter adopting fast-switching wideband gap devices, such as silicon carbide switches, is a shoot-through problem that may occur because of cross-talk effects, switching mismatch, and electronics delays. As an existing solution, the risk of shoot-through in the traditional FC inverter can be suppressed by injecting dead time in the switching signals. However, this technique increases the distortion of the output waveforms. This article proposes an inverter topology that mitigates the problems mentioned above. The proposed inverter requires one FC, four active switching devices, two diodes, and two shoot-through protection inductors. Like the conventional FC inverter, the proposed inverter utilizes one-half fewer FCs than the counterpart dual-buck inverter while maintaining the same voltage stress across the switches. Moreover, by mitigating the shoot-through problem, the reliability of the inverter is improved. The detailed operation of the inverter implementing level-shifted pulsewidth modulation is provided. The advantages and performance of the proposed inverter were demonstrated in simulation and validated in experiments. A 98.77% maximum efficiency was achieved by the proposed dual-buck FC inverter at a switching frequency of 40 kHz.
{"title":"A Novel Single-Phase Dual-Buck Three-Level Flying Capacitor Inverter for Mitigating Shoot-Through Problem","authors":"Almachius Kahwa;Yasutaka Fujimoto","doi":"10.1109/OJIES.2026.3653115","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3653115","url":null,"abstract":"This article presents a novel single-phase dual-buck three-level flying capacitor (FC) inverter. The topology derives from the conventional FC inverter, which is widely studied and applied because of modularity, low voltage stress across the switch, and high efficiency. However, a well-known challenge in the high-power density conventional FC inverter adopting fast-switching wideband gap devices, such as silicon carbide switches, is a shoot-through problem that may occur because of cross-talk effects, switching mismatch, and electronics delays. As an existing solution, the risk of shoot-through in the traditional FC inverter can be suppressed by injecting dead time in the switching signals. However, this technique increases the distortion of the output waveforms. This article proposes an inverter topology that mitigates the problems mentioned above. The proposed inverter requires one FC, four active switching devices, two diodes, and two shoot-through protection inductors. Like the conventional FC inverter, the proposed inverter utilizes one-half fewer FCs than the counterpart dual-buck inverter while maintaining the same voltage stress across the switches. Moreover, by mitigating the shoot-through problem, the reliability of the inverter is improved. The detailed operation of the inverter implementing level-shifted pulsewidth modulation is provided. The advantages and performance of the proposed inverter were demonstrated in simulation and validated in experiments. A 98.77% maximum efficiency was achieved by the proposed dual-buck FC inverter at a switching frequency of 40 kHz.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"198-207"},"PeriodicalIF":4.3,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11345996","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-12DOI: 10.1109/OJIES.2026.3652925
Ghada Ben Debba;Ali Amamou;Sousso Kelouwani;Naima Sehli
Addressing the challenges of cell inconsistency in battery systems, a key factor affecting performance, dynamic reconfigurable batteries have emerged as a promising solution in recent research, ensuring better cell balancing and optimal energy use. However, existing designs often face tradeoffs between control complexity, switching flexibility, and operational reliability, limiting their practicality for large-scale applications. To overcome these limitations, this study proposes a novel balancing strategy based on a modified modular architecture with flexible module-level switching. This design relies on a dual-layer control framework that simultaneously manages inter- and intra-module state of charge (SOC) equalization with reduced coordination overhead. A genetic algorithm-based approach is used for optimal switching control, enhanced by a feedforward neural network to predict SOC deviation, enabling efficient and reliable real-time balancing. Experimental validation on a lab-scale prototype and hardware-in-the-loop simulations demonstrates the system's ability to improve battery capacity utilization and extend operating time by approximately 17% and 18%, respectively, compared with conventional system. Further testing on a large-scale pack with 320 cells demonstrates up to 40 min of additional autonomy over a fixed architecture, underlining the practical potential of the proposed method for real-world applications.
{"title":"A Modular Reconfigurable Battery Architecture With an Adaptive Real-Time Control Strategy for Optimal Capacity Utilization","authors":"Ghada Ben Debba;Ali Amamou;Sousso Kelouwani;Naima Sehli","doi":"10.1109/OJIES.2026.3652925","DOIUrl":"https://doi.org/10.1109/OJIES.2026.3652925","url":null,"abstract":"Addressing the challenges of cell inconsistency in battery systems, a key factor affecting performance, dynamic reconfigurable batteries have emerged as a promising solution in recent research, ensuring better cell balancing and optimal energy use. However, existing designs often face tradeoffs between control complexity, switching flexibility, and operational reliability, limiting their practicality for large-scale applications. To overcome these limitations, this study proposes a novel balancing strategy based on a modified modular architecture with flexible module-level switching. This design relies on a dual-layer control framework that simultaneously manages inter- and intra-module state of charge (SOC) equalization with reduced coordination overhead. A genetic algorithm-based approach is used for optimal switching control, enhanced by a feedforward neural network to predict SOC deviation, enabling efficient and reliable real-time balancing. Experimental validation on a lab-scale prototype and hardware-in-the-loop simulations demonstrates the system's ability to improve battery capacity utilization and extend operating time by approximately 17% and 18%, respectively, compared with conventional system. Further testing on a large-scale pack with 320 cells demonstrates up to 40 min of additional autonomy over a fixed architecture, underlining the practical potential of the proposed method for real-world applications.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"208-226"},"PeriodicalIF":4.3,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11345714","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-26DOI: 10.1109/OJIES.2025.3648255
Maysam Abbasi;Milad Ghavipanjeh Marangalu;Naser Vosoughi Kurdkandi;Ehsan Abbasi;Hani Vahedi;Li Li;Ricardo P. Aguilera;Dylan Lu;Fei Wang
In recent years, several common-ground switched-capacitor transformerless (CGSC-TL) dc–ac multilevel power converters have been introduced, providing advantages such as multilevel output voltage, voltage boosting, and mitigated leakage current. However, these structures mostly suffer from drawbacks, such as limited output voltage levels (like only five levels), lack of voltage-boosting capability, and high charging current spikes of the capacitors. This article proposes a new single-stage CGSC-TL nine-level (9L) multilevel inverter (MLI) with voltage-boosting capability and limited spikes of charging current of the capacitor, designed to be employed as a single-stage power-electronics-based interface device between renewable energy sources, such as photovoltaic (PV) systems and power grid and/or load. The proposed MLI provides several merits, such as a common-ground structure that suppresses PV-to-ground leakage current associated with PV parasitic capacitances, active and reactive power support, a wide input voltage range, and higher output voltage levels (9L) compared with other structures in the same class. Comprehensive comparative analyses, as well as simulation and experimental results, are presented to verify the performance of the proposed inverter.
{"title":"New Nine-Level Common-Ground Multilevel Inverter With Boosting Capability for Renewable Energies","authors":"Maysam Abbasi;Milad Ghavipanjeh Marangalu;Naser Vosoughi Kurdkandi;Ehsan Abbasi;Hani Vahedi;Li Li;Ricardo P. Aguilera;Dylan Lu;Fei Wang","doi":"10.1109/OJIES.2025.3648255","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3648255","url":null,"abstract":"In recent years, several common-ground switched-capacitor transformerless (CGSC-TL) dc–ac multilevel power converters have been introduced, providing advantages such as multilevel output voltage, voltage boosting, and mitigated leakage current. However, these structures mostly suffer from drawbacks, such as limited output voltage levels (like only five levels), lack of voltage-boosting capability, and high charging current spikes of the capacitors. This article proposes a new single-stage CGSC-TL nine-level (9L) multilevel inverter (MLI) with voltage-boosting capability and limited spikes of charging current of the capacitor, designed to be employed as a single-stage power-electronics-based interface device between renewable energy sources, such as photovoltaic (PV) systems and power grid and/or load. The proposed MLI provides several merits, such as a common-ground structure that suppresses PV-to-ground leakage current associated with PV parasitic capacitances, active and reactive power support, a wide input voltage range, and higher output voltage levels (9L) compared with other structures in the same class. Comprehensive comparative analyses, as well as simulation and experimental results, are presented to verify the performance of the proposed inverter.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"7 ","pages":"86-103"},"PeriodicalIF":4.3,"publicationDate":"2025-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11316224","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145929677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}