Pub Date : 2010-03-25DOI: 10.1109/TCAPT.2010.2041664
G. Dhanushkodi
One of the major impacts on the thermal design of electronic systems over the past decade has been the use of computational fluid dynamics and heat transfer tools. System level thermal simulation has driven the need to understand the performance and the reliability aspects of boundary conditions. In addition to the modeling inaccuracies, computation results also reflect the influence of the accuracy of input parameters. The computational fluid dynamics model of electronic enclosures requires the pressure drop details of vents to predict the system impedance and air flow through the system thereafter. The temperature of electronic components depends on the rate of airflow through the electronic system. Loss coefficient of vents appears to be the major source of error. The modeling of each vent is typically not possible and is represented by its pressure drop. An experimental setup is established to measure the pressure drop characteristics of different patterns of vents commonly used in electronic equipment. Pressure drop of different vent patterns, with hole diameter varying from 1.6 mm to 3.0 mm, the pitch varying from 3.2 mm to 6.5 mm, and the porosity varying from 20% to 45%, are measured using an experimental setup. In this paper, a practical formula for the loss coefficient of vents is presented. This formula takes into account important parameters such as hole diameter, pitch, porosity, and Reynolds number.
{"title":"Experimental Study on Pressure Drop Characteristics of Vents","authors":"G. Dhanushkodi","doi":"10.1109/TCAPT.2010.2041664","DOIUrl":"https://doi.org/10.1109/TCAPT.2010.2041664","url":null,"abstract":"One of the major impacts on the thermal design of electronic systems over the past decade has been the use of computational fluid dynamics and heat transfer tools. System level thermal simulation has driven the need to understand the performance and the reliability aspects of boundary conditions. In addition to the modeling inaccuracies, computation results also reflect the influence of the accuracy of input parameters. The computational fluid dynamics model of electronic enclosures requires the pressure drop details of vents to predict the system impedance and air flow through the system thereafter. The temperature of electronic components depends on the rate of airflow through the electronic system. Loss coefficient of vents appears to be the major source of error. The modeling of each vent is typically not possible and is represented by its pressure drop. An experimental setup is established to measure the pressure drop characteristics of different patterns of vents commonly used in electronic equipment. Pressure drop of different vent patterns, with hole diameter varying from 1.6 mm to 3.0 mm, the pitch varying from 3.2 mm to 6.5 mm, and the porosity varying from 20% to 45%, are measured using an experimental setup. In this paper, a practical formula for the loss coefficient of vents is presented. This formula takes into account important parameters such as hole diameter, pitch, porosity, and Reynolds number.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"432-436"},"PeriodicalIF":0.0,"publicationDate":"2010-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2010.2041664","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-11DOI: 10.1109/TCAPT.2009.2036154
Jin-Hyoung Park, Kyung-Woon Jang, K. Paik, Soon-Bok Lee
A primary factor of anisotropic conductive film (ACF) package failure is delamination between the chip and the adhesive at the edge of the chip. This delamination is mainly affected by the thermal shear strain at the edge of the chip. This shear strain was measured on various electronic ACF package specimens by micro-Moire interferometry with a phase shifting method. In order to find the effect of moisture, the reliability performance of an adhesive flip-chip in the moisture environment was investigated. The failure modes were found to be interfacial delamination and bump/pad opening which may eventually lead to total loss of electrical contact. Different geometric size specimens in terms of interconnections were discussed in the context of the significance of mismatch in coefficient of moisture expansion (CME) between the adhesive and other components in the package, which induces hygroscopic swelling stress. The effect of moisture diffusion in the package and the CME mismatch were also evaluated by using the Moire interferometry. From Moire measurement results, we could also obtain the stress intensity factor K. Through an analysis of deformations induced by thermal and moisture environments, a damage model for an adhesive flip-chip package is proposed.
{"title":"A Study of Hygrothermal Behavior of ACF Flip Chip Packages With Moiré Interferometry","authors":"Jin-Hyoung Park, Kyung-Woon Jang, K. Paik, Soon-Bok Lee","doi":"10.1109/TCAPT.2009.2036154","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2036154","url":null,"abstract":"A primary factor of anisotropic conductive film (ACF) package failure is delamination between the chip and the adhesive at the edge of the chip. This delamination is mainly affected by the thermal shear strain at the edge of the chip. This shear strain was measured on various electronic ACF package specimens by micro-Moire interferometry with a phase shifting method. In order to find the effect of moisture, the reliability performance of an adhesive flip-chip in the moisture environment was investigated. The failure modes were found to be interfacial delamination and bump/pad opening which may eventually lead to total loss of electrical contact. Different geometric size specimens in terms of interconnections were discussed in the context of the significance of mismatch in coefficient of moisture expansion (CME) between the adhesive and other components in the package, which induces hygroscopic swelling stress. The effect of moisture diffusion in the package and the CME mismatch were also evaluated by using the Moire interferometry. From Moire measurement results, we could also obtain the stress intensity factor K. Through an analysis of deformations induced by thermal and moisture environments, a damage model for an adhesive flip-chip package is proposed.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"215-221"},"PeriodicalIF":0.0,"publicationDate":"2010-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2036154","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-11DOI: 10.1109/TCAPT.2009.2033039
G. Tang, Siow Pin Tan, N. Khan, D. Pinjala, J. Lau, Ai Bin Yu, K. Vaidyanathan, K. Toh
In this paper, an integrated liquid cooling system for 3-D stacked modules with high dissipation level is proposed. The fluidic interconnects in this system are elaborated and the sealing technique for different fluid interfaces is discussed. Meanwhile, the pressure drop for each part of the system is analyzed. The optimized fluidic interconnects minimizing the pressure drop have been designed and fabricated, and the compact system is integrated. In line with the fluidic interconnect design and analysis, an experimental process for hydraulic characterization of the integrated cooling system is established. The pressure drops for different fluidic interconnects in this system are measured and compared with the analyzed results.
{"title":"Integrated Liquid Cooling Systems for 3-D Stacked TSV Modules","authors":"G. Tang, Siow Pin Tan, N. Khan, D. Pinjala, J. Lau, Ai Bin Yu, K. Vaidyanathan, K. Toh","doi":"10.1109/TCAPT.2009.2033039","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2033039","url":null,"abstract":"In this paper, an integrated liquid cooling system for 3-D stacked modules with high dissipation level is proposed. The fluidic interconnects in this system are elaborated and the sealing technique for different fluid interfaces is discussed. Meanwhile, the pressure drop for each part of the system is analyzed. The optimized fluidic interconnects minimizing the pressure drop have been designed and fabricated, and the compact system is integrated. In line with the fluidic interconnect design and analysis, an experimental process for hydraulic characterization of the integrated cooling system is established. The pressure drops for different fluidic interconnects in this system are measured and compared with the analyzed results.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"184-195"},"PeriodicalIF":0.0,"publicationDate":"2010-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2033039","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62520181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-11DOI: 10.1109/TCAPT.2009.2038488
R. Sayer, Sunkook Kim, A. Franklin, S. Mohammadi, T. Fisher
A carbon nanotube (CNT) thermometer that operates on the principles of electrical shot noise is reported. Shot noise thermometry is a self-calibrating measurement technique that relates statistical fluctuations in dc current across a device to temperature. A structure consisting of vertical, top, and bottom-contacted single-walled carbon nanotubes in a porous anodic alumina template was fabricated and used to measure shot noise. Frequencies between 60 and 100 kHz were observed to preclude significant influence from Vf noise, which does not contain thermally relevant information. Because isothermal models do not accurately reproduce the observed noise trends, a self-heating shot noise model has been developed and applied to experimental data to determine the thermal resistance of a CNT device consisting of an array of vertical single-walled CNTs supported in a porous anodic alumina template. The thermal surface resistance at the nanotube-dielectric interface is found to be 1.5 × 108 K/W, which is consistent with measurements by other techniques.
{"title":"Shot Noise Thermometry for Thermal Characterization of Templated Carbon Nanotubes","authors":"R. Sayer, Sunkook Kim, A. Franklin, S. Mohammadi, T. Fisher","doi":"10.1109/TCAPT.2009.2038488","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2038488","url":null,"abstract":"A carbon nanotube (CNT) thermometer that operates on the principles of electrical shot noise is reported. Shot noise thermometry is a self-calibrating measurement technique that relates statistical fluctuations in dc current across a device to temperature. A structure consisting of vertical, top, and bottom-contacted single-walled carbon nanotubes in a porous anodic alumina template was fabricated and used to measure shot noise. Frequencies between 60 and 100 kHz were observed to preclude significant influence from Vf noise, which does not contain thermally relevant information. Because isothermal models do not accurately reproduce the observed noise trends, a self-heating shot noise model has been developed and applied to experimental data to determine the thermal resistance of a CNT device consisting of an array of vertical single-walled CNTs supported in a porous anodic alumina template. The thermal surface resistance at the nanotube-dielectric interface is found to be 1.5 × 108 K/W, which is consistent with measurements by other techniques.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"18 1","pages":"178-183"},"PeriodicalIF":0.0,"publicationDate":"2010-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2038488","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-01DOI: 10.1109/TCAPT.2009.2018834
Fan Zhou, P. Arunasalam, B. Murray, B. Sammakia
Thermal management of device-level packaging continues to present many technical challenges in the electronics industry. In a device/heat sink assembly, the highest resistance to heat flow typically comes from the thermal interface material (TIM). The thermal conductivities of TIMs remain in the range of 1-4 W/mK due to the properties and structure of small dispersed solids in polymer matrices. As a result of the rising design power and heat flux at the silicon die, new ways to improve the effective in situ thermal conductivity of interface materials are required. This paper analyzes a unique TIM enhanced with ultrahigh-density wafer-level thin film-compliant interconnects referred to as smart three axis compliant (STAC) interconnects. MEMS technology is used to directly fabricate STAC interconnects onto a silicon wafer and embed them into the TIM to provide an enhanced conductive path between the die/package and the heat sink. Here, results from a theoretical analysis of the thermal conduction in a TIM embedded with STAC interconnects are reported. The objective of the study is to provide comprehensive design strategies for effective implementation of this type of TIM for specific applications. Parametric studies are performed to examine the thermal resistance of the microinterconnect-enhanced TIM for varying materials, configurations, and geometry of the microinterconnects. A periodic element model of a chip-TIM configuration with top heat sink is used to evaluate the conductive effect of the microinterconnects. In addition, an investigation of the conductive transport in a more complicated chip stack is considered. A 3-D thermal analysis is conducted for a multichip stack package with and without through-silicon vias. The numerical results show that the microinterconnects significantly improve the thermal performance of the TIM. Finally, further steps toward achieving a chip-level design optimization and fabrication process using a STAC microinterconnect structured TIM is proposed.
{"title":"Modeling Heat Transport in Thermal Interface Materials Enhanced With MEMS-Based Microinterconnects","authors":"Fan Zhou, P. Arunasalam, B. Murray, B. Sammakia","doi":"10.1109/TCAPT.2009.2018834","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2018834","url":null,"abstract":"Thermal management of device-level packaging continues to present many technical challenges in the electronics industry. In a device/heat sink assembly, the highest resistance to heat flow typically comes from the thermal interface material (TIM). The thermal conductivities of TIMs remain in the range of 1-4 W/mK due to the properties and structure of small dispersed solids in polymer matrices. As a result of the rising design power and heat flux at the silicon die, new ways to improve the effective in situ thermal conductivity of interface materials are required. This paper analyzes a unique TIM enhanced with ultrahigh-density wafer-level thin film-compliant interconnects referred to as smart three axis compliant (STAC) interconnects. MEMS technology is used to directly fabricate STAC interconnects onto a silicon wafer and embed them into the TIM to provide an enhanced conductive path between the die/package and the heat sink. Here, results from a theoretical analysis of the thermal conduction in a TIM embedded with STAC interconnects are reported. The objective of the study is to provide comprehensive design strategies for effective implementation of this type of TIM for specific applications. Parametric studies are performed to examine the thermal resistance of the microinterconnect-enhanced TIM for varying materials, configurations, and geometry of the microinterconnects. A periodic element model of a chip-TIM configuration with top heat sink is used to evaluate the conductive effect of the microinterconnects. In addition, an investigation of the conductive transport in a more complicated chip stack is considered. A 3-D thermal analysis is conducted for a multichip stack package with and without through-silicon vias. The numerical results show that the microinterconnects significantly improve the thermal performance of the TIM. Finally, further steps toward achieving a chip-level design optimization and fabrication process using a STAC microinterconnect structured TIM is proposed.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"16-24"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2018834","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62518844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-01DOI: 10.1109/TCAPT.2009.2028134
Jeong-Won Yoon, Bo-In Noh, Seung-Boo Jung
The mechanical reliability of Sn-3.5 wt.%Ag solder joints with four different electroless Ni plating layers [Ni-1B, Ni-3B, Ni-7P, and Ni-10P (in wt.%)] was investigated as a function of aging time up to 60 days at 150° C. The ultimate shear stresses for fracture were higher in the ball shear tests when using Ni-B samples than those with Ni-P metallization if the aging treatment at 150° C was shorter than 15 days, and vice versa when the aging time was higher than 45 days. In all the joints, Ni3Sn4 intermetallic compounds (IMCs) were formed at the interfaces. The thickness of the IMC layer increased with decreasing B or P content, i.e., increasing Ni content. The reaction rate between the Sn-Ag solder and Ni-P was slower than that between the Sn-Ag solder and Ni-B. In the shear test, the failure mode switched from a bulk-related failure (ductile fracture) to an interface-related failure (brittle fracture), depending on the aging time. After prolonged aging treatment, weak solder/Ni3Sn4 interfaces led to a failure mode of brittle fracture for all the solder joints, due to the formation of thick Ni3Sn4 IMCs. The failure for the Sn-Ag/Ni-B joints was more abrupt and brittle due to the formation of the thick, interfacial Ni3Sn4 IMC. The results demonstrated that the Sn-Ag/Ni-P joint was more reliable than the Sn-Ag/Ni-B joint from the viewpoints of interfacial IMC thickness and long-term mechanical reliability.
{"title":"Mechanical Reliability of Sn-Ag BGA Solder Joints With Various Electroless Ni-P and Ni-B Plating Layers","authors":"Jeong-Won Yoon, Bo-In Noh, Seung-Boo Jung","doi":"10.1109/TCAPT.2009.2028134","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2028134","url":null,"abstract":"The mechanical reliability of Sn-3.5 wt.%Ag solder joints with four different electroless Ni plating layers [Ni-1B, Ni-3B, Ni-7P, and Ni-10P (in wt.%)] was investigated as a function of aging time up to 60 days at 150° C. The ultimate shear stresses for fracture were higher in the ball shear tests when using Ni-B samples than those with Ni-P metallization if the aging treatment at 150° C was shorter than 15 days, and vice versa when the aging time was higher than 45 days. In all the joints, Ni3Sn4 intermetallic compounds (IMCs) were formed at the interfaces. The thickness of the IMC layer increased with decreasing B or P content, i.e., increasing Ni content. The reaction rate between the Sn-Ag solder and Ni-P was slower than that between the Sn-Ag solder and Ni-B. In the shear test, the failure mode switched from a bulk-related failure (ductile fracture) to an interface-related failure (brittle fracture), depending on the aging time. After prolonged aging treatment, weak solder/Ni3Sn4 interfaces led to a failure mode of brittle fracture for all the solder joints, due to the formation of thick Ni3Sn4 IMCs. The failure for the Sn-Ag/Ni-B joints was more abrupt and brittle due to the formation of the thick, interfacial Ni3Sn4 IMC. The results demonstrated that the Sn-Ag/Ni-P joint was more reliable than the Sn-Ag/Ni-B joint from the viewpoints of interfacial IMC thickness and long-term mechanical reliability.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"222-228"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2028134","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-01DOI: 10.1109/TCAPT.2009.2029086
M. Faraji, H. El Qarnia
This paper presents the results of a numerical study of the melting and natural convection in a rectangular enclosure heated with three discrete protruding electronic components (heat sources) mounted on a conducting vertical plate. The heat sources generate heat at a constant and uniform volumetric rate. A part of the power generated in the heat sources is dissipated in phase change material (PCM, n-eicosane with melting temperature, Tm = 36°C) that filled the enclosure. The advantage of using this cooling strategy is that the PCMs are able to absorb a high amount of heat generated by electronic components without activating the fan. To investigate the thermal behavior of the proposed cooling system, a mathematical model, based on the mass, momentum, and energy conservation equations, was developed. The governing equations are next discretized using a finite volume method in a staggered mesh, and a pressure correction equation method is employed for the pressure-velocity coupling. The energy conservation equation for the PCM is solved using the enthalpy method. The solid regions (substrate and heat sources) are treated as fluid regions with infinite viscosity. A parametric study was conducted in order to optimize the thermal performance of the heat sink. The optimization involves determination of the key parameter values that maximize the time required by the electronic component to reach the critical temperature (T < Tcr).
{"title":"Numerical Study of Free Convection Dominated Melting in an Isolated Cavity Heated by Three Protruding Electronic Components","authors":"M. Faraji, H. El Qarnia","doi":"10.1109/TCAPT.2009.2029086","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2029086","url":null,"abstract":"This paper presents the results of a numerical study of the melting and natural convection in a rectangular enclosure heated with three discrete protruding electronic components (heat sources) mounted on a conducting vertical plate. The heat sources generate heat at a constant and uniform volumetric rate. A part of the power generated in the heat sources is dissipated in phase change material (PCM, n-eicosane with melting temperature, Tm = 36°C) that filled the enclosure. The advantage of using this cooling strategy is that the PCMs are able to absorb a high amount of heat generated by electronic components without activating the fan. To investigate the thermal behavior of the proposed cooling system, a mathematical model, based on the mass, momentum, and energy conservation equations, was developed. The governing equations are next discretized using a finite volume method in a staggered mesh, and a pressure correction equation method is employed for the pressure-velocity coupling. The energy conservation equation for the PCM is solved using the enthalpy method. The solid regions (substrate and heat sources) are treated as fluid regions with infinite viscosity. A parametric study was conducted in order to optimize the thermal performance of the heat sink. The optimization involves determination of the key parameter values that maximize the time required by the electronic component to reach the critical temperature (T < Tcr).","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"167-177"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2029086","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-01DOI: 10.1109/TCAPT.2009.2029564
L. Zheng, Ying Sun
In this paper, numerical modeling and experimental results are presented for underfill flow in a large die with a nonuniform bump pattern in a flip-chip packaging configuration. Two different 2-D flow models coupled with the volume-of-fluid method are applied to track the underfill flow front during the simulation of the flip-chip encapsulation process. The first model employs the modified Washburn model and uses a time-dependent inlet velocity to account for the flow resistance across the gap direction in the presence of bump interconnects. The second model introduces a momentum source term in the Stokes equation to represent the gapwise flow resistance. Rheological properties, surface tension, and dynamic contact angles for commercial underfill material and the effect of flux residue on underfill wetting properties are experimentally determined. Simulation results based on the two models are compared with in-situ flow visualization conducted using bumped quartz dies. The modified Stokes model yields better predictions of the underfill penetration length as a function of time and the total flow-out time. This model is then used to investigate the effects of dynamic contact angles and temperature-dependent underfill viscosity on underfill flow in a large die with a nonuniform bump pattern.
{"title":"An Examination of Underfill Flow in Large Dies With Nonuniform Bump Patterns","authors":"L. Zheng, Ying Sun","doi":"10.1109/TCAPT.2009.2029564","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2029564","url":null,"abstract":"In this paper, numerical modeling and experimental results are presented for underfill flow in a large die with a nonuniform bump pattern in a flip-chip packaging configuration. Two different 2-D flow models coupled with the volume-of-fluid method are applied to track the underfill flow front during the simulation of the flip-chip encapsulation process. The first model employs the modified Washburn model and uses a time-dependent inlet velocity to account for the flow resistance across the gap direction in the presence of bump interconnects. The second model introduces a momentum source term in the Stokes equation to represent the gapwise flow resistance. Rheological properties, surface tension, and dynamic contact angles for commercial underfill material and the effect of flux residue on underfill wetting properties are experimentally determined. Simulation results based on the two models are compared with in-situ flow visualization conducted using bumped quartz dies. The modified Stokes model yields better predictions of the underfill penetration length as a function of time and the total flow-out time. This model is then used to investigate the effects of dynamic contact angles and temperature-dependent underfill viscosity on underfill flow in a large die with a nonuniform bump pattern.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"196-205"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2029564","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-01DOI: 10.1109/TCAPT.2009.2025961
Jeong-Won Yoon, Bo-In Noh, Seung-Boo Jung
The solid-state interfacial reactions of Pb-free solders (Sn-3.5Ag, Sn-3.5Ag-0.7Cu, and Sn-0.7Cu) with electroless nickel-immersion gold (ENIG)-plated Cu substrate, and the growth of interfacial intermetallic compound (IMC) layers were investigated and compared during aging at 200°C for up to 1000 h. The Sn-3.5Ag-0.7Cu solder exhibited a higher IMC growth rate and a higher consumption rate of the Ni(P) layer than the other two Pb-free solders. The interfacial reaction of the Sn-0.7Cu/ENIG-plated Cu system during aging was the slowest among the three kinds of solder joint. The thickness of the interfacial IMCs were ranked in the order Sn-3.5Ag-0.7Cu > Sn-3.5Ag > Sn-0.7Cu. The higher melting temperature of the Sn-0.7Cu solder and the presence of Cu element within the solder suppressed the growth of the interfacial IMC layer and the consumption of the Ni(P) layer, resulting in the superior interfacial stability of the solder joint at high temperature of 200°C.
研究了无铅钎料(Sn-3.5Ag、Sn-3.5Ag-0.7Cu和Sn-0.7Cu)与化学镀镍金(ENIG) Cu衬底在200℃时效1000 h时的固相界面反应和界面金属间化合物(IMC)层的生长情况。结果表明，与其他两种无铅钎料相比，Sn-3.5Ag-0.7Cu钎料具有更高的IMC生长速率和更高的Ni(P)层消耗率。Sn-0.7Cu/ enigg -镀Cu体系在时效过程中的界面反应是三种焊点中最慢的。界面imc的厚度依次为Sn-3.5Ag-0.7 cu > Sn-3.5Ag > Sn-0.7Cu。Sn-0.7Cu钎料较高的熔化温度和钎料中Cu元素的存在抑制了界面IMC层的生长和Ni(P)层的消耗，使得焊点在200℃高温下具有优异的界面稳定性。
{"title":"Comparison of Interfacial Stability of Pb-Free Solders (Sn—3.5Ag, Sn—3.5Ag—0.7Cu, and Sn—0.7Cu) on ENIG-Plated Cu During Aging","authors":"Jeong-Won Yoon, Bo-In Noh, Seung-Boo Jung","doi":"10.1109/TCAPT.2009.2025961","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2025961","url":null,"abstract":"The solid-state interfacial reactions of Pb-free solders (Sn-3.5Ag, Sn-3.5Ag-0.7Cu, and Sn-0.7Cu) with electroless nickel-immersion gold (ENIG)-plated Cu substrate, and the growth of interfacial intermetallic compound (IMC) layers were investigated and compared during aging at 200°C for up to 1000 h. The Sn-3.5Ag-0.7Cu solder exhibited a higher IMC growth rate and a higher consumption rate of the Ni(P) layer than the other two Pb-free solders. The interfacial reaction of the Sn-0.7Cu/ENIG-plated Cu system during aging was the slowest among the three kinds of solder joint. The thickness of the interfacial IMCs were ranked in the order Sn-3.5Ag-0.7Cu > Sn-3.5Ag > Sn-0.7Cu. The higher melting temperature of the Sn-0.7Cu solder and the presence of Cu element within the solder suppressed the growth of the interfacial IMC layer and the consumption of the Ni(P) layer, resulting in the superior interfacial stability of the solder joint at high temperature of 200°C.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"64-70"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2025961","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-03-01DOI: 10.1109/TCAPT.2009.2021393
X. Yin, K. Komvopoulos
The mechanical response of alternating phase-shift mask (APSM) microstructures subjected to dynamic pressure loadings relevant to those encountered in megasonic cleaning was analyzed with the finite element method (FEM). A parametric study of the effects of microstructure dimensions, pressure amplitude, and loading frequency on the mask structural integrity was performed for two typical chromium/quartz APSM patterns. Failure due to microfracture and plastic deformation processes which may occur during megasonic cleaning was examined for loading frequencies of 1, 5, and 10 MHz. The FEM results provide insight into possible failure modes and critical microstructure dimensions for instantaneous microstructure damage. Different failure scenarios revealed by the FEM results are in qualitative agreement with experimental observations. The results of this study have direct implications to the design of extreme ultraviolet lithography masks and the optimization of the megasonic cleaning process.
{"title":"Dynamic Finite Element Analysis of Failure in Alternating Phase-Shift Masks Caused by Megasonic Cleaning","authors":"X. Yin, K. Komvopoulos","doi":"10.1109/TCAPT.2009.2021393","DOIUrl":"https://doi.org/10.1109/TCAPT.2009.2021393","url":null,"abstract":"The mechanical response of alternating phase-shift mask (APSM) microstructures subjected to dynamic pressure loadings relevant to those encountered in megasonic cleaning was analyzed with the finite element method (FEM). A parametric study of the effects of microstructure dimensions, pressure amplitude, and loading frequency on the mask structural integrity was performed for two typical chromium/quartz APSM patterns. Failure due to microfracture and plastic deformation processes which may occur during megasonic cleaning was examined for loading frequencies of 1, 5, and 10 MHz. The FEM results provide insight into possible failure modes and critical microstructure dimensions for instantaneous microstructure damage. Different failure scenarios revealed by the FEM results are in qualitative agreement with experimental observations. The results of this study have direct implications to the design of extreme ultraviolet lithography masks and the optimization of the megasonic cleaning process.","PeriodicalId":55013,"journal":{"name":"IEEE Transactions on Components and Packaging Technologies","volume":"33 1","pages":"46-55"},"PeriodicalIF":0.0,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TCAPT.2009.2021393","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62519679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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