Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910812
J. Maneiro, S. Tennakoon, C. Barker
This paper describes the concept of a recently proposed scalable DC/DC converter topology applied to a shunt connected HVDC tap. This solution offers some advantages with respect to previously proposed solutions. Two different configurations of the circuit are proposed for interconnection with different HVDC systems. The internal structure of the modular DC/DC converter is presented and a suitable strategy to control the system is investigated in order to achieve soft-switching of the converter semiconductors. The operation is validated using computer simulations, which include a rough estimation of the DC/DC converter power losses.
{"title":"Scalable shunt connected HVDC tap using the DC transformer concept","authors":"J. Maneiro, S. Tennakoon, C. Barker","doi":"10.1109/EPE.2014.6910812","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910812","url":null,"abstract":"This paper describes the concept of a recently proposed scalable DC/DC converter topology applied to a shunt connected HVDC tap. This solution offers some advantages with respect to previously proposed solutions. Two different configurations of the circuit are proposed for interconnection with different HVDC systems. The internal structure of the modular DC/DC converter is presented and a suitable strategy to control the system is investigated in order to achieve soft-switching of the converter semiconductors. The operation is validated using computer simulations, which include a rough estimation of the DC/DC converter power losses.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"87 1","pages":"1-10"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85469834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910926
G. Farivar, V. Agelidis, B. Hredzak
In this paper a generalized scheme for capacitors voltage estimation for multilevel converters based on the converter switching states and using only a single voltage sensor at the AC side of the converter is proposed. The estimation of the capacitors voltage is performed after a capacitor is switched on or off and hence the estimation frequency is dependent on the converter switching frequency. In between the switching periods, the scheme can keep track of the capacitors voltage by monitoring the current flowing through the capacitor until the next transition. The effectiveness of the proposed scheme is demonstrated on a single-phase 7-level cascaded H-Bridge multilevel converter based STATCOM by simulation in the Matlab/Simulink environment.
{"title":"A generalized capacitors voltage estimation scheme for multilevel converters","authors":"G. Farivar, V. Agelidis, B. Hredzak","doi":"10.1109/EPE.2014.6910926","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910926","url":null,"abstract":"In this paper a generalized scheme for capacitors voltage estimation for multilevel converters based on the converter switching states and using only a single voltage sensor at the AC side of the converter is proposed. The estimation of the capacitors voltage is performed after a capacitor is switched on or off and hence the estimation frequency is dependent on the converter switching frequency. In between the switching periods, the scheme can keep track of the capacitors voltage by monitoring the current flowing through the capacitor until the next transition. The effectiveness of the proposed scheme is demonstrated on a single-phase 7-level cascaded H-Bridge multilevel converter based STATCOM by simulation in the Matlab/Simulink environment.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"190 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79755104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910723
Jian Fu, Bo Zhang, D. Qiu, Wenxun Xiao
This paper proposes a novel single-switch dc-dc converter with voltage gain D/(1-D)2 by cascading a Boost converter and a Buck-boost converter. The proposed converter has the advantages of simple circuit structure and extended voltage conversion ratio. The operating principle and steady-state analysis of the proposed converter are discussed in detail. Finally, a prototype is implemented to verify theoretical analysis.
{"title":"A novel single-switch cascaded DC-DC converter of Boost and Buck-boost converters","authors":"Jian Fu, Bo Zhang, D. Qiu, Wenxun Xiao","doi":"10.1109/EPE.2014.6910723","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910723","url":null,"abstract":"This paper proposes a novel single-switch dc-dc converter with voltage gain D/(1-D)2 by cascading a Boost converter and a Buck-boost converter. The proposed converter has the advantages of simple circuit structure and extended voltage conversion ratio. The operating principle and steady-state analysis of the proposed converter are discussed in detail. Finally, a prototype is implemented to verify theoretical analysis.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"37 1","pages":"1-9"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79805786","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6911049
S. Mohan, R. Naik
In this paper, the design approach for the power conversion stage of typical medium voltage (3.3kV to 4.16kV), high power (6-10MW) multi-level converters like those used in offshore wind turbine systems is investigated and evaluated. The back-to-back AC-DC-AC multi-level power conversion stage for offshore wind turbines is usually driven by a Permanent Magnet Synchronous Generator (PMSG) for power ratings of the order of 6-10MW. The design approach, primarily relying on a comprehensive simulation model developed, aims to establish the power processing capability of the power conversion stage under the constraints of the thermal limits of the medium voltage power semiconductor devices, the power quality delivered to the grid (for power factor requirements of 0.9 to unity at the grid) and the overall efficiency. Based on the developed controls for the line-side and the generator-side converter, an instantaneous loss model of the semiconductor devices allows estimation of the instantaneous junction temperatures based on thermal models for the devices. Although the paper provides an overview of the different medium voltage power semiconductor devices, the analysis provided focusses primarily on the Integrated Gate Commutated Thyristor (IGCT). The maximum switching frequencies achievable at the power levels of 6-10MW is then determined based on the thermal constraints. Appropriate selection of the filter elements for the determined switching frequencies then enables quantification of the power quality and the overall system efficiency of the power conversion stage. The achievable switching frequencies at the different power levels of the line-side and the generator-side converters is finally established, along with the achievable power quality and efficiencies at the different operating points.
{"title":"Design approach for high power, medium voltage power conversion systems for wind turbines","authors":"S. Mohan, R. Naik","doi":"10.1109/EPE.2014.6911049","DOIUrl":"https://doi.org/10.1109/EPE.2014.6911049","url":null,"abstract":"In this paper, the design approach for the power conversion stage of typical medium voltage (3.3kV to 4.16kV), high power (6-10MW) multi-level converters like those used in offshore wind turbine systems is investigated and evaluated. The back-to-back AC-DC-AC multi-level power conversion stage for offshore wind turbines is usually driven by a Permanent Magnet Synchronous Generator (PMSG) for power ratings of the order of 6-10MW. The design approach, primarily relying on a comprehensive simulation model developed, aims to establish the power processing capability of the power conversion stage under the constraints of the thermal limits of the medium voltage power semiconductor devices, the power quality delivered to the grid (for power factor requirements of 0.9 to unity at the grid) and the overall efficiency. Based on the developed controls for the line-side and the generator-side converter, an instantaneous loss model of the semiconductor devices allows estimation of the instantaneous junction temperatures based on thermal models for the devices. Although the paper provides an overview of the different medium voltage power semiconductor devices, the analysis provided focusses primarily on the Integrated Gate Commutated Thyristor (IGCT). The maximum switching frequencies achievable at the power levels of 6-10MW is then determined based on the thermal constraints. Appropriate selection of the filter elements for the determined switching frequencies then enables quantification of the power quality and the overall system efficiency of the power conversion stage. The achievable switching frequencies at the different power levels of the line-side and the generator-side converters is finally established, along with the achievable power quality and efficiencies at the different operating points.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"1 1","pages":"1-9"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89833250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910782
Yao Kai, H. Wenbin, Li Qiang, Lyu Jianguo
Discontinuous current mode (DCM) boost power factor correction (PFC) converter features zero-current turn-on for the switch, no reverse recovery in diode, constant frequency operation. However, when the duty cycle is constant in a line cycle, the input current contains rich 3rd harmonic which has a phase difference of π with fundamental component. The harmonic results in not only low PF but also larger peak and rms current values of the main power components, which leads to higher conduction and switching turn-off loss. A variable duty cycle control is proposed in this paper so as to enable that the input current contains only 3rd harmonic which is in phase with fundamental component while remaining the same PF at a certain input voltage, comparing with that of constant duty cycle control. A method of fitting the duty cycle is further proposed for simplifying the circuit implementation. The efficiency is improved as the critical inductance can be increased and the peak and rms current value is therefore decreased. The proposed method also achieves the output voltage ripple or the output storage capacitance reduction. The experimental results from a prototype of 120W are given to verify the effectiveness of the proposed method.
{"title":"A novel control scheme of DCM boost PFC converter","authors":"Yao Kai, H. Wenbin, Li Qiang, Lyu Jianguo","doi":"10.1109/EPE.2014.6910782","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910782","url":null,"abstract":"Discontinuous current mode (DCM) boost power factor correction (PFC) converter features zero-current turn-on for the switch, no reverse recovery in diode, constant frequency operation. However, when the duty cycle is constant in a line cycle, the input current contains rich 3rd harmonic which has a phase difference of π with fundamental component. The harmonic results in not only low PF but also larger peak and rms current values of the main power components, which leads to higher conduction and switching turn-off loss. A variable duty cycle control is proposed in this paper so as to enable that the input current contains only 3rd harmonic which is in phase with fundamental component while remaining the same PF at a certain input voltage, comparing with that of constant duty cycle control. A method of fitting the duty cycle is further proposed for simplifying the circuit implementation. The efficiency is improved as the critical inductance can be increased and the peak and rms current value is therefore decreased. The proposed method also achieves the output voltage ripple or the output storage capacitance reduction. The experimental results from a prototype of 120W are given to verify the effectiveness of the proposed method.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"25 4 1","pages":"1-10"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83347814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910854
M. Andenna, Y. Otani, S. Matthias, C. Corvasce, S. Geissmann, A. Kopta, R. Schnell, Munaf T. A. Rahimo
In this paper, we present the next generation of IGBT modules employing the latest Enhanced Trench ET-IGBT and Field Charge Extraction FCE fast diode devices. Such technologies enable high power IGBT modules to be capable of providing higher level of electrical performance in terms of low losses, good controllability, high robustness and soft diode reverse recovery. The first prototype dual modules with the new chip technologies rated at 300A and 3300V were fabricated and tested. The paper will present in detail the ET-IGBT and FCE diode concepts, the full static and dynamic electrical test results and their impact for achieving higher levels of performance in future power electronics applications.
{"title":"The next generation high voltage IGBT modules utilizing Enhanced-Trench ET-IGBTs and Field Charge Extraction FCE-Diodes","authors":"M. Andenna, Y. Otani, S. Matthias, C. Corvasce, S. Geissmann, A. Kopta, R. Schnell, Munaf T. A. Rahimo","doi":"10.1109/EPE.2014.6910854","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910854","url":null,"abstract":"In this paper, we present the next generation of IGBT modules employing the latest Enhanced Trench ET-IGBT and Field Charge Extraction FCE fast diode devices. Such technologies enable high power IGBT modules to be capable of providing higher level of electrical performance in terms of low losses, good controllability, high robustness and soft diode reverse recovery. The first prototype dual modules with the new chip technologies rated at 300A and 3300V were fabricated and tested. The paper will present in detail the ET-IGBT and FCE diode concepts, the full static and dynamic electrical test results and their impact for achieving higher levels of performance in future power electronics applications.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"1 1","pages":"1-11"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91248089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910875
Ivan Kravtzoff, P. Dessante, J. Vannier, P. Manfe, E. Mouni
Hybrids systems benefits are strongly dependent on the system design and the control strategy. The strategy choice strongly affect sizing and vice versa. This phenomenon is not always taken into account which leads to a non-optimal sizing of the system. This paper suggests a new method to optimize the design of hybrid power generator system from the point of view of fuel consumption taking into account this interaction. The main idea is to calculate the optimal control strategy of the system energy flux. Then, we can perform, for a given load profile, an optimization of the whole structure to find the best sizing.
{"title":"Obal optimization of hybrid electrical system to decrease fuel consumption or operating cost","authors":"Ivan Kravtzoff, P. Dessante, J. Vannier, P. Manfe, E. Mouni","doi":"10.1109/EPE.2014.6910875","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910875","url":null,"abstract":"Hybrids systems benefits are strongly dependent on the system design and the control strategy. The strategy choice strongly affect sizing and vice versa. This phenomenon is not always taken into account which leads to a non-optimal sizing of the system. This paper suggests a new method to optimize the design of hybrid power generator system from the point of view of fuel consumption taking into account this interaction. The main idea is to calculate the optimal control strategy of the system energy flux. Then, we can perform, for a given load profile, an optimization of the whole structure to find the best sizing.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"94 1","pages":"1-8"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72802208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910710
V. V. Subrahmanya Kumar Bhajana, P. Drábek, Martin Jara, B. Bednár
This paper proposed a new ZCS single phase ac-ac matrix converter for the traction applications. The proposed soft switching matrix converter is enhanced with an auxiliary resonant circuit in order to achieve the zero current switching for main bidirectional switches of the matrix converter. The main advantage of this proposed topology is soft switching of matrix converter to achieve switching loses limitation. This paper describes the operation of the proposed matrix converter, simulation analysis and experimental validation of the prototype for 50V-16.7Hz-100W-400Hz.
{"title":"A novel ZCS single phase matrix converter for traction applications","authors":"V. V. Subrahmanya Kumar Bhajana, P. Drábek, Martin Jara, B. Bednár","doi":"10.1109/EPE.2014.6910710","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910710","url":null,"abstract":"This paper proposed a new ZCS single phase ac-ac matrix converter for the traction applications. The proposed soft switching matrix converter is enhanced with an auxiliary resonant circuit in order to achieve the zero current switching for main bidirectional switches of the matrix converter. The main advantage of this proposed topology is soft switching of matrix converter to achieve switching loses limitation. This paper describes the operation of the proposed matrix converter, simulation analysis and experimental validation of the prototype for 50V-16.7Hz-100W-400Hz.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"182 1","pages":"1-8"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73200709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6911035
L. Kutt, E. Saarijarvi, M. Lehtonen, H. Mõlder, J. Niitsoo
Electric vehicle chargers are mostly power converters with power factor correction and waveform shaping features included. Different vehicle makes and models will likely have different charger control and topology. While the charger charging currents have generally low AC waveform distortions, including variety of chargers at the same time can provide even further lower harmonic currents. This is due to harmonic cancellation brought by different harmonic patterns of different chargers. The present paper analyzes the sine distortions and the sum of the harmonic currents of multiple harmonic sources of such type. The inputs for the analysis are the measurements of the commercial EV's harmonic charging current patterns. It will be shown that remarkable harmonic cancellation will be likely if different vehicle types are included in the pool of vehicles charging at the same time. The results presented here for the EV chargers would be valid also for other similar mains interface converters.
{"title":"Harmonic distortions of multiple power factor compensated EV chargers","authors":"L. Kutt, E. Saarijarvi, M. Lehtonen, H. Mõlder, J. Niitsoo","doi":"10.1109/EPE.2014.6911035","DOIUrl":"https://doi.org/10.1109/EPE.2014.6911035","url":null,"abstract":"Electric vehicle chargers are mostly power converters with power factor correction and waveform shaping features included. Different vehicle makes and models will likely have different charger control and topology. While the charger charging currents have generally low AC waveform distortions, including variety of chargers at the same time can provide even further lower harmonic currents. This is due to harmonic cancellation brought by different harmonic patterns of different chargers. The present paper analyzes the sine distortions and the sum of the harmonic currents of multiple harmonic sources of such type. The inputs for the analysis are the measurements of the commercial EV's harmonic charging current patterns. It will be shown that remarkable harmonic cancellation will be likely if different vehicle types are included in the pool of vehicles charging at the same time. The results presented here for the EV chargers would be valid also for other similar mains interface converters.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"3 1","pages":"1-7"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73341035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-29DOI: 10.1109/EPE.2014.6910686
R. Sudharshan Kaarthik, K. Gopakumar, J. Mathew, T. Undeland
Multilevel inverters with hexagonal voltage space vector structures have improved performance of induction motor drives compared to that of the two level inverters. Further reduction in the torque ripple on the motor shaft is possible by using multilevel dodecagonal (12-sided polygon) voltage space vector structures. The advantages of dodecagonal voltage space vector based PWM techniques are the complete elimination of fifth and seventh harmonics in phase voltages for the full modulation range and the extension of linear modulation range. This paper proposes an inverter circuit topology capable of generating multilevel dodecagonal voltage space vectors with symmetric triangles, by cascading two asymmetric three level inverters with isolated H-Bridges. This is made possible by proper selection of DC link voltages and the selection of resultant switching states for the inverters. In this paper, a simple PWM timing calculation method is proposed. Experimental results have also been presented in this paper to validate the proposed concept.
{"title":"An open-end winding IM drive with multilevel 12-sided polygonal vectors with symmetric triangles","authors":"R. Sudharshan Kaarthik, K. Gopakumar, J. Mathew, T. Undeland","doi":"10.1109/EPE.2014.6910686","DOIUrl":"https://doi.org/10.1109/EPE.2014.6910686","url":null,"abstract":"Multilevel inverters with hexagonal voltage space vector structures have improved performance of induction motor drives compared to that of the two level inverters. Further reduction in the torque ripple on the motor shaft is possible by using multilevel dodecagonal (12-sided polygon) voltage space vector structures. The advantages of dodecagonal voltage space vector based PWM techniques are the complete elimination of fifth and seventh harmonics in phase voltages for the full modulation range and the extension of linear modulation range. This paper proposes an inverter circuit topology capable of generating multilevel dodecagonal voltage space vectors with symmetric triangles, by cascading two asymmetric three level inverters with isolated H-Bridges. This is made possible by proper selection of DC link voltages and the selection of resultant switching states for the inverters. In this paper, a simple PWM timing calculation method is proposed. Experimental results have also been presented in this paper to validate the proposed concept.","PeriodicalId":6508,"journal":{"name":"2014 16th European Conference on Power Electronics and Applications","volume":"35 1","pages":"1-9"},"PeriodicalIF":0.0,"publicationDate":"2014-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73930579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：