Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351619
Pascal Seidel, Benjamin Knoop, Sebastian Schmale, Daniel Gregorek, S. Paul, Jochen Rust
Massive MIMO systems have become more popular in wireless communications due to their improved spectral efficiency compared to existing small-scale MIMO systems. However, current estimation methodes take too long for larger numbers of antennas. In this paper, a near-optimal iterative linear signal detection for massive MIMO is introduced exploiting the random projection method to approximate the channel matrix in a significantly lower dimensional space. This is then used as a preconditioner in the conjugate gradient least squares algorithm to enhance the convergence rate. For evaluation, different scenarios of spatial correlation in a massive MIMO system are considered. In contrast to other low-complexity signal detectors, our approach achieves excellent results in terms of robustness and determined latency.
{"title":"Random Subsampling based Signal Detection for Spatial Correlated Massive MIMO Channels","authors":"Pascal Seidel, Benjamin Knoop, Sebastian Schmale, Daniel Gregorek, S. Paul, Jochen Rust","doi":"10.1109/ISCAS.2018.8351619","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351619","url":null,"abstract":"Massive MIMO systems have become more popular in wireless communications due to their improved spectral efficiency compared to existing small-scale MIMO systems. However, current estimation methodes take too long for larger numbers of antennas. In this paper, a near-optimal iterative linear signal detection for massive MIMO is introduced exploiting the random projection method to approximate the channel matrix in a significantly lower dimensional space. This is then used as a preconditioner in the conjugate gradient least squares algorithm to enhance the convergence rate. For evaluation, different scenarios of spatial correlation in a massive MIMO system are considered. In contrast to other low-complexity signal detectors, our approach achieves excellent results in terms of robustness and determined latency.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"6 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87294728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351509
Raphaela Kreiser, M. Cartiglia, Julien N. P. Martel, J. Conradt, Yulia Sandamirskaya
Simultaneous localization and mapping (SLAM) is one of the core tasks of mobile autonomous robots. Looking for power efficient and embedded solutions for SLAM is an important challenge when building controllers for small and agile robots. Biological neural systems of even simple animals are until now unprecedented in their ability to localize themselves in an unknown environment. Neuromorphic engineering offers ultra low-power and compact computing hardware, in which biologically inspired neuronal architectures for SLAM can be realised. In this paper, we propose an on chip approach for one of the components of SLAM: path integration. Our solution takes inspiration from biology and uses motor command information to estimate the orientation of an agent solely in a spiking neural network. We realise this network on a neuromorphic device that implements artificial neurons and synapses with analog electronics. The neural network receives visual input from an event-based camera and uses this information to correct the on-chip spiking neurons estimate of the robot's orientation. This system can be easily integrated with other localization and mapping components on chip and is a step towards a fully neuromorphic SLAM.
{"title":"A Neuromorphic Approach to Path Integration: A Head-Direction Spiking Neural Network with Vision-driven Reset","authors":"Raphaela Kreiser, M. Cartiglia, Julien N. P. Martel, J. Conradt, Yulia Sandamirskaya","doi":"10.1109/ISCAS.2018.8351509","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351509","url":null,"abstract":"Simultaneous localization and mapping (SLAM) is one of the core tasks of mobile autonomous robots. Looking for power efficient and embedded solutions for SLAM is an important challenge when building controllers for small and agile robots. Biological neural systems of even simple animals are until now unprecedented in their ability to localize themselves in an unknown environment. Neuromorphic engineering offers ultra low-power and compact computing hardware, in which biologically inspired neuronal architectures for SLAM can be realised. In this paper, we propose an on chip approach for one of the components of SLAM: path integration. Our solution takes inspiration from biology and uses motor command information to estimate the orientation of an agent solely in a spiking neural network. We realise this network on a neuromorphic device that implements artificial neurons and synapses with analog electronics. The neural network receives visual input from an event-based camera and uses this information to correct the on-chip spiking neurons estimate of the robot's orientation. This system can be easily integrated with other localization and mapping components on chip and is a step towards a fully neuromorphic SLAM.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"66 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90364869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351339
Christian Kexel, M. Mälzer, J. Moll
In this paper, we demonstrate a numerical as well as an experimental proof of concept for digital wireless communication in damaged plate-like structures using ultrasonic guided waves. The feasibility of a simple on-off keying modulation scheme is shown which does not require advanced signal processing even though multiple wave modes are present. First, a simulation study aims at investigating multibit communication over an isotropic aluminum plate in the presence of a notch-type defect. Furthermore, we conduct an experimental study in which we observe communication for severe cut-like damages. The presented data communication scheme might be utilized in future structural health monitoring systems which may provide at the same time both data communication as well as the detection of defects.
{"title":"Guided Wave Based Acoustic Communications in Structural Health Monitoring Systems in the Presence of Structural Defects","authors":"Christian Kexel, M. Mälzer, J. Moll","doi":"10.1109/ISCAS.2018.8351339","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351339","url":null,"abstract":"In this paper, we demonstrate a numerical as well as an experimental proof of concept for digital wireless communication in damaged plate-like structures using ultrasonic guided waves. The feasibility of a simple on-off keying modulation scheme is shown which does not require advanced signal processing even though multiple wave modes are present. First, a simulation study aims at investigating multibit communication over an isotropic aluminum plate in the presence of a notch-type defect. Furthermore, we conduct an experimental study in which we observe communication for severe cut-like damages. The presented data communication scheme might be utilized in future structural health monitoring systems which may provide at the same time both data communication as well as the detection of defects.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"23 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90413913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8350907
P. Díez, I. Gabilondo, E. Alarcón, F. Moll
Traditional industry is experiencing a worldwide development with Industry 4.0. Wireless sensor networks (WSNs) have a main role in this revolution as an essential part of data acquisition. The way in which WSNs are powered is one of the main challenges to face if Industry wants to achieve the digital transformation. Energy harvesting technologies are one of the possible solutions to this challenge. The main purpose of this paper is to present a novel method to taxonomize knowledge in the field of mechanical energy harvesting in order to enhance the use of energy harvesting technologies for industrial applications. Additionally, the taxonomy allows to identify upcoming challenges for research purposes.
{"title":"A Comprehensive Method to Taxonomize Mechanical Energy Harvesting Technologies","authors":"P. Díez, I. Gabilondo, E. Alarcón, F. Moll","doi":"10.1109/ISCAS.2018.8350907","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8350907","url":null,"abstract":"Traditional industry is experiencing a worldwide development with Industry 4.0. Wireless sensor networks (WSNs) have a main role in this revolution as an essential part of data acquisition. The way in which WSNs are powered is one of the main challenges to face if Industry wants to achieve the digital transformation. Energy harvesting technologies are one of the possible solutions to this challenge. The main purpose of this paper is to present a novel method to taxonomize knowledge in the field of mechanical energy harvesting in order to enhance the use of energy harvesting technologies for industrial applications. Additionally, the taxonomy allows to identify upcoming challenges for research purposes.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"115 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85705443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351023
Hao Wang, Li Song, Rong Xie, Zhengyi Luo, Xiangwen Wang
This paper presents a masking effects based rate control scheme for high efficiency video coding (HEVC). Rate control is regarded as a very effective tool to improve the performance of video coding under the limited bandwidth. However, the state-of-the-art rate control algorithm based on R-X model ignores the characteristics of human visual system (HVS), which leads to poor performance in subjective quality. Moreover, some structural similarity (SSIM) or saliency based perceptual rate control algorithms only consider spatial characteristics. Since spatial and temporal visual masking effects can better reflect the characteristics of HVS, in this paper masking effects based perceptual factor for coding tree unit (CTU) is proposed, which takes both texture complexity and motion information into account. Then the proposed perceptual factor is utilized to guide bit allocation in CTU-level rate control. Experimental results show that the proposed scheme can effectively improve the coding performance compared with the R-λ algorithm.
{"title":"Masking Effects Based Rate Control Scheme for High Efficiency Video Coding","authors":"Hao Wang, Li Song, Rong Xie, Zhengyi Luo, Xiangwen Wang","doi":"10.1109/ISCAS.2018.8351023","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351023","url":null,"abstract":"This paper presents a masking effects based rate control scheme for high efficiency video coding (HEVC). Rate control is regarded as a very effective tool to improve the performance of video coding under the limited bandwidth. However, the state-of-the-art rate control algorithm based on R-X model ignores the characteristics of human visual system (HVS), which leads to poor performance in subjective quality. Moreover, some structural similarity (SSIM) or saliency based perceptual rate control algorithms only consider spatial characteristics. Since spatial and temporal visual masking effects can better reflect the characteristics of HVS, in this paper masking effects based perceptual factor for coding tree unit (CTU) is proposed, which takes both texture complexity and motion information into account. Then the proposed perceptual factor is utilized to guide bit allocation in CTU-level rate control. Experimental results show that the proposed scheme can effectively improve the coding performance compared with the R-λ algorithm.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"1 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73488350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351169
Hongshuai Zhang, Hong Zhang, Yan Song, Ruizhi Zhang
This paper presents a low-power and area efficient 10-bit SAR ADC with hybrid capacitive-MOS consisting of a 7-bit MSB capacitive DAC (CDAC) and a 3-bit LSB MOS DAC, which consumes less power and much smaller chip area than a pure CDAC. Instead of using a string of 8 MOS transistors to control one unit capacitor, the 3-bit LSB MOS DAC is realized by a MOS string with 4 native MOS transistors to control 2 unit capacitors, which allows higher voltage drop and more reliable operation for each unit MOS. The overall energy consumption of the proposed CAP-MOS DAC is reduced by 56.2% compared with a Vcm-based 10-bit pure CDAC. Under a 200-kS/s conversion rate, the prototype 10-bit SAR ADC is implemented in a 0.18-μm CMOS technology, showing an SNDR/ SFDR of 56.91 dB/68.56 dB at 99-kHz input under a 0.6-V power-supply, while consuming 1.76 μW at 200 kS/s for a FoM of 15.38 fJ/step. The peak DNL and INL are +0.27/−0.21 LSB and +0.43/−0.45 LSB, respectively. The ADC occupies a small active area of 0.097 mm2.
本文提出了一种低功耗、面积高效的10位混合电容-MOS SAR ADC，该ADC由7位MSB电容DAC (CDAC)和3位LSB MOS DAC组成，比纯CDAC功耗更低，芯片面积更小。3位LSB MOS DAC不是使用一串8个MOS晶体管来控制一个单位电容器，而是使用一串4个原生MOS晶体管来控制2个单位电容器，从而使每个单位MOS具有更高的压降和更可靠的工作。与基于vcm的10位纯CDAC相比，所提出的CAP-MOS DAC的总能耗降低了56.2%。在200-kS/s转换速率下，原型10位SAR ADC采用0.18 μm CMOS技术实现，在0.6 v电源下，在99-kHz输入时的SNDR/ SFDR为56.91 dB/68.56 dB，在200 kS/s时的FoM为15.38 fJ/步长，功耗为1.76 μW。峰值DNL和INL分别为+0.27/ - 0.21 LSB和+0.43/ - 0.45 LSB。ADC占用0.097 mm2的小有效面积。
{"title":"A 10-bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications","authors":"Hongshuai Zhang, Hong Zhang, Yan Song, Ruizhi Zhang","doi":"10.1109/ISCAS.2018.8351169","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351169","url":null,"abstract":"This paper presents a low-power and area efficient 10-bit SAR ADC with hybrid capacitive-MOS consisting of a 7-bit MSB capacitive DAC (CDAC) and a 3-bit LSB MOS DAC, which consumes less power and much smaller chip area than a pure CDAC. Instead of using a string of 8 MOS transistors to control one unit capacitor, the 3-bit LSB MOS DAC is realized by a MOS string with 4 native MOS transistors to control 2 unit capacitors, which allows higher voltage drop and more reliable operation for each unit MOS. The overall energy consumption of the proposed CAP-MOS DAC is reduced by 56.2% compared with a Vcm-based 10-bit pure CDAC. Under a 200-kS/s conversion rate, the prototype 10-bit SAR ADC is implemented in a 0.18-μm CMOS technology, showing an SNDR/ SFDR of 56.91 dB/68.56 dB at 99-kHz input under a 0.6-V power-supply, while consuming 1.76 μW at 200 kS/s for a FoM of 15.38 fJ/step. The peak DNL and INL are +0.27/−0.21 LSB and +0.43/−0.45 LSB, respectively. The ADC occupies a small active area of 0.097 mm2.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"16 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85879253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351864
F. Pêcheux, C. Grimm, Torsten Mähne, M. Barnasconi, K. Einwich
This paper presents the past, present, and perspectives of the SystemC AMS standard as well as several commercial and academic frameworks gravitating around it that have been used to develop use cases in various cyber physical domains. After an overview of the standard, two frameworks are described: the COSIDE environment that supports the virtual prototyping of embedded HW/SW systems and its interaction with AMS circuits. Second, the SICYPHOS framework that integrates SystemC AMS into the overall system development ecosystem. By an example we give details how SystemC AMS can be coupled with other simulation tools (OpenModelica) while keeping simulation speed and accuracy high. Another example shows how SystemC AMS can be used as foundation technology to create specialized user-defined models of computation (MoC).
{"title":"SystemC AMS Based Frameworks for Virtual Prototyping of Heterogeneous Systems","authors":"F. Pêcheux, C. Grimm, Torsten Mähne, M. Barnasconi, K. Einwich","doi":"10.1109/ISCAS.2018.8351864","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351864","url":null,"abstract":"This paper presents the past, present, and perspectives of the SystemC AMS standard as well as several commercial and academic frameworks gravitating around it that have been used to develop use cases in various cyber physical domains. After an overview of the standard, two frameworks are described: the COSIDE environment that supports the virtual prototyping of embedded HW/SW systems and its interaction with AMS circuits. Second, the SICYPHOS framework that integrates SystemC AMS into the overall system development ecosystem. By an example we give details how SystemC AMS can be coupled with other simulation tools (OpenModelica) while keeping simulation speed and accuracy high. Another example shows how SystemC AMS can be used as foundation technology to create specialized user-defined models of computation (MoC).","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"7 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86109239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351650
Ka-Meng Lei, Pui-in Mak, R. Martins
Wearable and sensing electronics are evolving towards energy harvesting from the environment (e.g. thermal and solar energy). Ultra-low-voltage (ULV) circuits that allow direct-powering by sub-0.5 V energy sources can maximize the power efficiency. This work is a 0.4 V 65 nm CMOS relaxation oscillator with bootstrapped logic gates and outputs. The bootstrapped logic gates enable an output swing of 1.15 V surmounting the adverse effect of ULV digital circuits without extra voltage source. The ULV comparator with bulk-driven-inputs shows an 18 dB gain with 3 cascaded stages. Also, featuring a background delay-time cancellation scheme, the 3.3 MHz relaxation oscillator with built-in calibration exhibits a frequency deviation of ±0.71% and ±0.57% against temperature (−30 to 100 °C) and voltage (0.36 to 0.44 V) variations, respectively, from Monte-Carlo simulations (N=30). The simulated power consumption is 6.4 μW, resulting in an energy efficiency of 1.9 pJ per cycle.
{"title":"A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over −30 to 100 °C for Wearable and Sensing Applications","authors":"Ka-Meng Lei, Pui-in Mak, R. Martins","doi":"10.1109/ISCAS.2018.8351650","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351650","url":null,"abstract":"Wearable and sensing electronics are evolving towards energy harvesting from the environment (e.g. thermal and solar energy). Ultra-low-voltage (ULV) circuits that allow direct-powering by sub-0.5 V energy sources can maximize the power efficiency. This work is a 0.4 V 65 nm CMOS relaxation oscillator with bootstrapped logic gates and outputs. The bootstrapped logic gates enable an output swing of 1.15 V surmounting the adverse effect of ULV digital circuits without extra voltage source. The ULV comparator with bulk-driven-inputs shows an 18 dB gain with 3 cascaded stages. Also, featuring a background delay-time cancellation scheme, the 3.3 MHz relaxation oscillator with built-in calibration exhibits a frequency deviation of ±0.71% and ±0.57% against temperature (−30 to 100 °C) and voltage (0.36 to 0.44 V) variations, respectively, from Monte-Carlo simulations (N=30). The simulated power consumption is 6.4 μW, resulting in an energy efficiency of 1.9 pJ per cycle.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"19 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81228065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351586
Alfio Di Mauro, D. Rossi, A. Pullini, P. Flatresse, L. Benini
Energy efficiency is a crucial aspect in modern SoCs. Common strategies like aggressive voltage scaling and parallel processing have enabled major improvements in active energy efficiency. However, the big impact of process variations, as well as the temperature sensitivity of devices operating in near threshold force digital designers to adopt very conservative margins for timing closure.
{"title":"Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology","authors":"Alfio Di Mauro, D. Rossi, A. Pullini, P. Flatresse, L. Benini","doi":"10.1109/ISCAS.2018.8351586","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351586","url":null,"abstract":"Energy efficiency is a crucial aspect in modern SoCs. Common strategies like aggressive voltage scaling and parallel processing have enabled major improvements in active energy efficiency. However, the big impact of process variations, as well as the temperature sensitivity of devices operating in near threshold force digital designers to adopt very conservative margins for timing closure.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"19 1","pages":"1-1"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85158156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351419
Ji Hoon Hyun, Long Huang, D. Ha
This paper presents a system for vibration and thermal energy harvesting from automobiles, and it intends to power wireless sensor nodes. Two main features of the proposed circuit are impedance matching to extract maximum power and wake-up to incorporate sleep mode. Two separate buck-boost converters in discontinuous conduction mode are used for impedance matching. A wake-up circuit senses the vibration energy generated by a piezoelectric cantilever (PZT). When a car is turned off, the wake-up circuit deactivates the two converters, and the entire circuit goes into sleep mode to save power. The proposed circuit charges a capacitor to power a wireless sensor node, and is able to cold start. The proposed circuit is prototyped with discrete components. Experimental results show that the proposed system harvests peak power of 3.4 mW and these results also demonstrate that a wireless sensor node can be powered by the proposed system.
{"title":"Vibration and Thermal Energy Harvesting System for Automobiles with Impedance Matching and Wake-up","authors":"Ji Hoon Hyun, Long Huang, D. Ha","doi":"10.1109/ISCAS.2018.8351419","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351419","url":null,"abstract":"This paper presents a system for vibration and thermal energy harvesting from automobiles, and it intends to power wireless sensor nodes. Two main features of the proposed circuit are impedance matching to extract maximum power and wake-up to incorporate sleep mode. Two separate buck-boost converters in discontinuous conduction mode are used for impedance matching. A wake-up circuit senses the vibration energy generated by a piezoelectric cantilever (PZT). When a car is turned off, the wake-up circuit deactivates the two converters, and the entire circuit goes into sleep mode to save power. The proposed circuit charges a capacitor to power a wireless sensor node, and is able to cold start. The proposed circuit is prototyped with discrete components. Experimental results show that the proposed system harvests peak power of 3.4 mW and these results also demonstrate that a wireless sensor node can be powered by the proposed system.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"51 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90815531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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