Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351619
Pascal Seidel, Benjamin Knoop, Sebastian Schmale, Daniel Gregorek, S. Paul, Jochen Rust
Massive MIMO systems have become more popular in wireless communications due to their improved spectral efficiency compared to existing small-scale MIMO systems. However, current estimation methodes take too long for larger numbers of antennas. In this paper, a near-optimal iterative linear signal detection for massive MIMO is introduced exploiting the random projection method to approximate the channel matrix in a significantly lower dimensional space. This is then used as a preconditioner in the conjugate gradient least squares algorithm to enhance the convergence rate. For evaluation, different scenarios of spatial correlation in a massive MIMO system are considered. In contrast to other low-complexity signal detectors, our approach achieves excellent results in terms of robustness and determined latency.
{"title":"Random Subsampling based Signal Detection for Spatial Correlated Massive MIMO Channels","authors":"Pascal Seidel, Benjamin Knoop, Sebastian Schmale, Daniel Gregorek, S. Paul, Jochen Rust","doi":"10.1109/ISCAS.2018.8351619","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351619","url":null,"abstract":"Massive MIMO systems have become more popular in wireless communications due to their improved spectral efficiency compared to existing small-scale MIMO systems. However, current estimation methodes take too long for larger numbers of antennas. In this paper, a near-optimal iterative linear signal detection for massive MIMO is introduced exploiting the random projection method to approximate the channel matrix in a significantly lower dimensional space. This is then used as a preconditioner in the conjugate gradient least squares algorithm to enhance the convergence rate. For evaluation, different scenarios of spatial correlation in a massive MIMO system are considered. In contrast to other low-complexity signal detectors, our approach achieves excellent results in terms of robustness and determined latency.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"6 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87294728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351509
Raphaela Kreiser, M. Cartiglia, Julien N. P. Martel, J. Conradt, Yulia Sandamirskaya
Simultaneous localization and mapping (SLAM) is one of the core tasks of mobile autonomous robots. Looking for power efficient and embedded solutions for SLAM is an important challenge when building controllers for small and agile robots. Biological neural systems of even simple animals are until now unprecedented in their ability to localize themselves in an unknown environment. Neuromorphic engineering offers ultra low-power and compact computing hardware, in which biologically inspired neuronal architectures for SLAM can be realised. In this paper, we propose an on chip approach for one of the components of SLAM: path integration. Our solution takes inspiration from biology and uses motor command information to estimate the orientation of an agent solely in a spiking neural network. We realise this network on a neuromorphic device that implements artificial neurons and synapses with analog electronics. The neural network receives visual input from an event-based camera and uses this information to correct the on-chip spiking neurons estimate of the robot's orientation. This system can be easily integrated with other localization and mapping components on chip and is a step towards a fully neuromorphic SLAM.
{"title":"A Neuromorphic Approach to Path Integration: A Head-Direction Spiking Neural Network with Vision-driven Reset","authors":"Raphaela Kreiser, M. Cartiglia, Julien N. P. Martel, J. Conradt, Yulia Sandamirskaya","doi":"10.1109/ISCAS.2018.8351509","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351509","url":null,"abstract":"Simultaneous localization and mapping (SLAM) is one of the core tasks of mobile autonomous robots. Looking for power efficient and embedded solutions for SLAM is an important challenge when building controllers for small and agile robots. Biological neural systems of even simple animals are until now unprecedented in their ability to localize themselves in an unknown environment. Neuromorphic engineering offers ultra low-power and compact computing hardware, in which biologically inspired neuronal architectures for SLAM can be realised. In this paper, we propose an on chip approach for one of the components of SLAM: path integration. Our solution takes inspiration from biology and uses motor command information to estimate the orientation of an agent solely in a spiking neural network. We realise this network on a neuromorphic device that implements artificial neurons and synapses with analog electronics. The neural network receives visual input from an event-based camera and uses this information to correct the on-chip spiking neurons estimate of the robot's orientation. This system can be easily integrated with other localization and mapping components on chip and is a step towards a fully neuromorphic SLAM.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"66 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90364869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351339
Christian Kexel, M. Mälzer, J. Moll
In this paper, we demonstrate a numerical as well as an experimental proof of concept for digital wireless communication in damaged plate-like structures using ultrasonic guided waves. The feasibility of a simple on-off keying modulation scheme is shown which does not require advanced signal processing even though multiple wave modes are present. First, a simulation study aims at investigating multibit communication over an isotropic aluminum plate in the presence of a notch-type defect. Furthermore, we conduct an experimental study in which we observe communication for severe cut-like damages. The presented data communication scheme might be utilized in future structural health monitoring systems which may provide at the same time both data communication as well as the detection of defects.
{"title":"Guided Wave Based Acoustic Communications in Structural Health Monitoring Systems in the Presence of Structural Defects","authors":"Christian Kexel, M. Mälzer, J. Moll","doi":"10.1109/ISCAS.2018.8351339","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351339","url":null,"abstract":"In this paper, we demonstrate a numerical as well as an experimental proof of concept for digital wireless communication in damaged plate-like structures using ultrasonic guided waves. The feasibility of a simple on-off keying modulation scheme is shown which does not require advanced signal processing even though multiple wave modes are present. First, a simulation study aims at investigating multibit communication over an isotropic aluminum plate in the presence of a notch-type defect. Furthermore, we conduct an experimental study in which we observe communication for severe cut-like damages. The presented data communication scheme might be utilized in future structural health monitoring systems which may provide at the same time both data communication as well as the detection of defects.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"23 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90413913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8350907
P. Díez, I. Gabilondo, E. Alarcón, F. Moll
Traditional industry is experiencing a worldwide development with Industry 4.0. Wireless sensor networks (WSNs) have a main role in this revolution as an essential part of data acquisition. The way in which WSNs are powered is one of the main challenges to face if Industry wants to achieve the digital transformation. Energy harvesting technologies are one of the possible solutions to this challenge. The main purpose of this paper is to present a novel method to taxonomize knowledge in the field of mechanical energy harvesting in order to enhance the use of energy harvesting technologies for industrial applications. Additionally, the taxonomy allows to identify upcoming challenges for research purposes.
{"title":"A Comprehensive Method to Taxonomize Mechanical Energy Harvesting Technologies","authors":"P. Díez, I. Gabilondo, E. Alarcón, F. Moll","doi":"10.1109/ISCAS.2018.8350907","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8350907","url":null,"abstract":"Traditional industry is experiencing a worldwide development with Industry 4.0. Wireless sensor networks (WSNs) have a main role in this revolution as an essential part of data acquisition. The way in which WSNs are powered is one of the main challenges to face if Industry wants to achieve the digital transformation. Energy harvesting technologies are one of the possible solutions to this challenge. The main purpose of this paper is to present a novel method to taxonomize knowledge in the field of mechanical energy harvesting in order to enhance the use of energy harvesting technologies for industrial applications. Additionally, the taxonomy allows to identify upcoming challenges for research purposes.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"115 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85705443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351218
Mark Lipski, Yin Li, M. Misra, S. Gregori
This paper presents a MOS active diode circuit that is suitable for energy harvesting applications. The proposed active diode has a minimized reverse leakage and achieves a low forward voltage. The design is implemented and simulated in TSMC 65 nm CMOS technology. Compared to the diode-connected MOS transistor, which has a forward voltage around 300 to 400 mV, the proposed diode demonstrates a near zero forward voltage with minimum supply voltage. The application of the proposed design is demonstrated through a regenerative energy harvester, and the performance is simulated and compared with measurement results from a harvester with regular diodes.
{"title":"A Low Forward Bias Active Diode Circuit for Electrostatic Energy Harvesters","authors":"Mark Lipski, Yin Li, M. Misra, S. Gregori","doi":"10.1109/ISCAS.2018.8351218","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351218","url":null,"abstract":"This paper presents a MOS active diode circuit that is suitable for energy harvesting applications. The proposed active diode has a minimized reverse leakage and achieves a low forward voltage. The design is implemented and simulated in TSMC 65 nm CMOS technology. Compared to the diode-connected MOS transistor, which has a forward voltage around 300 to 400 mV, the proposed diode demonstrates a near zero forward voltage with minimum supply voltage. The application of the proposed design is demonstrated through a regenerative energy harvester, and the performance is simulated and compared with measurement results from a harvester with regular diodes.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"14 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73007041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351023
Hao Wang, Li Song, Rong Xie, Zhengyi Luo, Xiangwen Wang
This paper presents a masking effects based rate control scheme for high efficiency video coding (HEVC). Rate control is regarded as a very effective tool to improve the performance of video coding under the limited bandwidth. However, the state-of-the-art rate control algorithm based on R-X model ignores the characteristics of human visual system (HVS), which leads to poor performance in subjective quality. Moreover, some structural similarity (SSIM) or saliency based perceptual rate control algorithms only consider spatial characteristics. Since spatial and temporal visual masking effects can better reflect the characteristics of HVS, in this paper masking effects based perceptual factor for coding tree unit (CTU) is proposed, which takes both texture complexity and motion information into account. Then the proposed perceptual factor is utilized to guide bit allocation in CTU-level rate control. Experimental results show that the proposed scheme can effectively improve the coding performance compared with the R-λ algorithm.
{"title":"Masking Effects Based Rate Control Scheme for High Efficiency Video Coding","authors":"Hao Wang, Li Song, Rong Xie, Zhengyi Luo, Xiangwen Wang","doi":"10.1109/ISCAS.2018.8351023","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351023","url":null,"abstract":"This paper presents a masking effects based rate control scheme for high efficiency video coding (HEVC). Rate control is regarded as a very effective tool to improve the performance of video coding under the limited bandwidth. However, the state-of-the-art rate control algorithm based on R-X model ignores the characteristics of human visual system (HVS), which leads to poor performance in subjective quality. Moreover, some structural similarity (SSIM) or saliency based perceptual rate control algorithms only consider spatial characteristics. Since spatial and temporal visual masking effects can better reflect the characteristics of HVS, in this paper masking effects based perceptual factor for coding tree unit (CTU) is proposed, which takes both texture complexity and motion information into account. Then the proposed perceptual factor is utilized to guide bit allocation in CTU-level rate control. Experimental results show that the proposed scheme can effectively improve the coding performance compared with the R-λ algorithm.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"1 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73488350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351673
Thomas Abbey, Alexandru Serb, N. Vasilakis, L. Michalas, A. Khiat, S. Stathopoulos, T. Prodromakis
Environmental conditions can greatly affect the performance of semiconductor devices. Great sophistication has thus gone into developing versatile systems that allow benchmarking of operating characteristics under a variety of temperature and humidity conditions. Recently, Resistive Random Access Memory (RRAM) technologies, also known as memristors, have received a lot of attention for memory and computing applications. This interest is showcased by several reports on technology and applications developments, as well as developments on the underpinning infrastructure, i.e. models and characterization tools, that renders such technologies useful. Several international research groups and companies are nowadays using ArC One™, a versatile instrument that allows en masse characterization of RRAM technologies, as has been presented previously in several demo sessions at ISCAS. In this work, we present a newly developed module that expands ArC One™ capabilities through incorporating an environmental control system. The proposed module condenses the functionality of significantly larger, more complex and higher cost systems into a low cost, small form-factor and user friendly desktop-operated device. The system allows for temperature, atmospheric composition and humidity control and can be used for studying the impact of such settings on the electrical characteristics of RRAM technologies.
{"title":"An Embedded Environmental Control Micro-chamber System for RRAM Memristor Characterisation","authors":"Thomas Abbey, Alexandru Serb, N. Vasilakis, L. Michalas, A. Khiat, S. Stathopoulos, T. Prodromakis","doi":"10.1109/ISCAS.2018.8351673","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351673","url":null,"abstract":"Environmental conditions can greatly affect the performance of semiconductor devices. Great sophistication has thus gone into developing versatile systems that allow benchmarking of operating characteristics under a variety of temperature and humidity conditions. Recently, Resistive Random Access Memory (RRAM) technologies, also known as memristors, have received a lot of attention for memory and computing applications. This interest is showcased by several reports on technology and applications developments, as well as developments on the underpinning infrastructure, i.e. models and characterization tools, that renders such technologies useful. Several international research groups and companies are nowadays using ArC One™, a versatile instrument that allows en masse characterization of RRAM technologies, as has been presented previously in several demo sessions at ISCAS. In this work, we present a newly developed module that expands ArC One™ capabilities through incorporating an environmental control system. The proposed module condenses the functionality of significantly larger, more complex and higher cost systems into a low cost, small form-factor and user friendly desktop-operated device. The system allows for temperature, atmospheric composition and humidity control and can be used for studying the impact of such settings on the electrical characteristics of RRAM technologies.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"2 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73653123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351220
Osamu Watanabe, H. Kobayashi, H. Kiya
A novel method using the histogram packing technique with the two-layer coding having the backward compatibility to the legacy JPEG for base layer is proposed in this paper. The histogram sparseness of HDR images is discussed and it is pointed out that the histogram packing technique considering the sparseness is able to improve the performance of lossless compression for HDR images. The experimental results demonstrate that not only the proposed method has a higher compression performance than that of the JPEG XT part 8, but also there is no need to determine image-dependent parameter values for good compression performance. Moreover, the base layer produced by the proposed method has the backward compatibility to the well known legacy JPEG standard.
本文提出了一种利用直方图填充技术进行双层编码的新方法，该方法对底层的传统JPEG具有向后兼容性。讨论了HDR图像的直方图稀疏性，指出考虑稀疏性的直方图填充技术能够提高HDR图像的无损压缩性能。实验结果表明，该方法不仅具有比JPEG XT part 8更高的压缩性能，而且无需确定与图像相关的参数值即可获得良好的压缩性能。此外，该方法生成的基础层对众所周知的传统JPEG标准具有向后兼容性。
{"title":"Lossless Two-Layer Coding using Histogram Packing Technique for HDR Images","authors":"Osamu Watanabe, H. Kobayashi, H. Kiya","doi":"10.1109/ISCAS.2018.8351220","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351220","url":null,"abstract":"A novel method using the histogram packing technique with the two-layer coding having the backward compatibility to the legacy JPEG for base layer is proposed in this paper. The histogram sparseness of HDR images is discussed and it is pointed out that the histogram packing technique considering the sparseness is able to improve the performance of lossless compression for HDR images. The experimental results demonstrate that not only the proposed method has a higher compression performance than that of the JPEG XT part 8, but also there is no need to determine image-dependent parameter values for good compression performance. Moreover, the base layer produced by the proposed method has the backward compatibility to the well known legacy JPEG standard.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"99 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74633936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8350986
A. Queiroz
This paper presents a systematic procedure for the formulation of the equations required for the analysis of electrostatic generators used for energy harvesting, considering specially the behavior when operating at steady state connected to a DC/DC converter. The generators are considered composed of variable and fixed capacitors, diodes, a switch representing the converter, and may include voltage sources too. The required equations are obtained in matrix form, and usually can be solved algebraically. Examples are then presented, with the application of the procedure in the analysis of several structures, most not previously analyzed in detail.
{"title":"Steady-State Analysis of Electronic Electrostatic Generators","authors":"A. Queiroz","doi":"10.1109/ISCAS.2018.8350986","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8350986","url":null,"abstract":"This paper presents a systematic procedure for the formulation of the equations required for the analysis of electrostatic generators used for energy harvesting, considering specially the behavior when operating at steady state connected to a DC/DC converter. The generators are considered composed of variable and fixed capacitors, diodes, a switch representing the converter, and may include voltage sources too. The required equations are obtained in matrix form, and usually can be solved algebraically. Examples are then presented, with the application of the procedure in the analysis of several structures, most not previously analyzed in detail.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"1 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77620254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-27DOI: 10.1109/ISCAS.2018.8351150
Jeferson F. Chaves, M. A. Ribeiro, F. Sill, O. V. Neto
Energy dissipation of future integrated systems, consisting of a myriad of devices, is a challenge that cannot be solved solely by emerging technologies and process improvements. Even though approaches like Field-Coupled Nanocomputing allow computations near the fundamental energy limits, there is a demand for strategies that enable the recycling of bits' energy to avoid thermalization of information. In this direction, we propose a new kind of partially reversible systems by exploiting fan-outs in logic networks. We have also introduced a computationally efficient method to evaluate the gain obtained by our strategy. Simulation results for state-of-the-art benchmarks indicate an average reduction of the fundamental energy limit by 17% without affecting the delay. If delay is not the main concern, the average reduction reaches even 51%. To the best of our knowledge, this work presents the first post-synthesis strategy to reduce fundamental energy limits for Field-Coupled Nanocomputing circuits.
{"title":"Enhancing Fundamental Energy Limits of Field-Coupled Nanocomputing Circuits","authors":"Jeferson F. Chaves, M. A. Ribeiro, F. Sill, O. V. Neto","doi":"10.1109/ISCAS.2018.8351150","DOIUrl":"https://doi.org/10.1109/ISCAS.2018.8351150","url":null,"abstract":"Energy dissipation of future integrated systems, consisting of a myriad of devices, is a challenge that cannot be solved solely by emerging technologies and process improvements. Even though approaches like Field-Coupled Nanocomputing allow computations near the fundamental energy limits, there is a demand for strategies that enable the recycling of bits' energy to avoid thermalization of information. In this direction, we propose a new kind of partially reversible systems by exploiting fan-outs in logic networks. We have also introduced a computationally efficient method to evaluate the gain obtained by our strategy. Simulation results for state-of-the-art benchmarks indicate an average reduction of the fundamental energy limit by 17% without affecting the delay. If delay is not the main concern, the average reduction reaches even 51%. To the best of our knowledge, this work presents the first post-synthesis strategy to reduce fundamental energy limits for Field-Coupled Nanocomputing circuits.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"30 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77432640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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