Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512831
Shan Miao, Faqiang Wang, Xikui Ma
In this paper, a novel buck-boost converter with the voltage gain of D2/(1-D) is proposed. Besides high step-down gain, the merits of the proposed buck-boost converter include that the input terminal and the output terminal share the same ground, the output voltage is positive, and the voltage stresses on the power switches and the diodes are low. The operating principles, the steady-state analyses, and the small-signal model are presented and analyzed. Finally, the PSIM simulations and the circuit experiments are implemented to validate the proposed buck-boost converter.
{"title":"A novel buck-boost converter with low stresses on switches and diodes","authors":"Shan Miao, Faqiang Wang, Xikui Ma","doi":"10.1109/IPEMC.2016.7512831","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512831","url":null,"abstract":"In this paper, a novel buck-boost converter with the voltage gain of D2/(1-D) is proposed. Besides high step-down gain, the merits of the proposed buck-boost converter include that the input terminal and the output terminal share the same ground, the output voltage is positive, and the voltage stresses on the power switches and the diodes are low. The operating principles, the steady-state analyses, and the small-signal model are presented and analyzed. Finally, the PSIM simulations and the circuit experiments are implemented to validate the proposed buck-boost converter.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"27 1","pages":"3344-3347"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82302756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512436
Yongchang Zhang, Yubin Peng, Bo Xia
Conventional Finite Control Set Model Predictive Power Control (FCS-MPPC) has been in constant development, especially in the two-level AC/DC converter, because it has many advantages such as good steady state performance, quick dynamic response and flexibility in the definition of control objectives. However, single voltage vector applied in one control period is hard to reduce the power ripples to a minimal value. In order to resolve this issues, the concept of duty cycle control was introduced in FCS-MPPC, which helps to achieve further power ripple reduction. Although better steady state performance is acquired, the control complexity and computational burden are increased when selecting the best voltage vector. In view of this, this paper presents a efficient MPPC(E-MPPC) with optimal duty cycle. The method called E-MPPC only requires one prediction to find the best voltage vector and its duration is determined base on the principle of error minimization of converter voltage vector. Different from prior FCS-MPPC, the computation load of E-MPPC with optimal duty cycle is greatly reduced while the control performance is not affected. Furthermore, the relationship between E-MPPC and FCS-MPPC with duty cycle control is studied and it is found that in some cases, the both methods are completely equivalent. Experimental results on two-level AC/DC converter are presented to confirm good performance and application of the proposed method.
{"title":"Efficient model predictive control with optimal duty cycle for power converters","authors":"Yongchang Zhang, Yubin Peng, Bo Xia","doi":"10.1109/IPEMC.2016.7512436","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512436","url":null,"abstract":"Conventional Finite Control Set Model Predictive Power Control (FCS-MPPC) has been in constant development, especially in the two-level AC/DC converter, because it has many advantages such as good steady state performance, quick dynamic response and flexibility in the definition of control objectives. However, single voltage vector applied in one control period is hard to reduce the power ripples to a minimal value. In order to resolve this issues, the concept of duty cycle control was introduced in FCS-MPPC, which helps to achieve further power ripple reduction. Although better steady state performance is acquired, the control complexity and computational burden are increased when selecting the best voltage vector. In view of this, this paper presents a efficient MPPC(E-MPPC) with optimal duty cycle. The method called E-MPPC only requires one prediction to find the best voltage vector and its duration is determined base on the principle of error minimization of converter voltage vector. Different from prior FCS-MPPC, the computation load of E-MPPC with optimal duty cycle is greatly reduced while the control performance is not affected. Furthermore, the relationship between E-MPPC and FCS-MPPC with duty cycle control is studied and it is found that in some cases, the both methods are completely equivalent. Experimental results on two-level AC/DC converter are presented to confirm good performance and application of the proposed method.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"30 1","pages":"1076-1083"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82398606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512303
Hongbo Zhao, Guohua Zhou, Hongyan Wang, Ping Yang
In this paper, the nonlinear modulation, including nonlinear single-edge modulation (NSEM) and nonlinear dual-edge modulation (NDEM), for voltage-mode controlled switching converters are proposed to provide fast input transient performance, and the corresponding nonlinear modulation circuits are presented. The gain of nonlinear modulation circuit plays an important role in keeping the output voltage stable and obtaining excellent input transient response. The method to deduce the nonlinear gain is general and applicable for different switching converters. Moreover, the simulation results show that voltage-mode controlled buck converter with NDEM benefits with better input transient response and steady state performance than improved one-cycle control and peak current control when input voltage varies. In addition, voltage-mode control with NDEM also presents much better input transient performance than conventional voltage-mode control in boost converter.
{"title":"Nonlinear modulation for voltage-mode controlled switching converters with fast input transient performance","authors":"Hongbo Zhao, Guohua Zhou, Hongyan Wang, Ping Yang","doi":"10.1109/IPEMC.2016.7512303","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512303","url":null,"abstract":"In this paper, the nonlinear modulation, including nonlinear single-edge modulation (NSEM) and nonlinear dual-edge modulation (NDEM), for voltage-mode controlled switching converters are proposed to provide fast input transient performance, and the corresponding nonlinear modulation circuits are presented. The gain of nonlinear modulation circuit plays an important role in keeping the output voltage stable and obtaining excellent input transient response. The method to deduce the nonlinear gain is general and applicable for different switching converters. Moreover, the simulation results show that voltage-mode controlled buck converter with NDEM benefits with better input transient response and steady state performance than improved one-cycle control and peak current control when input voltage varies. In addition, voltage-mode control with NDEM also presents much better input transient performance than conventional voltage-mode control in boost converter.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"67 1","pages":"305-309"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76521377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512873
Yuncheng Wang, Xin Chen, Yang Zhang, Jie Chen, Chunying Gong
In a distributed generation system, the stability of grid-connected inverters is directly related to the reliable operation of the grid-connected system. The impedance-based analysis method can be employed to effectively study the interaction stability between grid-connected inverters and grid, which means that it is necessary to obtain the impedance modeling of grid-connected inverters for the analysis of impedance stability. Based on the three-phase LCL-type grid-connected inverter, the harmonic linearization method was adopted in this paper to analyze the frequency characteristic of Phase-Locked Loop (PLL), and a design approach of PLL regulator parameters was proposed. Meanwhile, the impacts of the factors that include PLL and digital control delay on the impedance characteristic were considered, and the positive-sequence and negative-sequence impedance model of the grid-connected inverter was built by combining the harmonic linearization and symmetrical component methods. Then, the frequency characteristic of PLL was verified by the simulation results and the output impedance model of the grid-connected inverter was verified by the experimental results, which effectively proved the correctness of the theoretical analysis. Finally, based on the output impedance model of the grid-connected inverter, the impedance-based analysis method was adopted to make a theoretical analysis and experiment validation of the interaction stability of the grid-connected system.
{"title":"Impedance modeling of three-phase grid-connected inverters and analysis of interaction stability in grid-connected system","authors":"Yuncheng Wang, Xin Chen, Yang Zhang, Jie Chen, Chunying Gong","doi":"10.1109/IPEMC.2016.7512873","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512873","url":null,"abstract":"In a distributed generation system, the stability of grid-connected inverters is directly related to the reliable operation of the grid-connected system. The impedance-based analysis method can be employed to effectively study the interaction stability between grid-connected inverters and grid, which means that it is necessary to obtain the impedance modeling of grid-connected inverters for the analysis of impedance stability. Based on the three-phase LCL-type grid-connected inverter, the harmonic linearization method was adopted in this paper to analyze the frequency characteristic of Phase-Locked Loop (PLL), and a design approach of PLL regulator parameters was proposed. Meanwhile, the impacts of the factors that include PLL and digital control delay on the impedance characteristic were considered, and the positive-sequence and negative-sequence impedance model of the grid-connected inverter was built by combining the harmonic linearization and symmetrical component methods. Then, the frequency characteristic of PLL was verified by the simulation results and the output impedance model of the grid-connected inverter was verified by the experimental results, which effectively proved the correctness of the theoretical analysis. Finally, based on the output impedance model of the grid-connected inverter, the impedance-based analysis method was adopted to make a theoretical analysis and experiment validation of the interaction stability of the grid-connected system.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"75 1","pages":"3606-3612"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76081464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512362
Kota Miyata, Kota Tsuchiya, T. Yokoyama
A new digital control method for permanent magnet synchronous motor based on deadbeat control using FPGA based hardware controller is proposed. Adopting FPGA based hardware controller, all the control calculation can be finished within around 1 μ second, which result in the realization of the ideal digital control feedback without any sampling compensation method. In this paper, 1MHz multi-sampling deadbeat control with disturbance compensation method was proposed and compared with the conventional deadbeat control method through simulations and experiments, the advantages of the proposed method was verified.
{"title":"A study of 1MHz multi-sampling deadbeat control with disturbance compensation for PMSM drive system using FPGA","authors":"Kota Miyata, Kota Tsuchiya, T. Yokoyama","doi":"10.1109/IPEMC.2016.7512362","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512362","url":null,"abstract":"A new digital control method for permanent magnet synchronous motor based on deadbeat control using FPGA based hardware controller is proposed. Adopting FPGA based hardware controller, all the control calculation can be finished within around 1 μ second, which result in the realization of the ideal digital control feedback without any sampling compensation method. In this paper, 1MHz multi-sampling deadbeat control with disturbance compensation method was proposed and compared with the conventional deadbeat control method through simulations and experiments, the advantages of the proposed method was verified.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"10 1","pages":"654-659"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76210256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512567
Liuchen Chang, Gongyu Weng, Jie Hu, M. Mao
Currently, the analysis of cooling, heating and power (CCHP) system is usually based on operation strategy (such as following the electric load) and optimization criterion (such as operation cost reduction) without considering the match between sources and loads distributions from the perspective of the allocation proportion of waste heat between cooling and heating units. And this issue is taken into consideration in this paper. An objective function of minimum cost is proposed, along with constrains of the capacity and parameters of the CCHP system, including four different operation strategies. This optimization model is then used to optimize the configuration along with operation strategies for specific load profiles. The proposed method is tested by the developing CCHP simulation platform under Labview environment, in which the detail model of micro-turbine, waste heat boiler and absorption chiller is included. Simulation results show that the cost of the hotel building are reduced by 30% to 40% if equipped with the optimized CCHP system.
{"title":"Operation and configuration optimization of a CCHP system for general building load","authors":"Liuchen Chang, Gongyu Weng, Jie Hu, M. Mao","doi":"10.1109/IPEMC.2016.7512567","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512567","url":null,"abstract":"Currently, the analysis of cooling, heating and power (CCHP) system is usually based on operation strategy (such as following the electric load) and optimization criterion (such as operation cost reduction) without considering the match between sources and loads distributions from the perspective of the allocation proportion of waste heat between cooling and heating units. And this issue is taken into consideration in this paper. An objective function of minimum cost is proposed, along with constrains of the capacity and parameters of the CCHP system, including four different operation strategies. This optimization model is then used to optimize the configuration along with operation strategies for specific load profiles. The proposed method is tested by the developing CCHP simulation platform under Labview environment, in which the detail model of micro-turbine, waste heat boiler and absorption chiller is included. Simulation results show that the cost of the hotel building are reduced by 30% to 40% if equipped with the optimized CCHP system.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"52 1","pages":"1799-1805"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88421469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512370
Hongcheng You, X. Cai
A family of un-isolated modular dc/dc converters (MDCC) are presented by replacing the complementary switches in classical dc/dc converters (buck, boost, cuk, etc) with 2 chains of submodules (abbreviated as complementary chain-links) and an inductor. A stepped 2-level operating mode of chain-links is proposed to achieve the voltage balance of the submodule capacitors. A buck type modular multilevel converter (Buck-MDCC) derived from buck converter is presented to illustrate the operation principle. The proposed converters are suitable for high voltage dc conversion due to the voltage press of submodule switches can be dramatically reduced by cascading more submodules. Moreover, the dν/dt of the converters can be controlled with stepped 2-level modulation. The proposed converter also offers the merits of lower ac circulating current and lower submodule capacitance requirement compared with prior arts of MDCCs, where the sine-wave modulation is adopted.
{"title":"A family of un-isolated modular DC/DC converters","authors":"Hongcheng You, X. Cai","doi":"10.1109/IPEMC.2016.7512370","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512370","url":null,"abstract":"A family of un-isolated modular dc/dc converters (MDCC) are presented by replacing the complementary switches in classical dc/dc converters (buck, boost, cuk, etc) with 2 chains of submodules (abbreviated as complementary chain-links) and an inductor. A stepped 2-level operating mode of chain-links is proposed to achieve the voltage balance of the submodule capacitors. A buck type modular multilevel converter (Buck-MDCC) derived from buck converter is presented to illustrate the operation principle. The proposed converters are suitable for high voltage dc conversion due to the voltage press of submodule switches can be dramatically reduced by cascading more submodules. Moreover, the dν/dt of the converters can be controlled with stepped 2-level modulation. The proposed converter also offers the merits of lower ac circulating current and lower submodule capacitance requirement compared with prior arts of MDCCs, where the sine-wave modulation is adopted.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"47 1","pages":"696-702"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88438765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512350
Qi Zhang, P. Zhang, Shuangshuang Zhao, Jian Gao, Xiangdong Sun
The objective of this paper is to further improve the power transmission efficiency of a three-phase four-leg inverter by means of discontinuous three-dimensional space vector modulation (D3DSVM). Three-dimensional coordinate is established by linear transformation, and space vector sections are divided. Each switching vector is studied, and the calculation method of each time allocation is analyzed and summarized. Based on the different calculation rules, four specific implementation algorithms for D3DSVM are obtained. Harmonic distortion of the inverter output voltage and system power transmission efficiency as well as switching losses under four D3DSVM methods are compared. The feasibility of the proposed method is verified through simulation and experimental results.
{"title":"Research on a discontinuous three-dimensional space vector modulation strategy for the three-phase four-leg inverter","authors":"Qi Zhang, P. Zhang, Shuangshuang Zhao, Jian Gao, Xiangdong Sun","doi":"10.1109/IPEMC.2016.7512350","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512350","url":null,"abstract":"The objective of this paper is to further improve the power transmission efficiency of a three-phase four-leg inverter by means of discontinuous three-dimensional space vector modulation (D3DSVM). Three-dimensional coordinate is established by linear transformation, and space vector sections are divided. Each switching vector is studied, and the calculation method of each time allocation is analyzed and summarized. Based on the different calculation rules, four specific implementation algorithms for D3DSVM are obtained. Harmonic distortion of the inverter output voltage and system power transmission efficiency as well as switching losses under four D3DSVM methods are compared. The feasibility of the proposed method is verified through simulation and experimental results.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"32 1","pages":"575-580"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86183601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512850
Siyuan Ma, Haoran Wang, G. Zhu, Huai Wang
In single-phase inverters, a considerable amount of low-frequency ripples appear on the DC side due to the instantaneous power imbalance between the DC side and AC side. Recently, active methods using film capacitors or inductors as ripple power storage components introduced at the DC or AC side are applied to ease this issue. Nevertheless, there is lack of research regarding the selection of DC side or AC side power decoupling. This paper investigates the power losses of key components in both AC side and DC side active power decoupling solutions and compares their performance from an efficiency perspective. The analytical power loss models are derived based on the operation principles of the active power decoupling methods. A comparative study is performed based on a 500 W single-phase H-bridge inverter study case with 400 V DC-link voltage level. The results provide a guideline to justify whether or not to apply active power decoupling methods or which active power decoupling method to choose for a given application.
{"title":"Power loss analysis and comparision of DC and AC side decoupling module in a H-bridge inverter","authors":"Siyuan Ma, Haoran Wang, G. Zhu, Huai Wang","doi":"10.1109/IPEMC.2016.7512850","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512850","url":null,"abstract":"In single-phase inverters, a considerable amount of low-frequency ripples appear on the DC side due to the instantaneous power imbalance between the DC side and AC side. Recently, active methods using film capacitors or inductors as ripple power storage components introduced at the DC or AC side are applied to ease this issue. Nevertheless, there is lack of research regarding the selection of DC side or AC side power decoupling. This paper investigates the power losses of key components in both AC side and DC side active power decoupling solutions and compares their performance from an efficiency perspective. The analytical power loss models are derived based on the operation principles of the active power decoupling methods. A comparative study is performed based on a 500 W single-phase H-bridge inverter study case with 400 V DC-link voltage level. The results provide a guideline to justify whether or not to apply active power decoupling methods or which active power decoupling method to choose for a given application.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"48 1","pages":"3461-3466"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82676200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-22DOI: 10.1109/IPEMC.2016.7512357
Yeonho Jeong, Jae-Bum Lee, C. Yeon, C. Lim, Jung-Kyu Han, G. Moon
A new asymmetric half-bridge (HB) resonant converter for DC/DC power system with a low and wide input voltage is proposed in this paper. The proposed converter is based on the switch integration technique, merging the Active-Clamp Forward (ACF) circuit and the HB LLC resonant converter. By adopting the ACF circuit in front of the HB LLC resonant converter, higher input voltage of LLC resonant converter stage can be achieved. As a result, the primary conduction loss can be significantly reduced. In addition, an asymmetric pulse width modulation (APWM) control is applied to cover wide input voltage range and to mitigate the design limitation for a high efficiency and. Consequently, the proposed converter can achieve not only the small conduction loss and the optimal design for high efficiency, but also high power density and low cost due to the switch integration technique. The validity of the proposed converter is confirmed by the experimental results of a prototype converter with 36-72VDC input and 300W (12V/25A) output.
{"title":"Asymmetric half-bridge resonant converter having a reduced conduction loss for DC/DC power systems with a low input voltage","authors":"Yeonho Jeong, Jae-Bum Lee, C. Yeon, C. Lim, Jung-Kyu Han, G. Moon","doi":"10.1109/IPEMC.2016.7512357","DOIUrl":"https://doi.org/10.1109/IPEMC.2016.7512357","url":null,"abstract":"A new asymmetric half-bridge (HB) resonant converter for DC/DC power system with a low and wide input voltage is proposed in this paper. The proposed converter is based on the switch integration technique, merging the Active-Clamp Forward (ACF) circuit and the HB LLC resonant converter. By adopting the ACF circuit in front of the HB LLC resonant converter, higher input voltage of LLC resonant converter stage can be achieved. As a result, the primary conduction loss can be significantly reduced. In addition, an asymmetric pulse width modulation (APWM) control is applied to cover wide input voltage range and to mitigate the design limitation for a high efficiency and. Consequently, the proposed converter can achieve not only the small conduction loss and the optimal design for high efficiency, but also high power density and low cost due to the switch integration technique. The validity of the proposed converter is confirmed by the experimental results of a prototype converter with 36-72VDC input and 300W (12V/25A) output.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"63 1","pages":"621-628"},"PeriodicalIF":0.0,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88877903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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