Charged domain walls in ferroelectrics hold great promise for applications in ferroelectric random‐access memory (FeRAM), with advantages such as low energy consumption, high density, and non‐destructive operation. Due to the mechanical compatibility condition, the neutral domain walls are dominant in traditional ferroelectric thin films. Herein, using phase‐field simulations, the formation of intrinsically stable charged domain walls (CDWs) in the molecular ferroelectric films is demonstrated, which can be mainly attributed to the small mechanical stiffness. The switching kinetics are further investigated for the CDWs, showing a lower switching barrier as compared to the neutral counterparts. Moreover, it is indicated that increasing the compressive misfit strain can lead to prolonged switching time, with a significantly increased switching energy barrier. These findings pave the way for the potential applications of metal‐free organic ferroelectric materials in FeRAM devices.
{"title":"Intrinsically Stable Charged Domain Walls in Molecular Ferroelectric Thin Films","authors":"Xin Li, Cheng Li, Linming Zhou, Xiangwei Guo, Yuhui Huang, Hui Zhang, Shurong Dong, Yongjun Wu, Zijian Hong","doi":"10.1002/aelm.202400324","DOIUrl":"https://doi.org/10.1002/aelm.202400324","url":null,"abstract":"Charged domain walls in ferroelectrics hold great promise for applications in ferroelectric random‐access memory (FeRAM), with advantages such as low energy consumption, high density, and non‐destructive operation. Due to the mechanical compatibility condition, the neutral domain walls are dominant in traditional ferroelectric thin films. Herein, using phase‐field simulations, the formation of intrinsically stable charged domain walls (CDWs) in the molecular ferroelectric films is demonstrated, which can be mainly attributed to the small mechanical stiffness. The switching kinetics are further investigated for the CDWs, showing a lower switching barrier as compared to the neutral counterparts. Moreover, it is indicated that increasing the compressive misfit strain can lead to prolonged switching time, with a significantly increased switching energy barrier. These findings pave the way for the potential applications of metal‐free organic ferroelectric materials in FeRAM devices.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142236483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Abdullah H. Alshehri, Hatameh Asgarimoghaddam, Louis‐Vincent Delumeau, Viet Huong Nguyen, AlRasheed Ali, Mutabe Aljaghtham, Ali Alamry, Dogu Ozyigit, Mustafa Yavuz, Kevin P. Musselman
Metal‐insulator‐insulator‐metal (MIIM) diodes with thickness‐gradient films for the insulator layers are fabricated for the first time. Spatially varying atmospheric‐pressure chemical vapor deposition is used to deposit ZnO and Al2O3 films with orthogonal gradient directions, producing 414 MIIM diodes with 414 different ZnO/Al2O3 film‐thickness combinations on a single substrate for combinatorial and high‐throughput optimization. The nm‐scale ZnO/Al2O3 films are printed in only 2 min and the entire device fabrication takes 7 h, which is much less than conventional approaches for investigating many insulator‐thickness combinations. Rapid identification of the optimal thickness combination is demonstrated; high‐performance diodes (asymmetry = 227, nonlinearity = 13.1, and responsivity = 12 A/W) are observed when a trap‐assisted tunneling mechanism is dominant for insulator thicknesses of 3.4–4.4 nm (ZnO) and 7.4 nm (Al2O3).
{"title":"Combinatorial Optimization of Metal‐Insulator‐Insulator‐Metal (MIIM) Diodes With Thickness‐Gradient Films via Spatial Atomic Layer Deposition","authors":"Abdullah H. Alshehri, Hatameh Asgarimoghaddam, Louis‐Vincent Delumeau, Viet Huong Nguyen, AlRasheed Ali, Mutabe Aljaghtham, Ali Alamry, Dogu Ozyigit, Mustafa Yavuz, Kevin P. Musselman","doi":"10.1002/aelm.202400093","DOIUrl":"https://doi.org/10.1002/aelm.202400093","url":null,"abstract":"Metal‐insulator‐insulator‐metal (MIIM) diodes with thickness‐gradient films for the insulator layers are fabricated for the first time. Spatially varying atmospheric‐pressure chemical vapor deposition is used to deposit ZnO and Al<jats:sub>2</jats:sub>O<jats:sub>3</jats:sub> films with orthogonal gradient directions, producing 414 MIIM diodes with 414 different ZnO/Al<jats:sub>2</jats:sub>O<jats:sub>3</jats:sub> film‐thickness combinations on a single substrate for combinatorial and high‐throughput optimization. The nm‐scale ZnO/Al<jats:sub>2</jats:sub>O<jats:sub>3</jats:sub> films are printed in only 2 min and the entire device fabrication takes 7 h, which is much less than conventional approaches for investigating many insulator‐thickness combinations. Rapid identification of the optimal thickness combination is demonstrated; high‐performance diodes (asymmetry = 227, nonlinearity = 13.1, and responsivity = 12 A/W) are observed when a trap‐assisted tunneling mechanism is dominant for insulator thicknesses of 3.4–4.4 nm (ZnO) and 7.4 nm (Al<jats:sub>2</jats:sub>O<jats:sub>3</jats:sub>).","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142236482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Rui Jia, Xiaozheng Duan, Kaige Wang, Fengqiang Sun, Teng Li, Zhu Chen, Le Wang, Gang Wang, Liang-Wen Feng, Hengda Sun, Meifang Zhu
Efficient ionic conductivity switching is crucial for the progression of iontronics, where adaptability and dynamic control are desirable to the innovation of intelligent devices. One of the main challenges in the field is to develop materials that not only transit between distinct conductive states but also exhibit evolvable properties to enhance their functional capabilities. Addressing this, a reversible phase-transition hydrated salt crystal ionic gel (RPSIG) for innovative ionic switch design is introduced. The RPSIG demonstrates an exceptional ability to modulate its ionic conductivity, with a switching ratio able to reach 5000-fold after training. The training effect can be attributed to the enhanced synergistic interplay between crystallites and the polymer matrix, which leads to thermodynamic stabilization of the interfacial structure and induces a higher energy cost for ion migrations. Meanwhile, the RPSIG exhibits the capability to adjust its resistive-capacitive properties in response to phase transitions, making it a versatile component for signal processing. Further application of RPSIG in intelligent latches and multifunctional hybrid circuits enables effective logic signal transmission, highlighting its potential in pioneering the development of advanced iontronic devices.
{"title":"Training-Augmented Ionic Switch for Logic Signal Modulation","authors":"Rui Jia, Xiaozheng Duan, Kaige Wang, Fengqiang Sun, Teng Li, Zhu Chen, Le Wang, Gang Wang, Liang-Wen Feng, Hengda Sun, Meifang Zhu","doi":"10.1002/aelm.202400408","DOIUrl":"https://doi.org/10.1002/aelm.202400408","url":null,"abstract":"Efficient ionic conductivity switching is crucial for the progression of iontronics, where adaptability and dynamic control are desirable to the innovation of intelligent devices. One of the main challenges in the field is to develop materials that not only transit between distinct conductive states but also exhibit evolvable properties to enhance their functional capabilities. Addressing this, a reversible phase-transition hydrated salt crystal ionic gel (RPSIG) for innovative ionic switch design is introduced. The RPSIG demonstrates an exceptional ability to modulate its ionic conductivity, with a switching ratio able to reach 5000-fold after training. The training effect can be attributed to the enhanced synergistic interplay between crystallites and the polymer matrix, which leads to thermodynamic stabilization of the interfacial structure and induces a higher energy cost for ion migrations. Meanwhile, the RPSIG exhibits the capability to adjust its resistive-capacitive properties in response to phase transitions, making it a versatile component for signal processing. Further application of RPSIG in intelligent latches and multifunctional hybrid circuits enables effective logic signal transmission, highlighting its potential in pioneering the development of advanced iontronic devices.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142171175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zhuoqun Fang, Melissa Alzate-Banguero, Amit R. Rajapurohita, Forrest Simmons, Erica W. Carlson, Zhuoying Chen, Lionel Aigouy, Alexandre Zimmers
Vanadium Dioxide (VO2) is a material that exhibits a phase transition from an insulating state to a metallic state at ≈68 °C. During a temperature cycle consisting of warming followed by cooling, the resistivity of VO2 changes by several orders of magnitude over the course of the hysteresis loop. Using a focused laser beam (λ = 532 nm), it is shown that it is possible to optically generate micron-sized metallic patterns within the insulating phase of a VO2 planar junction which can be used to tune, on demand, the resistance of the VO2 junction. A resistor network simulation is used to characterize the resulting resistance drops in the devices. These patterns persist while the base temperature is held constant within the hysteretic region while being easily removed totally by simply lowering the base temperature. Surprisingly, it is also observed that the pattern can be partially erased using an atomic force microscope (AFM) tip on the submicron scale. This erasing process can be qualitatively explained by the temperature difference between the VO2 surface and the tip which acts as a local cooler. This optical and AFM resistive fine-tuning offers the possibility of creating controllable synaptic weights between room-temperature VO2 neuristors.
{"title":"Tuning the Resistance of a VO2 Junction by Focused Laser Beam and Atomic Force Microscopy","authors":"Zhuoqun Fang, Melissa Alzate-Banguero, Amit R. Rajapurohita, Forrest Simmons, Erica W. Carlson, Zhuoying Chen, Lionel Aigouy, Alexandre Zimmers","doi":"10.1002/aelm.202400249","DOIUrl":"https://doi.org/10.1002/aelm.202400249","url":null,"abstract":"Vanadium Dioxide (VO<sub>2</sub>) is a material that exhibits a phase transition from an insulating state to a metallic state at ≈68 °C. During a temperature cycle consisting of warming followed by cooling, the resistivity of VO<sub>2</sub> changes by several orders of magnitude over the course of the hysteresis loop. Using a focused laser beam (λ = 532 nm), it is shown that it is possible to optically generate micron-sized metallic patterns within the insulating phase of a VO<sub>2</sub> planar junction which can be used to tune, on demand, the resistance of the VO<sub>2</sub> junction. A resistor network simulation is used to characterize the resulting resistance drops in the devices. These patterns persist while the base temperature is held constant within the hysteretic region while being easily removed totally by simply lowering the base temperature. Surprisingly, it is also observed that the pattern can be partially erased using an atomic force microscope (AFM) tip on the submicron scale. This erasing process can be qualitatively explained by the temperature difference between the VO<sub>2</sub> surface and the tip which acts as a local cooler. This optical and AFM resistive fine-tuning offers the possibility of creating controllable synaptic weights between room-temperature VO<sub>2</sub> neuristors.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142166042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Felix V.E. Hensling, Patrick Vogt, Jisung Park, Shun-Li Shang, Huacheng Ye, Yu-Mi Wu, Kathleen Smith, Veronica Show, Kathy Azizie, Hanjong Paik, Debdeep Jena, Huili G. Xing, Y. Eren Suyolcu, Peter A. van Aken, Suman Datta, Zi-Kui Liu, Darrell G. Schlom
Transparent oxide thin film transistors (TFTs) are an important ingredient of transparent electronics. Their fabrication at the back-end-of-line (BEOL) opens the door to novel strategies to more closely integrate logic with memory for data-intensive computing architectures that overcome the scaling challenges of today's integrated circuits. A recently developed variant of molecular-beam epitaxy (MBE) called suboxide MBE (S-MBE) is demonstrated to be capable of growing epitaxial In2O3 at BEOL temperatures with unmatched crystal quality. The fullwidth at halfmaximum of the rocking curve is 0.015° and, thus, ≈5x narrower than any reports at any temperature to date and limited by the substrate quality. The key to achieving these results is the provision of an In2O beam by S-MBE, which enables growth in adsorption control and is kinetically favorable. To benchmark this deposition method for TFTs, rudimentary devices were fabricated.
{"title":"Fully Transparent Epitaxial Oxide Thin-Film Transistor Fabricated at Back-End-of-Line Temperature by Suboxide Molecular-Beam Epitaxy","authors":"Felix V.E. Hensling, Patrick Vogt, Jisung Park, Shun-Li Shang, Huacheng Ye, Yu-Mi Wu, Kathleen Smith, Veronica Show, Kathy Azizie, Hanjong Paik, Debdeep Jena, Huili G. Xing, Y. Eren Suyolcu, Peter A. van Aken, Suman Datta, Zi-Kui Liu, Darrell G. Schlom","doi":"10.1002/aelm.202400499","DOIUrl":"https://doi.org/10.1002/aelm.202400499","url":null,"abstract":"Transparent oxide thin film transistors (TFTs) are an important ingredient of transparent electronics. Their fabrication at the back-end-of-line (BEOL) opens the door to novel strategies to more closely integrate logic with memory for data-intensive computing architectures that overcome the scaling challenges of today's integrated circuits. A recently developed variant of molecular-beam epitaxy (MBE) called suboxide MBE (S-MBE) is demonstrated to be capable of growing epitaxial In<sub>2</sub>O<sub>3</sub> at BEOL temperatures with unmatched crystal quality. The fullwidth at halfmaximum of the rocking curve is 0.015° and, thus, ≈5x narrower than any reports at any temperature to date and limited by the substrate quality. The key to achieving these results is the provision of an In<sub>2</sub>O beam by S-MBE, which enables growth in adsorption control and is kinetically favorable. To benchmark this deposition method for TFTs, rudimentary devices were fabricated.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142166046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sabrina Calvi, Marco Bertelli, Sara De Simone, Francesco Maita, Simone Prili, Adriano Diaz Fattorini, Fabio De Matteis, Valentina Mussi, Flavia Righi Riva, Massimo Longo, Fabrizio Arciprete, Raffaella Calarco
Edge computing architectures are intended to store and process data nearby the sensor, while ensuring fast and safe data processing, low power consumption and cost minimization. The stability, mechanical flexibility, huge computational and storage requirements needed for these applications are beyond the capability of current embedded devices. Memories based on phase-change materials have the potential to overcome these issues. However, their behavior on flexible substrates is yet to be understood and alloys owning the required key features still need to be proposed. With this work, it is demonstrated that Ge–Sb–Te (GST) alloys are large-area scalable and directly processable on flexible substrates, while their large resistance contrast enables the prospect of multilevel data encoding. Remarkably, the Ge enrichment acts as both thermal and mechanical stabilizer within the alloy. The highlighted features of Ge-enriched GST alloys show their potential as new active materials for the most demanding flexible edge electronics applications.
边缘计算架构旨在存储和处理传感器附近的数据，同时确保快速安全的数据处理、低功耗和成本最小化。这些应用所需的稳定性、机械灵活性、巨大的计算和存储要求超出了当前嵌入式设备的能力。基于相变材料的存储器有可能克服这些问题。然而，它们在柔性基板上的行为仍有待了解，拥有所需关键特性的合金仍有待提出。这项研究表明，Ge-Sb-Te（GST）合金具有大面积可扩展性，可在柔性基底上直接加工，同时其电阻对比度大，有望实现多级数据编码。值得注意的是，Ge 富集在合金中同时起到了热稳定和机械稳定的作用。富集 Ge 的 GST 合金所具有的突出特点表明，它们有望成为最苛刻的柔性边缘电子应用的新型活性材料。
{"title":"Ge Enrichment of Ge–Sb–Te Alloys as Keystone of Flexible Edge Electronics","authors":"Sabrina Calvi, Marco Bertelli, Sara De Simone, Francesco Maita, Simone Prili, Adriano Diaz Fattorini, Fabio De Matteis, Valentina Mussi, Flavia Righi Riva, Massimo Longo, Fabrizio Arciprete, Raffaella Calarco","doi":"10.1002/aelm.202400184","DOIUrl":"https://doi.org/10.1002/aelm.202400184","url":null,"abstract":"Edge computing architectures are intended to store and process data nearby the sensor, while ensuring fast and safe data processing, low power consumption and cost minimization. The stability, mechanical flexibility, huge computational and storage requirements needed for these applications are beyond the capability of current embedded devices. Memories based on phase-change materials have the potential to overcome these issues. However, their behavior on flexible substrates is yet to be understood and alloys owning the required key features still need to be proposed. With this work, it is demonstrated that Ge–Sb–Te (GST) alloys are large-area scalable and directly processable on flexible substrates, while their large resistance contrast enables the prospect of multilevel data encoding. Remarkably, the Ge enrichment acts as both thermal and mechanical stabilizer within the alloy. The highlighted features of Ge-enriched GST alloys show their potential as new active materials for the most demanding flexible edge electronics applications.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142166041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Huiyuan Cheng, Yifan Zheng, Yu Lou, Mengjie Sun, Guodong Zhang, Haoran Wang, Tom Wu, Yang Bai, Yuchuan Shao
Metal halide perovskite nanocrystals (PNCs) hold great promise for light-emitting diodes (LEDs) due to their high photoluminescence quantum yields (PLQY), tunable colors, and low-cost solution processability. However, their electroluminescence efficiencies are currently limited by the small size of the PNCs and the weak binding between ligands and PNCs. The small size makes PNCs sensitive to environmental factors due to their large specific surface area, leading to a loss of PLQY during post-treatment. Additionally, the weak binding between ligands and PNCs causes the ligands to detach during post-treatment, further reducing PLQY. To address these challenges, an in situ ligand-capped synthesis method is introduced for PNCs, replacing the aliphatic solvent octadecene (ODE) with trioctylphosphine (TOP). The presence of TOP increases the concentration of monomers, accelerating nucleation and crystal growth, enabling the production of cubic PNCs ranging from 8 nm to over 28 nm. Moreover, TOP acts as a ligand to resurface PNCs, enhancing their stability and maintaining high PLQY after post-treatment. As a result, by utilizing these larger PNCs, a high maximum external quantum efficiency (EQE) of 21.23% in LEDs is achieved. This method provides a significant advancement in the development of high-performance PNC-based LEDs.
{"title":"Size Enlargement of CsPbI3 Perovskite Nanocrystals by Trioctylphosphine in the Synthesis for Highly Efficient Deep-Red Light-Emitting Diodes","authors":"Huiyuan Cheng, Yifan Zheng, Yu Lou, Mengjie Sun, Guodong Zhang, Haoran Wang, Tom Wu, Yang Bai, Yuchuan Shao","doi":"10.1002/aelm.202400334","DOIUrl":"https://doi.org/10.1002/aelm.202400334","url":null,"abstract":"Metal halide perovskite nanocrystals (PNCs) hold great promise for light-emitting diodes (LEDs) due to their high photoluminescence quantum yields (PLQY), tunable colors, and low-cost solution processability. However, their electroluminescence efficiencies are currently limited by the small size of the PNCs and the weak binding between ligands and PNCs. The small size makes PNCs sensitive to environmental factors due to their large specific surface area, leading to a loss of PLQY during post-treatment. Additionally, the weak binding between ligands and PNCs causes the ligands to detach during post-treatment, further reducing PLQY. To address these challenges, an in situ ligand-capped synthesis method is introduced for PNCs, replacing the aliphatic solvent octadecene (ODE) with trioctylphosphine (TOP). The presence of TOP increases the concentration of monomers, accelerating nucleation and crystal growth, enabling the production of cubic PNCs ranging from 8 nm to over 28 nm. Moreover, TOP acts as a ligand to resurface PNCs, enhancing their stability and maintaining high PLQY after post-treatment. As a result, by utilizing these larger PNCs, a high maximum external quantum efficiency (EQE) of 21.23% in LEDs is achieved. This method provides a significant advancement in the development of high-performance PNC-based LEDs.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142171176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Understanding charge carrier transport in conductive polymers is imperative for the materials' synthesis and optimizing devices. While most theoretical studies utilize time-independent approaches for describing charge transport, there is an interest in addressing temporal charge carrier dynamics, which provides more information than time-independent methods. In this study, ab initio molecular dynamics is utilized to gain microscopic insights into charge carrier temporal dynamics in PEDOT. It is demonstrated that transport along the chains is band-like and across the chains is hopping-like. Polaron mobility is calculated along the chains to be 4 cm2 V−1 s−1, providing a theoretical upper limit in thiophene-based conducting polymers. Also, by tracing polaron jumps between chains, the hopping rate, aligning with Marcus' theory is extracted. If an electric field can release polarons from Coulomb traps is investigated, finding that the necessary field strength surpasses typical experimental values. Two regimes of intrachain polaron movement are found: under low/intermediate electric fields, polaron moves velocity-constantly with coupled charge and lattice distortion, while under high electric fields, charge and lattice distortion decouple. The methodology applies to studying mobilities in p- and n-doped conjugated polymers, including highly doped systems with more polymer chains, and incorporates dielectric screening to address the impact of shallow and deep traps.
了解导电聚合物中的电荷载流子传输对于材料合成和设备优化至关重要。虽然大多数理论研究都采用与时间无关的方法来描述电荷传输，但人们有兴趣研究电荷载流子的时间动力学，因为它比与时间无关的方法能提供更多信息。本研究利用 ab initio 分子动力学从微观角度深入了解 PEDOT 中电荷载流子的时间动力学。结果表明，沿链的传输是带状的，而跨链的传输是跳跃状的。根据计算，沿链的极子迁移率为 4 cm2 V-1 s-1，为噻吩基导电聚合物提供了理论上限。此外，通过追踪链之间的极子跃迁，还可以提取出与马库斯理论一致的跳跃率。研究还探讨了电场能否从库仑陷阱中释放极子，发现所需的电场强度超过了典型的实验值。研究发现了链内极子运动的两种状态：在低/中电场下，极子的运动速度与电荷和晶格畸变耦合一致；而在高电场下，电荷和晶格畸变脱钩。该方法适用于研究 p 掺杂和 n 掺杂共轭聚合物（包括具有更多聚合物链的高掺杂系统）中的迁移率，并结合介电屏蔽来解决浅陷阱和深陷阱的影响。
{"title":"Band Versus Hopping Transport in Conducting Polymers by Ab Initio Molecular Dynamics: Exploring the Effect of Electric Field, Trapping and Temperature","authors":"Najmeh Zahabi, Igor Zozoulenko","doi":"10.1002/aelm.202400239","DOIUrl":"https://doi.org/10.1002/aelm.202400239","url":null,"abstract":"Understanding charge carrier transport in conductive polymers is imperative for the materials' synthesis and optimizing devices. While most theoretical studies utilize time-independent approaches for describing charge transport, there is an interest in addressing temporal charge carrier dynamics, which provides more information than time-independent methods. In this study, ab initio molecular dynamics is utilized to gain microscopic insights into charge carrier temporal dynamics in PEDOT. It is demonstrated that transport along the chains is band-like and across the chains is hopping-like. Polaron mobility is calculated along the chains to be 4 cm<sup>2</sup> V<sup>−1</sup> s<sup>−1</sup>, providing a theoretical upper limit in thiophene-based conducting polymers. Also, by tracing polaron jumps between chains, the hopping rate, aligning with Marcus' theory is extracted. If an electric field can release polarons from Coulomb traps is investigated, finding that the necessary field strength surpasses typical experimental values. Two regimes of intrachain polaron movement are found: under low/intermediate electric fields, polaron moves velocity-constantly with coupled charge and lattice distortion, while under high electric fields, charge and lattice distortion decouple. The methodology applies to studying mobilities in p- and n-doped conjugated polymers, including highly doped systems with more polymer chains, and incorporates dielectric screening to address the impact of shallow and deep traps.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142171178","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ke Hu, Zean Guo, Jiawei Wang, Congyan Lu, Mingliang Wang, Tianyuan Wang, Fuxi Liao, Guanhua Yang, Nianduan Lu, Ling Li
Thin film transistors (TFTs) based on amorphous oxide semiconductors (AOS) are promising candidates for panel displays. However, the trade‐off between mobility and reliability in AOS‐TFTs hinders their further applications in next‐generation display techniques and newly developed logic and memory circuits. Here, a structural strategy is proposed for the mobility‐reliability trade‐off, via a triple‐layer channel containing a Ga‐free high‐mobility layer (amorphous InSnZnO, a‐ITZO) sandwiched by two Ga‐rich layers (amorphous InGaZnO, a‐IGZO) with higher reliability. Gate‐induced carrier accumulation is verified mainly being energetically confined within the high mobility a‐ITZO layer, at the newly defined a‐ITZO/a‐IGZO interface. Compared to single layer a‐ITZO‐TFTs, triple‐channel a‐IGZO/a‐ITZO/a‐IGZO TFTs (GTG‐TFTs) exhibit outstanding stability and electrical transport performances, with suppressed positive/negative‐bias‐stress voltage shifts from 1/0.3 to 0.1/0.004 V, enhanced field effect mobility from ≈40 to 56 cm2V−1s−1, and optimized sub‐threshold swing down to 80 mV dec−1. Further numerical simulations and charge transport characterizations, including magnetotransport and gate‐induced Hall effect, indicate that charge transport in tri‐layer structure is less affected by energetic disorders present at gate insulator interfaces.
{"title":"Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors","authors":"Ke Hu, Zean Guo, Jiawei Wang, Congyan Lu, Mingliang Wang, Tianyuan Wang, Fuxi Liao, Guanhua Yang, Nianduan Lu, Ling Li","doi":"10.1002/aelm.202400266","DOIUrl":"https://doi.org/10.1002/aelm.202400266","url":null,"abstract":"Thin film transistors (TFTs) based on amorphous oxide semiconductors (AOS) are promising candidates for panel displays. However, the trade‐off between mobility and reliability in AOS‐TFTs hinders their further applications in next‐generation display techniques and newly developed logic and memory circuits. Here, a structural strategy is proposed for the mobility‐reliability trade‐off, via a triple‐layer channel containing a Ga‐free high‐mobility layer (amorphous InSnZnO, a‐ITZO) sandwiched by two Ga‐rich layers (amorphous InGaZnO, a‐IGZO) with higher reliability. Gate‐induced carrier accumulation is verified mainly being energetically confined within the high mobility a‐ITZO layer, at the newly defined a‐ITZO/a‐IGZO interface. Compared to single layer a‐ITZO‐TFTs, triple‐channel a‐IGZO/a‐ITZO/a‐IGZO TFTs (GTG‐TFTs) exhibit outstanding stability and electrical transport performances, with suppressed positive/negative‐bias‐stress voltage shifts from 1/0.3 to 0.1/0.004 V, enhanced field effect mobility from ≈40 to 56 cm<jats:sup>2</jats:sup>V<jats:sup>−1</jats:sup>s<jats:sup>−1</jats:sup>, and optimized sub‐threshold swing down to 80 mV dec<jats:sup>−1</jats:sup>. Further numerical simulations and charge transport characterizations, including magnetotransport and gate‐induced Hall effect, indicate that charge transport in tri‐layer structure is less affected by energetic disorders present at gate insulator interfaces.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142166043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), the most widely used hole injection layer (HIL) for perovskite light-emitting diodes (PeLEDs), has a large hole injection energy barrier and easy charge separation at PEDOT:PSS/perovskite layer. Here, a self-assembling molecule (SAM) called (2-(3,6-dimethoxy-9H-carbazol-9-yl)ethyl) phosphonic acid (MeO-2PACz) is introduced as an interlayer between PEDOT:PSS and perovskite to overcome the limitations of PEDOT:PSS HIL. The MeO-2PACz interlayer facilitated hole injection due to the reduced hole injection energy barrier and the improved hole mobility, enhanced photoluminescence (PL) due to the prevented charge transfer from perovskite into PEDOT:PSS, and reduced interface trap density due to the passivation of methoxy and carbazole group toward perovskite. As a result, PeLEDs with MeO-2PACz interlayer has greatly enhanced maximum luminance (Lmax = 17,310 cd m−2) and reduced leakage current, resulting in higher maximum external quantum efficiency (EQEmax = 21.50%) compared to pristine Control device (EQEmax of 4.82%).
聚(3,4-亚乙二氧基噻吩)聚苯乙烯磺酸盐(PEDOT:PSS)是包晶发光二极管(PeLED)最广泛使用的空穴注入层(HIL)，它具有较大的空穴注入能垒，容易在PEDOT:PSS/包晶层发生电荷分离。在这里，一种名为（2-（3,6-二甲氧基-9H-咔唑-9-基）乙基）膦酸（MeO-2PACz）的自组装分子（SAM）被引入作为 PEDOT:PSS 和包晶之间的中间层，以克服 PEDOT:PSS HIL 的局限性。MeO-2PACz 中间膜降低了空穴注入能垒，提高了空穴迁移率，从而促进了空穴注入；阻止了电荷从包晶石转移到 PEDOT:PSS 中，从而增强了光致发光（PL）；甲氧基和咔唑基对包晶石的钝化作用降低了界面陷阱密度。因此，与原始的 Control 器件（EQEmax 为 4.82%）相比，带有 MeO-2PACz 夹层的 PeLED 可大大提高最大亮度（Lmax = 17,310 cd m-2）并降低漏电流，从而提高最大外部量子效率（EQEmax = 21.50%）。
{"title":"A Self-Assembling Molecule for Improving the Mobility in PEDOT:PSS Hole Transport Layer for Efficient Perovskite Light-Emitting Diodes","authors":"Tae Hyung Kim, Bong Woo Kim, Sang Hyuk Im","doi":"10.1002/aelm.202400626","DOIUrl":"https://doi.org/10.1002/aelm.202400626","url":null,"abstract":"Poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), the most widely used hole injection layer (HIL) for perovskite light-emitting diodes (PeLEDs), has a large hole injection energy barrier and easy charge separation at PEDOT:PSS/perovskite layer. Here, a self-assembling molecule (SAM) called (2-(3,6-dimethoxy-9H-carbazol-9-yl)ethyl) phosphonic acid (MeO-2PACz) is introduced as an interlayer between PEDOT:PSS and perovskite to overcome the limitations of PEDOT:PSS HIL. The MeO-2PACz interlayer facilitated hole injection due to the reduced hole injection energy barrier and the improved hole mobility, enhanced photoluminescence (PL) due to the prevented charge transfer from perovskite into PEDOT:PSS, and reduced interface trap density due to the passivation of methoxy and carbazole group toward perovskite. As a result, PeLEDs with MeO-2PACz interlayer has greatly enhanced maximum luminance (L<sub>max</sub> = 17,310 cd m<sup>−2</sup>) and reduced leakage current, resulting in higher maximum external quantum efficiency (EQE<sub>max</sub> = 21.50%) compared to pristine Control device (EQE<sub>max</sub> of 4.82%).","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":null,"pages":null},"PeriodicalIF":6.2,"publicationDate":"2024-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142159019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：