Advanced Electronic Materials最新文献

英文中文

Monolithic 3D Logic Gates Based on p-Te and n-Bi2S3 Complementary Thin-Film Transistors

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-04-02 DOI: 10.1002/aelm.202400786

Yuqia Ran, Yiwen Song, Long Li, Xujin Song, Pingfan Gu, Qi Wang, Haifeng Du, Jinfeng Kang, Yu Ye

As Moore's law approaches its limit, achieving higher device density necessitates innovative architectures, with monolithic three-dimensional (M3D) designs emerging as a promising solution. Although numerous top-down fabrication methods have yielded encouraging results, they often fall short of meeting the demands for large-scale production, ultimately hindering the development of more complex, high-performance devices. Here, a novel approach employing all thermally evaporated thin films is presented for the bottom-up fabrication of M3D integrated logic circuits. Utilizing p-type tellurium (Te) and n-type bismuth sulfide (Bi₂S₃) as channel materials, monolithicly stacked prototypes of inverter, NAND, NOR, AND gates, SRAM, and oscillators are successfully demonstrated. This work highlights the viability of utilizing bottom-up synthesized thin-film transistors (TFTs) to construct sophisticated M3D logic circuits, underscoring the significance of deposition techniques such as thermal evaporation as a highly effective approach.

引用次数: 0

Photo-Thermal Approaches on Polyimide Film for Demonstration of Sub-50 µm Polymer Stencil Mask 在聚酰亚胺薄膜上采用光热方法演示 50 微米以下的聚合物模板掩模

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-04-01 DOI: 10.1002/aelm.202400979

Bon-Jae Koo, Jin-Hyeong Lee, Hyo-Kyung Kwon, Hwidon Lee, Joonsoo Jeong, Suk-Kyun Ahn, Min-Ho Seo

Stencil masks are widely utilized in traditional macro-scale patterning due to their simplicity and versatility in enabling various types of patterns. Compared to photoresist-based methods, stencil-based patterning enables chemical-free processing and curved surface application. However, their application to micro-scale patterning is constrained by challenges including precise fabrication, mechanical stability, and high production costs. Herein, a cost- and time-effective, single-step UV laser process is presented for fabricating polyimide stencil masks with micrometer-resolution (down to 42.4 µm feature sizes) by optimizing photothermal effects on material. Specifically, the processing conditions are systematically explored and optimized to enable efficient etching of polyimide with a UV laser while maintaining its structural stability in a glassy state. This approach successfully yielded micro-patterns with feature sizes below 50 µm on polyimide film. The developed method demonstrated high reproducibility, scalability, and stability, allowing polyimide films of varying thicknesses to be processed into stencil masks with dimensions down to 42.4 µm. Furthermore, the produced masks enable the formation of various micro-patterns, including polygonal shapes and linear features, with high aspect ratios (<1:235.8) (42.4 µm width, 10 mm length). To demonstrate the practicality of this technology, wearable motion sensors are fabricated using stencil masks and successfully applied to advanced human-machine interaction.

{"title":"Photo-Thermal Approaches on Polyimide Film for Demonstration of Sub-50 µm Polymer Stencil Mask","authors":"Bon-Jae Koo, Jin-Hyeong Lee, Hyo-Kyung Kwon, Hwidon Lee, Joonsoo Jeong, Suk-Kyun Ahn, Min-Ho Seo","doi":"10.1002/aelm.202400979","DOIUrl":"https://doi.org/10.1002/aelm.202400979","url":null,"abstract":"Stencil masks are widely utilized in traditional macro-scale patterning due to their simplicity and versatility in enabling various types of patterns. Compared to photoresist-based methods, stencil-based patterning enables chemical-free processing and curved surface application. However, their application to micro-scale patterning is constrained by challenges including precise fabrication, mechanical stability, and high production costs. Herein, a cost- and time-effective, single-step UV laser process is presented for fabricating polyimide stencil masks with micrometer-resolution (down to 42.4 µm feature sizes) by optimizing photothermal effects on material. Specifically, the processing conditions are systematically explored and optimized to enable efficient etching of polyimide with a UV laser while maintaining its structural stability in a glassy state. This approach successfully yielded micro-patterns with feature sizes below 50 µm on polyimide film. The developed method demonstrated high reproducibility, scalability, and stability, allowing polyimide films of varying thicknesses to be processed into stencil masks with dimensions down to 42.4 µm. Furthermore, the produced masks enable the formation of various micro-patterns, including polygonal shapes and linear features, with high aspect ratios (<1:235.8) (42.4 µm width, 10 mm length). To demonstrate the practicality of this technology, wearable motion sensors are fabricated using stencil masks and successfully applied to advanced human-machine interaction.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"22 1","pages":""},"PeriodicalIF":6.2,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143758369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Physical Model Development for Fabricating MIS-Anode-Based 1100 V AlGaN/GaN-Based Lateral Schottky Barrier Diodes Grown on Silicon Substrate with Low Leakage Current 用于制造在硅基底上生长的具有低漏泄电流的基于 MIS-Anode 的 1100 V AlGaN/GaN 侧肖特基势垒二极管的物理模型开发

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-04-01 DOI: 10.1002/aelm.202500111

Jingting He, Zhizhong Wang, Fuping Huang, Chunshuang Chu, Kangkai Tian, Shuting Cai, Yonghui Zhang, Xiaojuan Sun, Dabing Li, Xiaowei Sun, Zi-Hui Zhang

This work develops unique physical models for AlGaN/GaN-based Schottky barrier diodes (SBDs) grown on silicon (Si) substrates. The carrier transport and impact ionization processes are different from those of devices grown on sapphire substrates. Defects in the GaN epitaxial layer generate abundant leakage current and the impact ionization coefficients for the GaN layer shall be revised. The revised physical models are utilized to design SBDs with metal/Al₂O₃/GaN-based (MIS) Schottky contact. Both numerically calculated and experimentally measured results prove the benefits of the passivation effect by the Al₂O₃ thin layer. The increased effective energy barrier height suppresses the image-force-caused energy band-lowering effect. As a result, the reverse leakage current is reduced by 3 orders of magnitude when compared with the reference SBD. The revised physical models predict a ≈1100 V breakdown voltage (BV) for the MIS SBD with a specific ON-resistance (R_on,sp) of ≈3.98 mΩ cm², which numbers are consistent with measured results. The revised physical models are also able to precisely study the electrical stress reliability such that the MIS-based Schottky contact can significantly reduce the surface trapping effect for electrons. This is proven by experimentally observing that the MIS SBD presents much stabler R_on,sp and turn-on voltage (V_on) in different electrical-stress conditions.

{"title":"Physical Model Development for Fabricating MIS-Anode-Based 1100 V AlGaN/GaN-Based Lateral Schottky Barrier Diodes Grown on Silicon Substrate with Low Leakage Current","authors":"Jingting He, Zhizhong Wang, Fuping Huang, Chunshuang Chu, Kangkai Tian, Shuting Cai, Yonghui Zhang, Xiaojuan Sun, Dabing Li, Xiaowei Sun, Zi-Hui Zhang","doi":"10.1002/aelm.202500111","DOIUrl":"https://doi.org/10.1002/aelm.202500111","url":null,"abstract":"This work develops unique physical models for AlGaN/GaN-based Schottky barrier diodes (SBDs) grown on silicon (Si) substrates. The carrier transport and impact ionization processes are different from those of devices grown on sapphire substrates. Defects in the GaN epitaxial layer generate abundant leakage current and the impact ionization coefficients for the GaN layer shall be revised. The revised physical models are utilized to design SBDs with metal/Al₂O₃/GaN-based (MIS) Schottky contact. Both numerically calculated and experimentally measured results prove the benefits of the passivation effect by the Al₂O₃ thin layer. The increased effective energy barrier height suppresses the image-force-caused energy band-lowering effect. As a result, the reverse leakage current is reduced by 3 orders of magnitude when compared with the reference SBD. The revised physical models predict a ≈1100 V breakdown voltage (BV) for the MIS SBD with a specific ON-resistance (Ron,sp) of ≈3.98 mΩ cm2, which numbers are consistent with measured results. The revised physical models are also able to precisely study the electrical stress reliability such that the MIS-based Schottky contact can significantly reduce the surface trapping effect for electrons. This is proven by experimentally observing that the MIS SBD presents much stabler Ron,sp and turn-on voltage (Von) in different electrical-stress conditions.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"73 1","pages":""},"PeriodicalIF":6.2,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143758370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

High-Mobility p-Channel Thin-Film Transistors Based on Polycrystalline GeSn 基于多晶硒化镓的高迁移率 p 沟道薄膜晶体管

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-04-01 DOI: 10.1002/aelm.202400901

Kenta Moto, Shintaro Maeda, Kota Igura, Linyu Huang, Atsuki Morimoto, Keisuke Yamamoto, Kaoru Toko

GeSn has gained significant interest as a material for next-generation electronic devices, including thin-film transistors (TFTs) because of its excellent electronic properties. In this study, high-quality polycrystalline GeSn thin films are fabricated on glass substrates and fabricated high-performance TFTs. A bilayer structure with modulated deposition temperatures simultaneously suppressed nucleation and promoted growth, thereby enabling the formation of large-grained GeSn layers. The sample exhibited high Hall hole mobility (230 cm² V⁻¹ s⁻¹) and low hole concentration (4.1 × 10¹⁷ cm⁻³), which are the best electrical properties for polycrystalline Ge-based thin films applicable for accumulation-mode TFTs. The fabricated TFTs demonstrated field-effect mobility of up to 250 cm² V⁻¹ s⁻¹. This value is not only the highest for a polycrystalline Ge-based TFT, but also the highest for a p-channel TFT fabricated in a low-temperature process (≤500 °C). Thus, this study represents an important step toward the realization of high-performance TFTs using GeSn, which is a significant achievement that can contribute to the next generation of electronics technologies.

{"title":"High-Mobility p-Channel Thin-Film Transistors Based on Polycrystalline GeSn","authors":"Kenta Moto, Shintaro Maeda, Kota Igura, Linyu Huang, Atsuki Morimoto, Keisuke Yamamoto, Kaoru Toko","doi":"10.1002/aelm.202400901","DOIUrl":"https://doi.org/10.1002/aelm.202400901","url":null,"abstract":"GeSn has gained significant interest as a material for next-generation electronic devices, including thin-film transistors (TFTs) because of its excellent electronic properties. In this study, high-quality polycrystalline GeSn thin films are fabricated on glass substrates and fabricated high-performance TFTs. A bilayer structure with modulated deposition temperatures simultaneously suppressed nucleation and promoted growth, thereby enabling the formation of large-grained GeSn layers. The sample exhibited high Hall hole mobility (230 cm2 V−1 s−1) and low hole concentration (4.1 × 1017 cm−3), which are the best electrical properties for polycrystalline Ge-based thin films applicable for accumulation-mode TFTs. The fabricated TFTs demonstrated field-effect mobility of up to 250 cm2 V−1 s−1. This value is not only the highest for a polycrystalline Ge-based TFT, but also the highest for a p-channel TFT fabricated in a low-temperature process (≤500 °C). Thus, this study represents an important step toward the realization of high-performance TFTs using GeSn, which is a significant achievement that can contribute to the next generation of electronics technologies.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"52 1","pages":""},"PeriodicalIF":6.2,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143758368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Multi-Channel, Amorphous Oxide Thin-Film Transistor Exhibiting High Mobility of 67 cm2 V−1 s−1 and Excellent Stability 多通道非晶氧化物薄膜晶体管具有 67 cm2 V-1 s-1 的高迁移率和出色的稳定性

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-03-30 DOI: 10.1002/aelm.202400766

Mohammad Masum Billah, Md Mobaidul Islam, Sunaina Priyadarshi, Jung Bae Kim, Yang Ho Bae, Rodney Lim, Dejiu Fan, Zero Hung, Dong Kil Yim, Soo Yong Choi, Youron Lin, Juergen Grillmayer, Custer Ma, Lynn Yang, Julian Chen, Jin Jang

Multi-channel amorphous oxide thin-film transistors (TFTs) with dual gate (DG), coplanar structure are studied. The multi-channel consists of a top amorphous indium gallium zinc tin oxide (a-IGZTO) and a very thin amorphous indium zinc oxide (a-IZO) bottom layer. The fabricated TFTs exhibit high field-effect mobility (µ_FE) ≈67.1 cm² V⁻¹ s⁻¹, and excellent stability under positive bias temperature stress (PBTS). The band diagram of the multi-channel TFT is presented based on UV photoelectron spectroscopy, X-ray photoelectron spectroscopy, and UV–vis spectroscopy measurements. The PBTS robustness is interpreted as the formation of 2D electron gas (2DEG) at the a-IGZTO/a-IZO hetero-interface which extends to the bulk a-IZO layer. From thermalization energy (E_Th) analysis with the energy barrier to defect formation under PBTS, the multi-channel TFT exhibits the largest E_Th of 0.84 eV, which indicates that more stress energy is needed for threshold voltage shift during PBTS in the TFTs as compared to single-channel TFTs.

{"title":"Multi-Channel, Amorphous Oxide Thin-Film Transistor Exhibiting High Mobility of 67 cm2 V−1 s−1 and Excellent Stability","authors":"Mohammad Masum Billah, Md Mobaidul Islam, Sunaina Priyadarshi, Jung Bae Kim, Yang Ho Bae, Rodney Lim, Dejiu Fan, Zero Hung, Dong Kil Yim, Soo Yong Choi, Youron Lin, Juergen Grillmayer, Custer Ma, Lynn Yang, Julian Chen, Jin Jang","doi":"10.1002/aelm.202400766","DOIUrl":"https://doi.org/10.1002/aelm.202400766","url":null,"abstract":"Multi-channel amorphous oxide thin-film transistors (TFTs) with dual gate (DG), coplanar structure are studied. The multi-channel consists of a top amorphous indium gallium zinc tin oxide (a-IGZTO) and a very thin amorphous indium zinc oxide (a-IZO) bottom layer. The fabricated TFTs exhibit high field-effect mobility (µFE) ≈67.1 cm2 V−1 s−1, and excellent stability under positive bias temperature stress (PBTS). The band diagram of the multi-channel TFT is presented based on UV photoelectron spectroscopy, X-ray photoelectron spectroscopy, and UV–vis spectroscopy measurements. The PBTS robustness is interpreted as the formation of 2D electron gas (2DEG) at the a-IGZTO/a-IZO hetero-interface which extends to the bulk a-IZO layer. From thermalization energy (ETh) analysis with the energy barrier to defect formation under PBTS, the multi-channel TFT exhibits the largest ETh of 0.84 eV, which indicates that more stress energy is needed for threshold voltage shift during PBTS in the TFTs as compared to single-channel TFTs.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"73 1","pages":""},"PeriodicalIF":6.2,"publicationDate":"2025-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143737036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Impact of Al/Ti Electrodes on the Performance and Operational Stability of n-Channel Solution-Processed Solid-State Electrolyte-Gated Transistors: Applications in Reservoir Computing

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-03-30 DOI: 10.1002/aelm.202500038

Quanhua Chen, Xiang Wan, Walid Boukhili, Jie Yan, Hong Zhu, Lijian Chen, Chee Leong Tan, Zhihao Yu, Huabin Sun, Yong Xu, Dongyoon Khim

The impact of Al/Ti electrodes on enhancing the performance and operational stability of n-channel organic electrolyte-gated transistors (OEGTs) is investigated. Utilizing Al/Ti electrodes as source and drain electrodes in diketopyrrolopyrrole (DPP)-based polymeric semiconductor OEGTs leads to a significant decrease in the charge injection barrier for electrons, resulting in improvement of all electrical parameters including on-current, mobility, on-off ratio, and threshold voltages. Furthermore, through a comparative analysis of transistors utilizing polymer insulators and solid electrolytes as gate dielectrics, the effect of alterations in the electrodes on the contact resistance of each device is examined. In comparison to OEGTs with Au electrodes, OEGTs with Al/Ti electrodes demonstrate higher operational stability following multiple cycling tests. Finally, the OEGTs produced in this study demonstrate reliable short-term memory characteristics, which are subsequently utilized for reservoir computing, achieving a high recognition accuracy of 94% for spoken digits.

{"title":"Impact of Al/Ti Electrodes on the Performance and Operational Stability of n-Channel Solution-Processed Solid-State Electrolyte-Gated Transistors: Applications in Reservoir Computing","authors":"Quanhua Chen, Xiang Wan, Walid Boukhili, Jie Yan, Hong Zhu, Lijian Chen, Chee Leong Tan, Zhihao Yu, Huabin Sun, Yong Xu, Dongyoon Khim","doi":"10.1002/aelm.202500038","DOIUrl":"https://doi.org/10.1002/aelm.202500038","url":null,"abstract":"The impact of Al/Ti electrodes on enhancing the performance and operational stability of n-channel organic electrolyte-gated transistors (OEGTs) is investigated. Utilizing Al/Ti electrodes as source and drain electrodes in diketopyrrolopyrrole (DPP)-based polymeric semiconductor OEGTs leads to a significant decrease in the charge injection barrier for electrons, resulting in improvement of all electrical parameters including on-current, mobility, on-off ratio, and threshold voltages. Furthermore, through a comparative analysis of transistors utilizing polymer insulators and solid electrolytes as gate dielectrics, the effect of alterations in the electrodes on the contact resistance of each device is examined. In comparison to OEGTs with Au electrodes, OEGTs with Al/Ti electrodes demonstrate higher operational stability following multiple cycling tests. Finally, the OEGTs produced in this study demonstrate reliable short-term memory characteristics, which are subsequently utilized for reservoir computing, achieving a high recognition accuracy of 94% for spoken digits.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"36 1","pages":""},"PeriodicalIF":6.2,"publicationDate":"2025-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143737042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Toward an Internet of Things Circular Economy Using Printed Circuits on Reusable Steel Substrates

IF 5.3 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-03-30 DOI: 10.1002/aelm.202400529

Jeff Kettle, Rudra Mukherjee, Shoushou Zhang, Tianwei Zhang, Jonathan Harwell, Andrew Bainbridge, Mahmoud Wagih, Ana Martinez Diez, MariFe Menendez Suarez, Pascal Sanchez

There is a pressing need to reduce electronic waste, which along with government edicts and national time-bound policy directives are shaping the drive toward circular economy solutions in electronics. However, there is no industrially standardized approach for fabricating high-throughput recyclable and reusable electronic assemblies. Herein, we present the functionalization of steel over large areas with low-cost insulative intermediate layers as Printed Circuit Boards (PCBs), enabling an electronics circular economy. Roll-to-roll-friendly reusable steel substrates are coated using Sol–gel-based low-roughness insulative layers, with conductive tracks and solder pads additively manufactured with direct-write printing. To demonstrate how degradable 3D scaffolds could enable wireless applications, RF components, and wi-fi nodes are demonstrated with 3D-printed antennas showing the feasibility of broadband Internet of Things applications up to 6 GHz. At their end-of-life, the steel-based PCBs are sonicated in non-hazardous solvents allowing for the rapid recovery of components and precious metals. The environmental benefits of our approach are discussed using Life Cycle Assessments (LCA) and a comparative LCA between these scenarios has been undertaken. Consideration of the final product cost is given and potential business models to enter the electronics market are identified.

{"title":"Toward an Internet of Things Circular Economy Using Printed Circuits on Reusable Steel Substrates","authors":"Jeff Kettle, Rudra Mukherjee, Shoushou Zhang, Tianwei Zhang, Jonathan Harwell, Andrew Bainbridge, Mahmoud Wagih, Ana Martinez Diez, MariFe Menendez Suarez, Pascal Sanchez","doi":"10.1002/aelm.202400529","DOIUrl":"10.1002/aelm.202400529","url":null,"abstract":"There is a pressing need to reduce electronic waste, which along with government edicts and national time-bound policy directives are shaping the drive toward circular economy solutions in electronics. However, there is no industrially standardized approach for fabricating high-throughput recyclable and reusable electronic assemblies. Herein, we present the functionalization of steel over large areas with low-cost insulative intermediate layers as Printed Circuit Boards (PCBs), enabling an electronics circular economy. Roll-to-roll-friendly reusable steel substrates are coated using Sol–gel-based low-roughness insulative layers, with conductive tracks and solder pads additively manufactured with direct-write printing. To demonstrate how degradable 3D scaffolds could enable wireless applications, RF components, and wi-fi nodes are demonstrated with 3D-printed antennas showing the feasibility of broadband Internet of Things applications up to 6 GHz. At their end-of-life, the steel-based PCBs are sonicated in non-hazardous solvents allowing for the rapid recovery of components and precious metals. The environmental benefits of our approach are discussed using Life Cycle Assessments (LCA) and a comparative LCA between these scenarios has been undertaken. Consideration of the final product cost is given and potential business models to enter the electronics market are identified.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"11 5","pages":""},"PeriodicalIF":5.3,"publicationDate":"2025-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1002/aelm.202400529","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143737038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Low-Voltage and Stretchable Organic Field Effect Transistor Array Based on Tri-Layer Elastomer Dielectric for Gas Sensing

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-03-30 DOI: 10.1002/aelm.202400981

Xiaoying Zhang, Xiangxiang Li, Weiyu Wang, Hongchen Jiang, Xinran Zheng, Huiqi Yang, Xin Ye, Hui Yang

Stretchable organic field-effect transistors (OFETs) based gas sensors have attracted significant attention due to their inherent merits such as excellent mechanical compatibility, flexibility, and signal amplification capabilities. However, achieving low-voltage operation remains challenging, which limits their practical application. Herein, a tri-layer dielectric design is developed to achieve low-voltage, high-mobility stretchable organic transistors for gas sensors. The tri-layer dielectric, consisting of a high-κ polymer film, a non-polar polymer layer, and a cross-linking layer, allows the transistors to operate at −5 V. The stretchable transistor-based gas sensors exhibit high sensitivity of gas detection capability. Thus, stretchable field-effect transistors based on tri-layer dielectrics offer a promising strategy for advancing wearable gas sensors.

引用次数: 0

Advances of Carbon Nanotube Based Flexible Amplifiers for Skin-Mounted Physiological Signal Monitoring

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-03-28 DOI: 10.1002/aelm.202400991

Haitao Zhang, Yulong Yuan, Jian Hu, Li Xiang

Epidermal amplifiers, integral to noninvasive bio-signal monitoring that are in close proximity to the site of interest, have emerged as critical components in the evolution of wearable healthcare and diagnostics. Among various semiconducting materials, carbon nanotubes (CNTs) become one of the most promising candidates due to its great electronic properties. This review provides an overview of the recent developments in flexible amplifiers based on CNTs from the following aspects. The manufacturing strategies for CNT thin-film transistors (TFTs) are first discussed that preserve device integrity and performance from rigid to flexible platforms. The subsequent content concludes the recent development in CNT TFTs, including film deposition processes, high-k dielectric materials, and scaling behaviors, which are pivotal for enhancing the performance of flexible systems. The review further details various circuit topologies, from inverter-based to differential amplifiers, each offering unique advantages in gain, noise rejection, and bandwidth. Successful CNT-based amplifier implementations for physiological signal monitoring are highlighted, emphasizing their impact on wearable electronics. Finally, it discusses the challenges and future prospects of CNT-based flexible amplifiers, charting a course for the next generation of flexible electronics in personal health monitoring.

{"title":"Advances of Carbon Nanotube Based Flexible Amplifiers for Skin-Mounted Physiological Signal Monitoring","authors":"Haitao Zhang, Yulong Yuan, Jian Hu, Li Xiang","doi":"10.1002/aelm.202400991","DOIUrl":"https://doi.org/10.1002/aelm.202400991","url":null,"abstract":"Epidermal amplifiers, integral to noninvasive bio-signal monitoring that are in close proximity to the site of interest, have emerged as critical components in the evolution of wearable healthcare and diagnostics. Among various semiconducting materials, carbon nanotubes (CNTs) become one of the most promising candidates due to its great electronic properties. This review provides an overview of the recent developments in flexible amplifiers based on CNTs from the following aspects. The manufacturing strategies for CNT thin-film transistors (TFTs) are first discussed that preserve device integrity and performance from rigid to flexible platforms. The subsequent content concludes the recent development in CNT TFTs, including film deposition processes, high-k dielectric materials, and scaling behaviors, which are pivotal for enhancing the performance of flexible systems. The review further details various circuit topologies, from inverter-based to differential amplifiers, each offering unique advantages in gain, noise rejection, and bandwidth. Successful CNT-based amplifier implementations for physiological signal monitoring are highlighted, emphasizing their impact on wearable electronics. Finally, it discusses the challenges and future prospects of CNT-based flexible amplifiers, charting a course for the next generation of flexible electronics in personal health monitoring.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"31 1","pages":""},"PeriodicalIF":6.2,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143723528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Enhancing Thermoelectric Performance of Cd₃P₂ by Alloying with Dirac Material Cd₃As₂

IF 6.2 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials

Pub Date : 2025-03-27 DOI: 10.1002/aelm.202500034

Kunling Peng, Chenjian Fu, Yunzhen Du, Sikang Zheng, Meng Tian, Pengfei Gao, Jianjun Ying, Wenbin Yi, Xu Lu, Sheng Zhang, Guoyu Wang, Xiaoyuan Zhou

This study systematically explores the electrical and thermal properties of Cd₃P₂ by alloying it with the Dirac material Cd₃As₂, employing a combined experimental and theoretical approach. The findings demonstrate three distinct characteristics of this solid solution system: i) The continuous solid solution formation between Cd₃P₂ and Cd₃As₂ enables the tuning of the band structure. ii) Increasing As content leads to a reduction in effective mass, decreased deformation potential, and a substantial enhancement in carrier mobility. iii) The system exhibits phosphorus vacancy generation, which creates donor levels within the band gap and consequently impacts thermoelectric performance. Specifically, an ultrahigh mobility exceeding 7 × 10³ cm² V⁻¹ s⁻¹ is achieved in Cd₃PAs. This substantial improvement in mobility across the entire temperature range resulted in a twofold increase in the power factor and a marked enhancement in thermoelectric performance, particularly in the low-temperature region. These results provide foundational insights into the thermoelectric behavior governed by the interplay between the semiconductor Cd₃P₂ and the Dirac material Cd₃As₂, establishing a framework for further research and performance optimization of this solid solution system.

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