Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188944
L. L. Pfitscher, D. Bernardon, L. M. Kopp, M. Heckler, J. Behrens, P. Montani, B. Thomé
This paper presents a complete solution for the automated irrigation of rice crops using water level sensors, remote supervision system (SCADA) and wireless communication (GPRS). The proposed system is tested in four irrigation areas of small scale (10m × 20m). Ultrasonic sensors are used to measure the water level in the field. The control of the crop conditions is done by a dedicated controller, which eliminates the need for a computer on site. In addition, the controller has an interface that allows access to its parameters and also switching over to a standard operation in case of loss of communication with the supervisory system. The main result of this work is the efficient use of water and electricity on the farm.
{"title":"Automatic control of irrigation systems aiming at high energy efficiency in rice crops","authors":"L. L. Pfitscher, D. Bernardon, L. M. Kopp, M. Heckler, J. Behrens, P. Montani, B. Thomé","doi":"10.1109/ICCDCS.2012.6188944","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188944","url":null,"abstract":"This paper presents a complete solution for the automated irrigation of rice crops using water level sensors, remote supervision system (SCADA) and wireless communication (GPRS). The proposed system is tested in four irrigation areas of small scale (10m × 20m). Ultrasonic sensors are used to measure the water level in the field. The control of the crop conditions is done by a dedicated controller, which eliminates the need for a computer on site. In addition, the controller has an interface that allows access to its parameters and also switching over to a standard operation in case of loss of communication with the supervisory system. The main result of this work is the efficient use of water and electricity on the farm.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127739778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188946
G. Mariniello, R. Doria, M. de Souza, M. Pavanello, R. Trevisoli
Junctionless transistors can be an excellent alternative for extremely scaled MOSFETs as they present a good behavior with no doping gradients between channel and source/drain regions. This paper aims at analyzing the gate capacitance (Cgg) of junctionless transistors dependence with the three most important technological parameters for these devices: doping concentration (ND), fin width (Wfin) and fin height (Hfin).
{"title":"Analysis of gate capacitance of n-type junctionless transistors using three-dimensional device simulations","authors":"G. Mariniello, R. Doria, M. de Souza, M. Pavanello, R. Trevisoli","doi":"10.1109/ICCDCS.2012.6188946","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188946","url":null,"abstract":"Junctionless transistors can be an excellent alternative for extremely scaled MOSFETs as they present a good behavior with no doping gradients between channel and source/drain regions. This paper aims at analyzing the gate capacitance (Cgg) of junctionless transistors dependence with the three most important technological parameters for these devices: doping concentration (ND), fin width (Wfin) and fin height (Hfin).","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128452599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188934
Y. H. Sun, X. Qi, A. Z. Ramírez
In this paper, a methodology for combined simulation (co-sim) of power and signal to ensure a proper signal-to-power-ground ratio in vertical connections is presented. Capturing the vertical return current, power-to-signal, and signal-to-signal crosstalk simultaneously and accurately requires the modeling of the entire memory channel using 3D tools. Combined simulations allow a highly sensitive analysis in the design of vertical return path such as plated-through-hole (PTH) and ball grid array (BGA) connections. Proposed co-sim methodology is demonstrated with GDDR5 memory channel simulations based on two validation boards with a throughput-computing, high-performance processor. As a result of the analysis, design guidelines and recommendations were defined.
{"title":"The 3D modeling and SI/PI co-sim analysis for mixed-referenced high speed GDDR5","authors":"Y. H. Sun, X. Qi, A. Z. Ramírez","doi":"10.1109/ICCDCS.2012.6188934","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188934","url":null,"abstract":"In this paper, a methodology for combined simulation (co-sim) of power and signal to ensure a proper signal-to-power-ground ratio in vertical connections is presented. Capturing the vertical return current, power-to-signal, and signal-to-signal crosstalk simultaneously and accurately requires the modeling of the entire memory channel using 3D tools. Combined simulations allow a highly sensitive analysis in the design of vertical return path such as plated-through-hole (PTH) and ball grid array (BGA) connections. Proposed co-sim methodology is demonstrated with GDDR5 memory channel simulations based on two validation boards with a throughput-computing, high-performance processor. As a result of the analysis, design guidelines and recommendations were defined.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121103070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188906
K. Wincza, S. Gruszczynski
The design of a miniaturized broadband 4 × 4 Butler matrix has been presented. The designed Butler matrix utilizes the developed single-section coupled-line 3-dB/90° directional couplers designed with the use of a quasi-lumped element technique. The broadband 45° phase shifters have been realized as a tandem connection of two such couplers providing simultaneously transmission-line crossover. The measurement results of the developed miniaturized broadband 4 × 4 Butler matrix operating in the frequency range 1.6-1.6 GHz are shown.
{"title":"Miniaturized broadband 4 × 4 Butler matrix designed with the use of quasi-lumped coupled-line couplers","authors":"K. Wincza, S. Gruszczynski","doi":"10.1109/ICCDCS.2012.6188906","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188906","url":null,"abstract":"The design of a miniaturized broadband 4 × 4 Butler matrix has been presented. The designed Butler matrix utilizes the developed single-section coupled-line 3-dB/90° directional couplers designed with the use of a quasi-lumped element technique. The broadband 45° phase shifters have been realized as a tandem connection of two such couplers providing simultaneously transmission-line crossover. The measurement results of the developed miniaturized broadband 4 × 4 Butler matrix operating in the frequency range 1.6-1.6 GHz are shown.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124109622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188883
P. Paez-Garcia, V. Cabrera-Arenas, L. Reséndiz-Mendoza
P3HT: PCBM blend films with different weight ratios were analyzed by calculating the number of photons absorbed under the standard AM 1.5 solar spectrum. Although the absorbed photons reduced, we found that the performance of PCBM:P3HT-based solar cells was not so affected by absorption spectra modifications as it was affected by the degradation mechanism of excitons dissociation and/or the transport properties of charge when increasing PCBM content. This analysis provide additional evidence for understanding the fact that the best power conversion efficiency can be reach using similar contents of P3HT and PCBM.
{"title":"Solar light absorption in organic photovoltaic devices based on P3HT:PCBM blend films","authors":"P. Paez-Garcia, V. Cabrera-Arenas, L. Reséndiz-Mendoza","doi":"10.1109/ICCDCS.2012.6188883","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188883","url":null,"abstract":"P3HT: PCBM blend films with different weight ratios were analyzed by calculating the number of photons absorbed under the standard AM 1.5 solar spectrum. Although the absorbed photons reduced, we found that the performance of PCBM:P3HT-based solar cells was not so affected by absorption spectra modifications as it was affected by the degradation mechanism of excitons dissociation and/or the transport properties of charge when increasing PCBM content. This analysis provide additional evidence for understanding the fact that the best power conversion efficiency can be reach using similar contents of P3HT and PCBM.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"51 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123882350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188910
C. Jin, M. T. Tan, K. See
This paper presents a fully integrated filterless Class D amplifier embodying a peak detector to improve the power efficiency at low power range. The peak detector monitors the switching frequency accordingly by sensing the amplitude of the input signal. The Class D amplifier is fabricated using 0.18μm CMOS technology with a total area of 1 mm2. From our measurements, the proposed design has high power efficiency (>;86%) for a wide output power range (50 mW-700 mW). Our design maintains very good low total harmonic distortion (THD) (<;0.09%) over both entire modulation index range and the audio band of interest (100 Hz-6 kHz).
{"title":"High-efficiency filterless Class D amplifier with peak detector","authors":"C. Jin, M. T. Tan, K. See","doi":"10.1109/ICCDCS.2012.6188910","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188910","url":null,"abstract":"This paper presents a fully integrated filterless Class D amplifier embodying a peak detector to improve the power efficiency at low power range. The peak detector monitors the switching frequency accordingly by sensing the amplitude of the input signal. The Class D amplifier is fabricated using 0.18μm CMOS technology with a total area of 1 mm2. From our measurements, the proposed design has high power efficiency (>;86%) for a wide output power range (50 mW-700 mW). Our design maintains very good low total harmonic distortion (THD) (<;0.09%) over both entire modulation index range and the audio band of interest (100 Hz-6 kHz).","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127183008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188937
J. Tinoco, J. Alvarado, A. G. Martinez-Lopez, Benjamin Iniguez, A. Cerdeira
In this paper, we develop an analytical model to simulate strained silicon NMOSFETs, which allows to describe the drain current. Numerical simulations were performed in order to validate the model, where different technological parameters were considered (e.g. impurity concentrations in Si1-yGey and strained-silicon films). A good agreement with numerical simulations has been obtained.
{"title":"Drain current model for bulk strained silicon NMOSFETs","authors":"J. Tinoco, J. Alvarado, A. G. Martinez-Lopez, Benjamin Iniguez, A. Cerdeira","doi":"10.1109/ICCDCS.2012.6188937","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188937","url":null,"abstract":"In this paper, we develop an analytical model to simulate strained silicon NMOSFETs, which allows to describe the drain current. Numerical simulations were performed in order to validate the model, where different technological parameters were considered (e.g. impurity concentrations in Si1-yGey and strained-silicon films). A good agreement with numerical simulations has been obtained.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115814801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188877
R. Picos, J. Font, E. Garcia, Á. Pineda, J. Cesari
We present the design and experimental characterization of a magnetic field sensor. This sensor is based on an array of Hall resistors and uses lateral BJTs as active elements to read the effect of the magnetic field on it. Its output is in current mode, instead of the more frequent voltage mode. Results show that a raw sensibility of 5mA/T can be achieved, with no measurable hysteresis.
{"title":"Design and experimental characterization of a magnetic field sensor","authors":"R. Picos, J. Font, E. Garcia, Á. Pineda, J. Cesari","doi":"10.1109/ICCDCS.2012.6188877","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188877","url":null,"abstract":"We present the design and experimental characterization of a magnetic field sensor. This sensor is based on an array of Hall resistors and uses lateral BJTs as active elements to read the effect of the magnetic field on it. Its output is in current mode, instead of the more frequent voltage mode. Results show that a raw sensibility of 5mA/T can be achieved, with no measurable hysteresis.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131101033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188882
I. Mejia, A. Salas-Villaseñor, Adrian Avendaño-Bolívar, B. Gnade, M. Quevedo-López
In this work we demonstrate that the unified model and parameter extraction method (UMEM) can be used to describe the behavior of hybrid complementary metal-oxide-semiconductor thin film transistors (CMOS TFTs) fabricated with cadmium sulfide (CdS) and pentacene as n-type and p-type active layer, respectively. Both devices were fabricated using a bottom gate configuration and top source-drain (SD) contacts. In particular, we describe the effect of semiconductor defects using the effective medium approximation, which considers a localized charge distribution in the bandgap of the semiconductor. Extracted parameters from UMEM were used in HSPICE to simulate the CMOS inverters fabricated previously by our group.
{"title":"Modeling and SPICE simulation of CdS-pentacene hybrid CMOS TFTs","authors":"I. Mejia, A. Salas-Villaseñor, Adrian Avendaño-Bolívar, B. Gnade, M. Quevedo-López","doi":"10.1109/ICCDCS.2012.6188882","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188882","url":null,"abstract":"In this work we demonstrate that the unified model and parameter extraction method (UMEM) can be used to describe the behavior of hybrid complementary metal-oxide-semiconductor thin film transistors (CMOS TFTs) fabricated with cadmium sulfide (CdS) and pentacene as n-type and p-type active layer, respectively. Both devices were fabricated using a bottom gate configuration and top source-drain (SD) contacts. In particular, we describe the effect of semiconductor defects using the effective medium approximation, which considers a localized charge distribution in the bandgap of the semiconductor. Extracted parameters from UMEM were used in HSPICE to simulate the CMOS inverters fabricated previously by our group.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131209142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-03-14DOI: 10.1109/ICCDCS.2012.6188905
S. Gruszczynski, K. Wincza
The design of a miniaturized broadband Wilkinson power divider has been presented. To achieve broadband frequency response a three-section coupled-line structure has been used. All coupled-line sections have been realized with the use of a quasi-lumped-element approach, which allowed for significant miniaturization of the resulting network. Each coupled-line section has been designed with the use of a three-section equivalent circuit for which analytical expressions describing the required values of the lumped elements are given.
{"title":"Miniaturized broadband multisection coupled-line wilkinson power divider designed with the use of quasi-lumped element technique","authors":"S. Gruszczynski, K. Wincza","doi":"10.1109/ICCDCS.2012.6188905","DOIUrl":"https://doi.org/10.1109/ICCDCS.2012.6188905","url":null,"abstract":"The design of a miniaturized broadband Wilkinson power divider has been presented. To achieve broadband frequency response a three-section coupled-line structure has been used. All coupled-line sections have been realized with the use of a quasi-lumped-element approach, which allowed for significant miniaturization of the resulting network. Each coupled-line section has been designed with the use of a three-section equivalent circuit for which analytical expressions describing the required values of the lumped elements are given.","PeriodicalId":125743,"journal":{"name":"2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131301920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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