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Distributed Resilient Secondary Control for AC Microgrids Against Hybrid Attacks 针对混合攻击的交流微电网分布式弹性二级控制
IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-09-04 DOI: 10.1109/TCSI.2024.3449896
Jianwen Zhang;Sha Fan;Chao Deng;Bohui Wang;Xiangpeng Xie
In this paper, the distributed secondary voltage and frequency restoration problem is addressed in AC microgrid systems subjected to hybrid false data injection (FDI) and denial-of-service (DoS) attacks. Firstly, a new distributed resilient iterative estimator based on the k-step estimation method is proposed that can accurately estimate the FDI attack signals as well as the voltage and frequency of each distributed generation (DG) even under the impact of DoS attacks. Then, based on the mean value of the attack estimation signal, a distributed resilient secondary controller is designed to compensate for the considered hybrid attacks. Compared with existing researches on resilient control of AC microgrids under hybrid attacks, the voltage and frequency regulation errors of the microgrid system converge to zero for the first time. Finally, the precise convergence of voltage and frequency in the AC microgrid system under the proposed method is verified through a real-time controller-hardware-in-the-loop experiment in OPAL-RT.
本文探讨了交流微电网系统在受到混合虚假数据注入(FDI)和拒绝服务(DoS)攻击时的分布式二次电压和频率恢复问题。首先,提出了一种基于 k 步估计法的新型分布式弹性迭代估计器,即使在 DoS 攻击的影响下,也能准确估计 FDI 攻击信号以及各分布式发电(DG)的电压和频率。然后,基于攻击估计信号的平均值,设计了一种分布式弹性二次控制器来补偿所考虑的混合攻击。与现有的混合攻击下交流微电网弹性控制研究相比,微电网系统的电压和频率调节误差首次收敛为零。最后,通过在 OPAL-RT 中进行实时控制器-硬件在环实验,验证了所提方法下交流微电网系统电压和频率的精确收敛性。
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引用次数: 0
Firefly: A Versatile Experimental Platform for Oscillator-Based Ising Machines 萤火虫:基于振荡器的伊辛机的多功能实验平台
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-09-04 DOI: 10.1109/tcsi.2024.3448531
Markus Graber, Klaus Hofmann
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引用次数: 0
An Energy-Efficient Capacitive-RRAM Content Addressable Memory 高能效电容式 RAM 内容寻址存储器
IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-09-04 DOI: 10.1109/TCSI.2024.3451707
Yihan Pan;Adrian Wheeldon;Mohammed Mughal;Shady Agwa;Themis Prodromakis;Alexantrou Serb
Content addressable memory is popular in intelligent computing systems as it allows parallel content-searching in memory. Emerging CAMs show a promising increase in bitcell density and a decrease in power consumption than pure CMOS solutions. This article introduced an energy-efficient 3T1R1C TCAM cooperating with capacitor dividers and RRAM devices. The RRAM as a storage element also acts as a switch to the capacitor divider while searching for content. CAM cells benefit from working parallel in an array structure. We implemented a $64times 64$ array and digital controllers to perform with an internal built-in clock frequency of 875MHz. Both data searches and reads take three clock cycles. Its worst average energy for data match is reported to be 1.71fJ/bit-search and the worst average energy for data miss is found at 4.69fJ/bit-search. The prototype is simulated and fabricated in 0.18um technology with in-lab RRAM post-processing. Such memory explores the charge domain searching mechanism and can be applied to data centers that are power-hungry.
内容可寻址存储器允许在存储器中并行搜索内容,因此在智能计算系统中很受欢迎。与纯 CMOS 解决方案相比,新兴的 CAM 有望提高位元密度并降低功耗。本文介绍了一种与电容分压器和 RRAM 器件配合使用的高能效 3T1R1C TCAM。作为存储元件的 RRAM 在搜索内容时还充当电容分压器的开关。CAM 单元可从阵列结构的并行工作中获益。我们采用了一个 64 美元乘 64 美元的阵列和数字控制器,以 875MHz 的内部内置时钟频率运行。数据搜索和读取都需要三个时钟周期。据报告,数据匹配的最差平均能量为 1.71fJ/比特-搜索,数据缺失的最差平均能量为 4.69fJ/比特-搜索。该原型采用 0.18um 技术进行模拟和制造,并在实验室内进行了 RRAM 后处理。这种存储器探索了电荷域搜索机制,可应用于功耗较高的数据中心。
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引用次数: 0
A 3.5 GS/s 1-1 MASH VCO ADC With Second-Order Noise Shaping 具有二阶噪声整形功能的 3.5 GS/s 1-1 MASH VCO ADC
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-09-04 DOI: 10.1109/tcsi.2024.3450570
Brendan Saux, Jonas Borgmans, Johan Raman, Pieter Rombouts
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引用次数: 0
DCAP: A Scalable Decoupled-Clustering Annealing Processor for Large-Scale Traveling Salesman Problems DCAP:用于大规模旅行推销员问题的可扩展解耦聚类退火处理器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-09-02 DOI: 10.1109/tcsi.2024.3449693
Zhanhong Huang, Yang Zhang, Xiangrui Wang, Dong Jiang, Enyi Yao
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引用次数: 0
A Node-Based Polar List Decoder With Frame Interleaving and Ensemble Decoding Support 支持帧交错和集合解码的基于节点的极性列表解码器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-09-02 DOI: 10.1109/tcsi.2024.3443598
Yuqing Ren, Leyu Zhang, Ludovic Damien Blanc, Yifei Shen, Xinwei Li, Alexios Balatsoukas-Stimming, Chuan Zhang, Andreas Burg
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引用次数: 0
An All NMOS KY-Boost Converter With Double Injection Control for Fast Line and Load Transient Response 具有双注入控制功能的全 NMOS KY 升压转换器,可实现快速线路和负载瞬态响应
IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-09-02 DOI: 10.1109/TCSI.2024.3446884
Yu-Ting Hung;Chieh-Ju Tsai;Ching-Jan Chen;Chan-Hsuan Hsu;Chun-Yu Hsieh
In this paper, a KY-boost converter with double injection control for the mobile devices is presented. The conventional boost converter suffers from several issues, including large output voltage ripples and slow line and load transient responses. A KY-boost converter is a good candidate to overcome the above drawbacks which has buck-like characteristics. A KY boost converter integrated circuit (IC) is proposed in this paper to achieve better line and load transient responses with the smallest chip size compared with the prior arts. A double injection control is proposed in the KY-boost converter to improve line transient response without affecting loop gain and load transient response. Besides, the issues of start-up and larger chip size for KY converter are improved by the all NMOS power stage design with cross-coupled gate driver. The proposed KY-boost converter IC was fabricated with 0.18- $mu $ m CMOS process, and the overall chip area is 1.1 mm2 including pads. The measured peak efficiency of this work can achieve 92.95%. When the proposed double injection control is enabled, the output voltage deviation during line transition can be reduced by more than 200% from 80 mV to 36 mV compared with input voltage feedforward control.
本文介绍了一种采用双注入控制的 KY 升压转换器,适用于移动设备。传统的升压转换器存在几个问题,包括输出电压纹波大、线路和负载瞬态响应慢。KY 升压转换器具有降压特性,是克服上述缺点的理想选择。本文提出了一种 KY 升压转换器集成电路 (IC),与现有技术相比,它能以最小的芯片尺寸实现更好的线路和负载瞬态响应。在 KY 升压转换器中提出了双注入控制,以在不影响环路增益和负载瞬态响应的情况下改善线路瞬态响应。此外,通过采用交叉耦合栅极驱动器的全 NMOS 功率级设计,KY 转换器的启动和较大芯片尺寸问题也得到了改善。所提出的 KY 升压转换器集成电路采用 0.18 英寸 CMOS 工艺制造,包括焊盘在内的整体芯片面积为 1.1 平方毫米。实测峰值效率可达 92.95%。与输入电压前馈控制相比,当启用所提出的双注入控制时,线路转换期间的输出电压偏差可从 80 mV 降至 36 mV,降幅超过 200%。
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引用次数: 0
A Novel Single-Stage Single-Phase Dual-Output Hybrid Converter 新型单级单相双输出混合转换器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-30 DOI: 10.1109/tcsi.2024.3447837
Shri Prakash Sonkar, Dong-Choon Lee, Honnyong Cha
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引用次数: 0
An Ultra-Low Phase Noise Dual-Tank Oscillator Featuring Tank Impedance Scaling 具有槽阻抗缩放功能的超低相位噪声双槽振荡器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-30 DOI: 10.1109/tcsi.2024.3443752
Fariborz Lohrabi Pour, Dong Sam Ha, Amir Nikpaik
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引用次数: 0
$DeltaSigma$ Modulators Employing MASH DSM DAC-Based Dual Quantization 采用基于 MASH DSM DAC 的双量化的 $DeltaSigma$ 调制器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-30 DOI: 10.1109/tcsi.2024.3448224
Ahmed Abdelaal, Michael Pietzko, John G. Kauffman, Ankesh Jain, Maurits Ortmanns
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引用次数: 0
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