Pub Date : 2025-08-28DOI: 10.1109/TCSI.2025.3599057
{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors","authors":"","doi":"10.1109/TCSI.2025.3599057","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3599057","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 9","pages":"5299-5299"},"PeriodicalIF":5.2,"publicationDate":"2025-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11143802","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-28DOI: 10.1109/TCSI.2025.3589034
Georges Gielen;Jan Craninckx;Hongyang Jia
{"title":"Guest Editorial TCAS-I Special Issue on the ESSERC 2024 Conference","authors":"Georges Gielen;Jan Craninckx;Hongyang Jia","doi":"10.1109/TCSI.2025.3589034","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3589034","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 9","pages":"4406-4407"},"PeriodicalIF":5.2,"publicationDate":"2025-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11143804","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-28DOI: 10.1109/TCSI.2025.3599059
{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information","authors":"","doi":"10.1109/TCSI.2025.3599059","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3599059","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 9","pages":"C2-C2"},"PeriodicalIF":5.2,"publicationDate":"2025-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11143805","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144914268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-26DOI: 10.1109/TCSI.2025.3599209
Arun Kumar;Nishant Kumar
This paper introduces a smart Digital Twin (DT) framework for a single-phase grid-integrated solar photovoltaic (SPV) inverter system that ensures advanced fault diagnostics and optimized operational performance. The DT is mathematically formalized using state-space equations modelling, functioning as a virtual counterpart to the physical system (PS). Real-time synchronization is achieved through high-fidelity sensor data acquisition within PS, enabling continuous monitoring and adaptive control. A rigorously formulated objective function, integrating empirical PS data and mathematically inferred parameters, underpins the optimization process, ensuring a superior digital representation. The critical system parameters, including ON-state resistance variations of switches, capacitance drifts, and inductor losses, are dynamically calibrated through an Electrostatic & Electromagnetic Field Discharge-Hybrid Optimization (E2FD-HO), a physics-driven optimization algorithm. The DT not only enables data-driven fault diagnostics but also proactively mitigates operational instabilities through real-time predictive control strategies. The control for the system is implemented within the FPGA-based controller (NI-sbRIO-9636) and the proposed DT framework is implemented on the OPAL-RT setup. The results of DT in comparison to hardware results of PS demonstrate an exceptional percentage matching score (PSM) of DT & PS, above than 98.5%, confirms its robustness and predictive precision. The developed DT offers a transformative approach to SPV inverter diagnosis, advancing circuit-level intelligence in smart energy systems.
{"title":"Digital Twin Framework for 1-Phase Grid-Tied PV System: A Frequency Domain Modeling and E2FD-HO-Based Approach for Power Electronic Circuits","authors":"Arun Kumar;Nishant Kumar","doi":"10.1109/TCSI.2025.3599209","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3599209","url":null,"abstract":"This paper introduces a smart Digital Twin (DT) framework for a single-phase grid-integrated solar photovoltaic (SPV) inverter system that ensures advanced fault diagnostics and optimized operational performance. The DT is mathematically formalized using state-space equations modelling, functioning as a virtual counterpart to the physical system (PS). Real-time synchronization is achieved through high-fidelity sensor data acquisition within PS, enabling continuous monitoring and adaptive control. A rigorously formulated objective function, integrating empirical PS data and mathematically inferred parameters, underpins the optimization process, ensuring a superior digital representation. The critical system parameters, including ON-state resistance variations of switches, capacitance drifts, and inductor losses, are dynamically calibrated through an Electrostatic & Electromagnetic Field Discharge-Hybrid Optimization (E2FD-HO), a physics-driven optimization algorithm. The DT not only enables data-driven fault diagnostics but also proactively mitigates operational instabilities through real-time predictive control strategies. The control for the system is implemented within the FPGA-based controller (NI-sbRIO-9636) and the proposed DT framework is implemented on the OPAL-RT setup. The results of DT in comparison to hardware results of PS demonstrate an exceptional percentage matching score (PSM) of DT & PS, above than 98.5%, confirms its robustness and predictive precision. The developed DT offers a transformative approach to SPV inverter diagnosis, advancing circuit-level intelligence in smart energy systems.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"73 3","pages":"2216-2225"},"PeriodicalIF":5.2,"publicationDate":"2025-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147287883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-25DOI: 10.1109/TCSI.2025.3594347
Muhammad Rizwan Khan;Xun Liu;Xin Zhang;Cheng Huang
This paper proposes convergence enhancement to state-space averaging (SSA) methodology for steady-state and small-signal analysis of high-ratio hybrid DC-DC converters, first using analysis of Double-Step-Down (DSD) topology, including parasitics, as an example, then extending to other hybrid topologies with different numbers of capacitors and inductors. The enhanced SSA method can be used to: 1) derive small-signal control-to-output transfer functions, which is essential to optimize the compensator for fast and stable closed-loop operation; 2) calculate steady-state inductor currents, output voltage, input current and the voltage(s) across the flying capacitor(s), $V_{CFs}$ , which is important to determine steady-state characteristics and performance; 3) include circuit non-idealities such as parasitics and timing mismatches; and 4) evaluate $V_{CF}$ balancing property by the proposed matrix invertibility principle and added constants, and determine whether dedicated $V_{CF}$ balancing circuits can be eliminated, which is considered an important benefit with reduced complexity and improved reliability. The theoretical results of DSD are then plotted in MATLAB and verified in simulations using PSIM and Cadence periodic transfer function (PXF) analysis, and measurement results using GaN devices. The simulation and measurement results match well with theoretical analysis. The enhancement is then extended beyond the DSD topology to analyze emerging hybrid topologies with more switched inductors and capacitors, future-proofing its capability to be applicable to new hybrid topologies.
{"title":"Steady-State and Small-Signal Analysis of High-Ratio Hybrid Buck Converters With Enhancement to State-Space-Averaging Methodology","authors":"Muhammad Rizwan Khan;Xun Liu;Xin Zhang;Cheng Huang","doi":"10.1109/TCSI.2025.3594347","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3594347","url":null,"abstract":"This paper proposes convergence enhancement to state-space averaging (SSA) methodology for steady-state and small-signal analysis of high-ratio hybrid DC-DC converters, first using analysis of Double-Step-Down (DSD) topology, including parasitics, as an example, then extending to other hybrid topologies with different numbers of capacitors and inductors. The enhanced SSA method can be used to: <italic>1)</i> derive small-signal control-to-output transfer functions, which is essential to optimize the compensator for fast and stable closed-loop operation; <italic>2)</i> calculate steady-state inductor currents, output voltage, input current and the voltage(s) across the flying capacitor(s), <inline-formula> <tex-math>$V_{CFs}$ </tex-math></inline-formula>, which is important to determine steady-state characteristics and performance; <italic>3)</i> include circuit non-idealities such as parasitics and timing mismatches; and <italic>4)</i> evaluate <inline-formula> <tex-math>$V_{CF}$ </tex-math></inline-formula> balancing property by the proposed matrix invertibility principle and added constants, and determine whether dedicated <inline-formula> <tex-math>$V_{CF}$ </tex-math></inline-formula> balancing circuits can be eliminated, which is considered an important benefit with reduced complexity and improved reliability. The theoretical results of DSD are then plotted in MATLAB and verified in simulations using PSIM and Cadence periodic transfer function (PXF) analysis, and measurement results using GaN devices. The simulation and measurement results match well with theoretical analysis. The enhancement is then extended beyond the DSD topology to analyze emerging hybrid topologies with more switched inductors and capacitors, future-proofing its capability to be applicable to new hybrid topologies.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"73 2","pages":"1486-1499"},"PeriodicalIF":5.2,"publicationDate":"2025-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146071179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper proposes a resilient output feedback tube-based model predictive control (MPC) approach for constrained cyber-physical systems (CPSs) to handle the impact of stochastic hybrid attacks, where the hybrid attacks include false data injection (FDI) attacks and denial-of-service (DoS) attacks that occur in the sensor-controller (S-C) and controller-actuator (C-A) channels, respectively. The anomalous behavior of the attacker is revealed by the designed attack detector and comparator, which provide alert signals that guide the primary and auxiliary controllers to collaboratively generate control inputs as well as a nominal trajectory. The tolerable attack duration is determined by using the concept of $mu $ -step robust positive invariant ($mu $ -RPI) set, which limits the size of the deviation between the observer and the nominal trajectory under the hybrid attacks. Robust constraint satisfaction and robust asymptotic stability are ensured by restricting the state of the system to a tube centered on a nominal trajectory that converges gradually to the origin, and theoretical guarantees are provided. Finally, the effectiveness of the designed algorithm is validated through a supply chain model, which includes comparisons with an inelastic scheme.
{"title":"Resilient Output Feedback Tube-Based MPC for Cyber-Physical Systems Under Hybrid Attacks","authors":"Huan Yang;Yaling Ma;Huahui Xie;Yasir Ali;Li Dai;Yuanqing Xia","doi":"10.1109/TCSI.2025.3597736","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3597736","url":null,"abstract":"This paper proposes a resilient output feedback tube-based model predictive control (MPC) approach for constrained cyber-physical systems (CPSs) to handle the impact of stochastic hybrid attacks, where the hybrid attacks include false data injection (FDI) attacks and denial-of-service (DoS) attacks that occur in the sensor-controller (S-C) and controller-actuator (C-A) channels, respectively. The anomalous behavior of the attacker is revealed by the designed attack detector and comparator, which provide alert signals that guide the primary and auxiliary controllers to collaboratively generate control inputs as well as a nominal trajectory. The tolerable attack duration is determined by using the concept of <inline-formula> <tex-math>$mu $ </tex-math></inline-formula>-step robust positive invariant (<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>-RPI) set, which limits the size of the deviation between the observer and the nominal trajectory under the hybrid attacks. Robust constraint satisfaction and robust asymptotic stability are ensured by restricting the state of the system to a tube centered on a nominal trajectory that converges gradually to the origin, and theoretical guarantees are provided. Finally, the effectiveness of the designed algorithm is validated through a supply chain model, which includes comparisons with an inelastic scheme.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"73 3","pages":"2107-2119"},"PeriodicalIF":5.2,"publicationDate":"2025-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147288175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-19DOI: 10.1109/TCSI.2025.3598794
Jian Deng;Yimin Deng;Haibin Duan
The emergence of homotopic path planning and tracking has shown great promise for cooperative swarm control. However, existing implementations lack efficient mechanisms for homotopy-constrained path tracking. In this paper, a bioinspired homotopic model predictive contouring control (HMPCC) method is proposed for cooperative path tracking in a fixed-wing unmanned aerial vehicle (UAV) swarm. Inspired by the hunting behavior and hierarchical social dynamics of Harris’s hawks, our proposed strategy can guide the entire swarm along trajectories within the same homotopy class. It simultaneously optimizes the swarm’s path tracking progress, enabling tight coordination while maintaining high tracking precision. Furthermore, the HMPCC method significantly reduces intra-swarm communication demands and does not require real-time state information from each individual UAV. Comparative simulations demonstrate that our proposed HMPCC method outperforms some current methods in path tracking accuracy, lap time, and overall coordination.
{"title":"Bioinspired Homotopic Model Predictive Contouring Control for Fixed-Wing Unmanned Aerial Vehicle Swarm","authors":"Jian Deng;Yimin Deng;Haibin Duan","doi":"10.1109/TCSI.2025.3598794","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3598794","url":null,"abstract":"The emergence of homotopic path planning and tracking has shown great promise for cooperative swarm control. However, existing implementations lack efficient mechanisms for homotopy-constrained path tracking. In this paper, a bioinspired homotopic model predictive contouring control (HMPCC) method is proposed for cooperative path tracking in a fixed-wing unmanned aerial vehicle (UAV) swarm. Inspired by the hunting behavior and hierarchical social dynamics of Harris’s hawks, our proposed strategy can guide the entire swarm along trajectories within the same homotopy class. It simultaneously optimizes the swarm’s path tracking progress, enabling tight coordination while maintaining high tracking precision. Furthermore, the HMPCC method significantly reduces intra-swarm communication demands and does not require real-time state information from each individual UAV. Comparative simulations demonstrate that our proposed HMPCC method outperforms some current methods in path tracking accuracy, lap time, and overall coordination.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"73 3","pages":"2143-2155"},"PeriodicalIF":5.2,"publicationDate":"2025-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147288183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-18DOI: 10.1109/TCSI.2025.3596129
Kamini Singh;Karun Rawat
This work presents a new design space of Extended continuous class-F (ECCF) power amplifiers with resistive second harmonic impedance after including the effect of non-linear drain-to-source capacitance $C_{mathbf {ds}}~_{mathbf {}}$ of a transistor. The expression of current waveforms is modified to include the impact of nonlinear drain to source capacitance in this mode. The analysis shows that this non-linear capacitance generates harmonic current, which alters the load trajectory on the Smith chart by achieving active and modified passive second harmonic loads. These active harmonic loads at the current reference plane of the transistor represent an active harmonic injection that increases the drain efficiency. Consequently, a design methodology is proposed to obtain passive loads for matching that ensures this active harmonic injection at the current reference plane of the transistor provides an efficiency improvement in the ECCF mode while maintaining the operation more than the octave frequency range. The proposed theory is validated by designing a power amplifier operating from 0.8-3.0 GHz (115.7% fractional bandwidth) with a measured drain efficiency of 57.24-70.3%, and an output power of 41.7-44.63 dBm. The power amplifier is also tested with modulated signals and linearized using digital predistortion to qualify spectral mask with a measured (Error Vector Magnitude) EVM of 1.54%.
{"title":"Non-Linearity Analysis of Drain-Source Capacitance in Extended Continuous Class-F Power Amplifier","authors":"Kamini Singh;Karun Rawat","doi":"10.1109/TCSI.2025.3596129","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3596129","url":null,"abstract":"This work presents a new design space of Extended continuous class-F (ECCF) power amplifiers with resistive second harmonic impedance after including the effect of non-linear drain-to-source capacitance <inline-formula> <tex-math>$C_{mathbf {ds}}~_{mathbf {}}$ </tex-math></inline-formula> of a transistor. The expression of current waveforms is modified to include the impact of nonlinear drain to source capacitance in this mode. The analysis shows that this non-linear capacitance generates harmonic current, which alters the load trajectory on the Smith chart by achieving active and modified passive second harmonic loads. These active harmonic loads at the current reference plane of the transistor represent an active harmonic injection that increases the drain efficiency. Consequently, a design methodology is proposed to obtain passive loads for matching that ensures this active harmonic injection at the current reference plane of the transistor provides an efficiency improvement in the ECCF mode while maintaining the operation more than the octave frequency range. The proposed theory is validated by designing a power amplifier operating from 0.8-3.0 GHz (115.7% fractional bandwidth) with a measured drain efficiency of 57.24-70.3%, and an output power of 41.7-44.63 dBm. The power amplifier is also tested with modulated signals and linearized using digital predistortion to qualify spectral mask with a measured (Error Vector Magnitude) EVM of 1.54%.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"73 1","pages":"735-747"},"PeriodicalIF":5.2,"publicationDate":"2025-08-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145929565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-18DOI: 10.1109/TCSI.2025.3597288
Jiawang Yue;Zhitao Liu;Hongye Su
This paper aims to develop a constant output voltage controller for dynamic wireless power transfer systems(DWPTSs) incorporating sensor noise filtering and fault tolerance. DWPTSs are designed to alleviate range anxiety in electric vehicles(EVs); however, the output voltage fluctuations are their significant drawback compared to static charging mode. Additionally, DWPTSs also face sensor measurement noise and potential faults that exacerbate system instability. To mitigate above challenges, a data-driven fault-tolerant control framework is designed for DWPTS based on a self-learning predictor, which implements constant voltage regulation with enhanced noise and fault immunity. Specifically, a self-learning predictor is integrated into the feedforward loop of a high-gain extended state observer (ESO) to filter sensor noise. Then, a data memory stack is constructed to store predicted states and estimated disturbances, and a concurrent learning algorithm is introduced to recover control gains online. Finally, a composite anti-disturbance control law is implemented to generate the required control signals for the charging circuit. A notable advantage of this scheme is its ability to simultaneously address both sensor noise and faults, ensuring a constant output voltage during EV driving. Experimental results validate that the designed control framework effectively eliminates output voltage fluctuations and measurement noise, even in the presence of sensor faults.
{"title":"Data-Driven Fault-Tolerant Control Framework for EV Dynamic Wireless Power Transfer System Based on Self-Learning Predictor","authors":"Jiawang Yue;Zhitao Liu;Hongye Su","doi":"10.1109/TCSI.2025.3597288","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3597288","url":null,"abstract":"This paper aims to develop a constant output voltage controller for dynamic wireless power transfer systems(DWPTSs) incorporating sensor noise filtering and fault tolerance. DWPTSs are designed to alleviate range anxiety in electric vehicles(EVs); however, the output voltage fluctuations are their significant drawback compared to static charging mode. Additionally, DWPTSs also face sensor measurement noise and potential faults that exacerbate system instability. To mitigate above challenges, a data-driven fault-tolerant control framework is designed for DWPTS based on a self-learning predictor, which implements constant voltage regulation with enhanced noise and fault immunity. Specifically, a self-learning predictor is integrated into the feedforward loop of a high-gain extended state observer (ESO) to filter sensor noise. Then, a data memory stack is constructed to store predicted states and estimated disturbances, and a concurrent learning algorithm is introduced to recover control gains online. Finally, a composite anti-disturbance control law is implemented to generate the required control signals for the charging circuit. A notable advantage of this scheme is its ability to simultaneously address both sensor noise and faults, ensuring a constant output voltage during EV driving. Experimental results validate that the designed control framework effectively eliminates output voltage fluctuations and measurement noise, even in the presence of sensor faults.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"73 2","pages":"1448-1459"},"PeriodicalIF":5.2,"publicationDate":"2025-08-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146071159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-14DOI: 10.1109/TCSI.2025.3586143
Sicong Jin;Xin Zhang;Dehong Xu
The cascaded solid-state transformer (SST) has garnered significant attention in recent years due to its modular advantages, offering improved scalability, efficiency, and fault-tolerant capabilities. However, the modeling of N-module cascaded SSTs and their impedance characteristics remains insufficiently explored, which could hinder the reliable integration of SSTs. To address this issue, this paper proposes a matrix-based modeling method to characterize the N-module SST and establish its corresponding impedance model. A universal module equivalent block diagram, accounting for arbitrary-order harmonic disturbances, is constructed through an initial matrix aggregation. Building upon this, a second matrix aggregation is performed to develop a system-wide equivalent block diagram, which accommodates any combination of modules, thus enabling standardized representation and modular expansion of the N-module SST. Based on the system equivalent block diagram, a transfer-matrix-based method is used to flexibly compute the SST impedance expression. Using the derived impedance model, the impact of factors such as module differences, operating conditions, and hardware parameters on port impedance is discussed. The influence of these factors on overall system stability is also discussed. Finally, the accuracy and validity of the impedance model, along with the related stability analysis, are verified through a hardware-in-the-loop (HIL) experimental setup.
{"title":"A Flexible Impedance Modeling Method and Stability Analysis Toward the Cascaded Solid-State Transformer","authors":"Sicong Jin;Xin Zhang;Dehong Xu","doi":"10.1109/TCSI.2025.3586143","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3586143","url":null,"abstract":"The cascaded solid-state transformer (SST) has garnered significant attention in recent years due to its modular advantages, offering improved scalability, efficiency, and fault-tolerant capabilities. However, the modeling of N-module cascaded SSTs and their impedance characteristics remains insufficiently explored, which could hinder the reliable integration of SSTs. To address this issue, this paper proposes a matrix-based modeling method to characterize the N-module SST and establish its corresponding impedance model. A universal module equivalent block diagram, accounting for arbitrary-order harmonic disturbances, is constructed through an initial matrix aggregation. Building upon this, a second matrix aggregation is performed to develop a system-wide equivalent block diagram, which accommodates any combination of modules, thus enabling standardized representation and modular expansion of the N-module SST. Based on the system equivalent block diagram, a transfer-matrix-based method is used to flexibly compute the SST impedance expression. Using the derived impedance model, the impact of factors such as module differences, operating conditions, and hardware parameters on port impedance is discussed. The influence of these factors on overall system stability is also discussed. Finally, the accuracy and validity of the impedance model, along with the related stability analysis, are verified through a hardware-in-the-loop (HIL) experimental setup.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"73 2","pages":"1420-1433"},"PeriodicalIF":5.2,"publicationDate":"2025-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146071148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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