Pub Date : 2025-08-04DOI: 10.1109/TED.2025.3592917
Yiping Zhang;Shunpeng Lu;Baiquan Liu;Huayu Gao;Yubu Zhou;Wenhui Fang;Zi-Hui Zhang;Swee Tiam Tan;Hilmi Volkan Demir;Xiao Wei Sun
Light-emitting diodes (LEDs) are essential for future energy-saving lighting and display technology owing to their high efficiency, long lifetime, and low cost. To further enhance the performance of GaN-based LEDs, electroluminescent (EL) cooling has been widely predicted to be useful over the past several decades; however, it has not been experimentally achieved. Herein, thermoelectric and phonon-pumped GaN-based LEDs have been demonstrated by both experimental measurements and theoretical modeling. It is surprisingly found that the effect of increasing temperature changes from negative to positive when the operating point is moved to the high-efficiency, midvoltage range. The power efficiency exhibits a maximum 2.24-fold improvement with increasing temperature (from room temperature to 473 K), and the peak efficiency at all elevated temperatures outperforms that at room temperature, where the Peltier effect changes from Peltier heat to Peltier cooling. Under lower biases, the phonon-assisted Peltier cooling provides additional energy for carriers to overcome the potential barrier and achieve recombination. The findings not only give an insightful understanding of EL cooling but also provide guidelines on thermal management and designing high-performance GaN-based LED devices and arrays (e.g., micro-LEDs), which can be further extended to other kinds of LEDs and optoelectronic devices.
{"title":"Observation of Peltier Cooling and Great Potential of Electroluminescent Cooling in GaN-Based Light-Emitting Diodes","authors":"Yiping Zhang;Shunpeng Lu;Baiquan Liu;Huayu Gao;Yubu Zhou;Wenhui Fang;Zi-Hui Zhang;Swee Tiam Tan;Hilmi Volkan Demir;Xiao Wei Sun","doi":"10.1109/TED.2025.3592917","DOIUrl":"https://doi.org/10.1109/TED.2025.3592917","url":null,"abstract":"Light-emitting diodes (LEDs) are essential for future energy-saving lighting and display technology owing to their high efficiency, long lifetime, and low cost. To further enhance the performance of GaN-based LEDs, electroluminescent (EL) cooling has been widely predicted to be useful over the past several decades; however, it has not been experimentally achieved. Herein, thermoelectric and phonon-pumped GaN-based LEDs have been demonstrated by both experimental measurements and theoretical modeling. It is surprisingly found that the effect of increasing temperature changes from negative to positive when the operating point is moved to the high-efficiency, midvoltage range. The power efficiency exhibits a maximum 2.24-fold improvement with increasing temperature (from room temperature to 473 K), and the peak efficiency at all elevated temperatures outperforms that at room temperature, where the Peltier effect changes from Peltier heat to Peltier cooling. Under lower biases, the phonon-assisted Peltier cooling provides additional energy for carriers to overcome the potential barrier and achieve recombination. The findings not only give an insightful understanding of EL cooling but also provide guidelines on thermal management and designing high-performance GaN-based LED devices and arrays (e.g., micro-LEDs), which can be further extended to other kinds of LEDs and optoelectronic devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"5060-5066"},"PeriodicalIF":3.2,"publicationDate":"2025-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144909245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This work demonstrated a solar-blind ultraviolet (UV) photodetector (PD) based on a ferroelectric polarization-engineered BTO/AlXGa1-XN heterostructure. The key innovation lied in exploiting BTO’s switchable spontaneous polarization to actively modulate interfacial electrostatics, creating a polarization-coupled carrier transport channel that fundamentally overcame the inherent carrier transport limitations of AlGaN materials. This mechanism synergistically enhanced the built-in electric field and optimized band alignment, which facilitated photogenerated carrier transport. The resultant device achieved high responsivity and detectivity while maintaining intrinsic solar-blind selectivity, significantly surpassing conventional AlGaN-based detectors. Furthermore, we validate its practical utility through UV imaging and accurate optical communication signal decoding, establishing new possibilities for advanced optoelectronic systems.
{"title":"Solar-Blind UV PD Based on the BTO/AlXGa1-XN Heterostructure for Imaging and Optical Communication","authors":"Xu Qi;Leyang Qian;Xuekun Hong;Bingjie Ye;Huazhan Sun;Anqi Qiang;Yushen Liu;Irina Nikolaevna Parkhomenko;Fadei Fadeevich Komarov;Jun-Ge Liang;Xinyi Shan;Guofeng Yang","doi":"10.1109/TED.2025.3591742","DOIUrl":"https://doi.org/10.1109/TED.2025.3591742","url":null,"abstract":"This work demonstrated a solar-blind ultraviolet (UV) photodetector (PD) based on a ferroelectric polarization-engineered BTO/AlXGa1-XN heterostructure. The key innovation lied in exploiting BTO’s switchable spontaneous polarization to actively modulate interfacial electrostatics, creating a polarization-coupled carrier transport channel that fundamentally overcame the inherent carrier transport limitations of AlGaN materials. This mechanism synergistically enhanced the built-in electric field and optimized band alignment, which facilitated photogenerated carrier transport. The resultant device achieved high responsivity and detectivity while maintaining intrinsic solar-blind selectivity, significantly surpassing conventional AlGaN-based detectors. Furthermore, we validate its practical utility through UV imaging and accurate optical communication signal decoding, establishing new possibilities for advanced optoelectronic systems.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"5054-5059"},"PeriodicalIF":3.2,"publicationDate":"2025-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144909374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-01DOI: 10.1109/TED.2025.3593216
Mojtaba Alaei;Herbert De Pauw;Elena Fabris;Stefaan Decoutere;Jan Doutreloigne;Johan Lauwaert;Benoit Bakeroot
Experimental data from gallium nitride (GaN)-on-Si p-GaN gate high-electron-mobility transistors (HEMTs) reveal a strong dependence of terminal capacitances-particularly $C_{mathrm{BS}}, C_{mathrm{BG}}$ , and $C_{mathrm{BD}}$ -on the drain-to-source voltage ($V_{mathrm{DS}}$ ), indicating significant coupling through the bulk contact. This behavior, linked to progressive depletion of the 2-D electron gas (2DEG) under field plates, is not adequately captured by existing compact models. This work presents a detailed analysis of the dynamics of $V_{text {DS }}$ -dependent depletion under field plates and develops an enhanced MIT Virtual Source GaN FET (MVSG) compact model that incorporates bulk-related capacitance contributions. The proposed model introduces a depletion-dependent modulation of channel and fringing capacitances and captures channel length modulation (CLM) effects due to progressive depletion of 2DEG with increasing $V_{text {DS }}$ . The extended model shows excellent agreement with the measured capacitance behavior and provides a deeper understanding of the substrate interaction mechanisms. This advancement supports the design of next-generation high-voltage GaN power ICs, such as integrated half-bridges and gate drivers, by enabling accurate prediction of terminal capacitances in simulations that include substrate effects.
{"title":"Modeling and Analysis of Terminal Capacitances in High-Power Devices: Application to p-GaN Gate HEMTs","authors":"Mojtaba Alaei;Herbert De Pauw;Elena Fabris;Stefaan Decoutere;Jan Doutreloigne;Johan Lauwaert;Benoit Bakeroot","doi":"10.1109/TED.2025.3593216","DOIUrl":"https://doi.org/10.1109/TED.2025.3593216","url":null,"abstract":"Experimental data from gallium nitride (GaN)-on-Si p-GaN gate high-electron-mobility transistors (HEMTs) reveal a strong dependence of terminal capacitances-particularly <inline-formula> <tex-math>$C_{mathrm{BS}}, C_{mathrm{BG}}$ </tex-math></inline-formula>, and <inline-formula> <tex-math>$C_{mathrm{BD}}$ </tex-math></inline-formula>-on the drain-to-source voltage (<inline-formula> <tex-math>$V_{mathrm{DS}}$ </tex-math></inline-formula>), indicating significant coupling through the bulk contact. This behavior, linked to progressive depletion of the 2-D electron gas (2DEG) under field plates, is not adequately captured by existing compact models. This work presents a detailed analysis of the dynamics of <inline-formula> <tex-math>$V_{text {DS }}$ </tex-math></inline-formula>-dependent depletion under field plates and develops an enhanced MIT Virtual Source GaN FET (MVSG) compact model that incorporates bulk-related capacitance contributions. The proposed model introduces a depletion-dependent modulation of channel and fringing capacitances and captures channel length modulation (CLM) effects due to progressive depletion of 2DEG with increasing <inline-formula> <tex-math>$V_{text {DS }}$ </tex-math></inline-formula>. The extended model shows excellent agreement with the measured capacitance behavior and provides a deeper understanding of the substrate interaction mechanisms. This advancement supports the design of next-generation high-voltage GaN power ICs, such as integrated half-bridges and gate drivers, by enabling accurate prediction of terminal capacitances in simulations that include substrate effects.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"4817-4823"},"PeriodicalIF":3.2,"publicationDate":"2025-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144909201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-01DOI: 10.1109/TED.2025.3588834
Xi Jiang;Jing Chen;Chaofan Pan;Hao Niu;Song Yuan;Xiangdong Li;Zhaoheng Yan;Xiaowu Gong;Daming Wang;Jun Wang
This article investigates the failure mechanisms of the gallium nitride high electron mobility transistors (GaN HEMTs) under overcurrent stress. The overcurrent behavior of GaN hybrid drain-embedded gate injection transistor (HD-GIT) devices was evaluated under different stress conditions, and the primary failure modes were identified. The waveforms of the GaN devices during overcurrent events were analyzed in stages, and the physical mechanisms underlying each stage were analyzed. Numerical technology computer-aided design (TCAD) simulations were conducted to analyze the electric field distribution and the variations in electron mobility during overcurrent stress. Both thermal runaway and drain/substrate breakdown failures were investigated through simulation analysis. The results indicate that thermal runaway failure in GaN HEMTs occurs due to the accumulation of thermal stresses in the access region, which is triggered by the reduction in electron mobility and an increase in the electric field within the channel. The drain and substrate breakdown failure are mainly caused by the high vertical electric field between the drain and substrate due to hole injection from the drain p-GaN region. Furthermore, the failure mechanisms were validated through experimental tests.
{"title":"Experimental and Simulation Study on the Failure Mechanism of GaN HD-GIT Under Overcurrent Stress","authors":"Xi Jiang;Jing Chen;Chaofan Pan;Hao Niu;Song Yuan;Xiangdong Li;Zhaoheng Yan;Xiaowu Gong;Daming Wang;Jun Wang","doi":"10.1109/TED.2025.3588834","DOIUrl":"https://doi.org/10.1109/TED.2025.3588834","url":null,"abstract":"This article investigates the failure mechanisms of the gallium nitride high electron mobility transistors (GaN HEMTs) under overcurrent stress. The overcurrent behavior of GaN hybrid drain-embedded gate injection transistor (HD-GIT) devices was evaluated under different stress conditions, and the primary failure modes were identified. The waveforms of the GaN devices during overcurrent events were analyzed in stages, and the physical mechanisms underlying each stage were analyzed. Numerical technology computer-aided design (TCAD) simulations were conducted to analyze the electric field distribution and the variations in electron mobility during overcurrent stress. Both thermal runaway and drain/substrate breakdown failures were investigated through simulation analysis. The results indicate that thermal runaway failure in GaN HEMTs occurs due to the accumulation of thermal stresses in the access region, which is triggered by the reduction in electron mobility and an increase in the electric field within the channel. The drain and substrate breakdown failure are mainly caused by the high vertical electric field between the drain and substrate due to hole injection from the drain p-GaN region. Furthermore, the failure mechanisms were validated through experimental tests.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"4770-4779"},"PeriodicalIF":3.2,"publicationDate":"2025-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144909355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-01DOI: 10.1109/TED.2025.3591574
Zihao Dai;Jianxun Wang;Yixin Wan;Xinjie Li;Hao Li;Chenrui Wei;Wei Jiang;Yong Luo
To enhance the output power and beam–wave interaction efficiency of sheet beam (SB) traveling wave tubes (SB-TWTs) operating in the subterahertz frequency range, this study proposes a novel groove-loaded folded waveguide (GLFW) slow wave structure (SWS) with a vertical beam tunnel. GLFW-SWS overcomes size limitations associated with operating frequency, thereby allowing for a broader lateral dimension of the beam tunnel. It effectively expands the width of the beam tunnel while minimizing reflection. Compared with the traditional folded waveguide (FW) SWS, the average interaction impedance in the interaction region is increased by 50%. In the subterahertz frequency range (218–220.5 GHz), the utilization of GLFW-SWS leads to a great improvement in the output power level of the TWT. Combined with a phase velocity tapering optimization method, at cathode voltages and current of 25 kV and 0.4 A (focused current density of 341 A/cm2), respectively, output power exceeding 1.01 kW can be achieved at 219.6 GHz. The interaction efficiency is over 10.1%. The transmission and dispersion characteristics are experimentally verified. This development offers a promising solution for subterahertz sources in next-generation communication.
为了提高工作在亚太赫兹频率范围内的片状束行波管(SB- twts)的输出功率和波束相互作用效率,本研究提出了一种具有垂直波束隧道的新型槽载折叠波导(GLFW)慢波结构(SWS)。GLFW-SWS克服了与工作频率相关的尺寸限制,从而允许更宽的波束隧道横向尺寸。它有效地扩大了光束隧道的宽度,同时最大限度地减少了反射。与传统的折叠波导(FW) SWS相比,其相互作用区域的平均相互作用阻抗提高了50%。在次太赫兹频率范围内(218-220.5 GHz),利用GLFW-SWS可以大大提高行波管的输出功率水平。结合相速度渐变优化方法,在阴极电压为25 kV、电流为0.4 a(聚焦电流密度为341 a /cm2)时,219.6 GHz的输出功率可超过1.01 kW。相互作用效率大于10.1%。实验验证了其传输和色散特性。这一发展为下一代通信中的次太赫兹源提供了一个有前途的解决方案。
{"title":"A Groove-Loaded Folded Waveguide Slow Wave Structure With Vertical Beam Tunnel for Power Enhancement in Sheet Beam Sub-THz TWTs","authors":"Zihao Dai;Jianxun Wang;Yixin Wan;Xinjie Li;Hao Li;Chenrui Wei;Wei Jiang;Yong Luo","doi":"10.1109/TED.2025.3591574","DOIUrl":"https://doi.org/10.1109/TED.2025.3591574","url":null,"abstract":"To enhance the output power and beam–wave interaction efficiency of sheet beam (SB) traveling wave tubes (SB-TWTs) operating in the subterahertz frequency range, this study proposes a novel groove-loaded folded waveguide (GLFW) slow wave structure (SWS) with a vertical beam tunnel. GLFW-SWS overcomes size limitations associated with operating frequency, thereby allowing for a broader lateral dimension of the beam tunnel. It effectively expands the width of the beam tunnel while minimizing reflection. Compared with the traditional folded waveguide (FW) SWS, the average interaction impedance in the interaction region is increased by 50%. In the subterahertz frequency range (218–220.5 GHz), the utilization of GLFW-SWS leads to a great improvement in the output power level of the TWT. Combined with a phase velocity tapering optimization method, at cathode voltages and current of 25 kV and 0.4 A (focused current density of 341 A/cm2), respectively, output power exceeding 1.01 kW can be achieved at 219.6 GHz. The interaction efficiency is over 10.1%. The transmission and dispersion characteristics are experimentally verified. This development offers a promising solution for subterahertz sources in next-generation communication.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"5201-5208"},"PeriodicalIF":3.2,"publicationDate":"2025-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144904836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-07-31DOI: 10.1109/TED.2025.3592642
Zhiwei Zheng;Chenyang Huang;Yufeng Jin;Meng Zhang;Yan Yan;Daohua Zhang;Man Hoi Wong;Hoi Sing Kwok;Lei Lu
The interaction between metal and oxide semiconductors (OSs) is critical for advancing OS applications in large-area, flexible, and heterogeneously integrated electronics. Both ohmic and Schottky contacts are essential in these devices. The abundant intrinsic defects in OSs promote ohmic contact formation but adversely affect the Schottky barrier interface, especially in OSs with diverse sub-bandgap states, such as amorphous indium–zinc oxide (a-IZO). This study introduces an ultrathin alumina (Al2O3) interlayer, deposited via plasma-enhanced atomic layer deposition (PEALD), to effectively reduce interface defects and metal-induced gap states (MIGSs) between a-IZO and the platinum (Pt) anode. The top-anode a-IZO Schottky barrier diode (SBD) demonstrates a Schottky barrier height ($Phi _{text {B}}$ ) of 0.73 eV and an ideality factor (n) of 1.35. Such ultrathin Al2O3 engineering effectively enhances the feasibility of high-quality OS Schottky contact.
{"title":"ALD Al2O3-Engineered Schottky Barrier Interface for Amorphous Indium–Zinc Oxide","authors":"Zhiwei Zheng;Chenyang Huang;Yufeng Jin;Meng Zhang;Yan Yan;Daohua Zhang;Man Hoi Wong;Hoi Sing Kwok;Lei Lu","doi":"10.1109/TED.2025.3592642","DOIUrl":"https://doi.org/10.1109/TED.2025.3592642","url":null,"abstract":"The interaction between metal and oxide semiconductors (OSs) is critical for advancing OS applications in large-area, flexible, and heterogeneously integrated electronics. Both ohmic and Schottky contacts are essential in these devices. The abundant intrinsic defects in OSs promote ohmic contact formation but adversely affect the Schottky barrier interface, especially in OSs with diverse sub-bandgap states, such as amorphous indium–zinc oxide (a-IZO). This study introduces an ultrathin alumina (Al2O3) interlayer, deposited via plasma-enhanced atomic layer deposition (PEALD), to effectively reduce interface defects and metal-induced gap states (MIGSs) between a-IZO and the platinum (Pt) anode. The top-anode a-IZO Schottky barrier diode (SBD) demonstrates a Schottky barrier height (<inline-formula> <tex-math>$Phi _{text {B}}$ </tex-math></inline-formula>) of 0.73 eV and an ideality factor (n) of 1.35. Such ultrathin Al2O3 engineering effectively enhances the feasibility of high-quality OS Schottky contact.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"5004-5010"},"PeriodicalIF":3.2,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144909328","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A high thermal stability AlGaN-based back-illuminated solar-blind ultraviolet (SBUV) p-i-n photodetectors (PDs) are fabricated on double-sided, polished sapphire substrates. The PD exhibits low dark current of less than 18 pA under –5 V bias at room temperature (RT), which corresponds to a dark current density of $lt 1.8times 10^{-{9}}$ A/cm2. Even at a high temperature of $150~^{circ }$ C, the dark current of the PD is still below 50 pA. The PD also shows a high solar-blind/UV rejection ratio up to four orders of magnitude in the temperature range of RT to $150~^{circ }$ C. As the temperature continuously rises from RT to $150~^{circ }$ C, the photocurrent of the PD only increases by less than 8%, which corresponds to an extremely small temperature coefficient (TC) of <0.06%/°C. The ultralow TC achieved is believed to be related to the high polarization electric field at the composition-graded heterojunction interface.
{"title":"Back-Illuminated AlGaN-Based Solar-Blind Ultraviolet Photodetectors With High-Temperature Photoresponse Stability","authors":"Zixi Lv;Wenkuo Zhang;Jiagui Li;Wei Zeng;Benli Yu;Feng Xie","doi":"10.1109/TED.2025.3592914","DOIUrl":"https://doi.org/10.1109/TED.2025.3592914","url":null,"abstract":"A high thermal stability AlGaN-based back-illuminated solar-blind ultraviolet (SBUV) p-i-n photodetectors (PDs) are fabricated on double-sided, polished sapphire substrates. The PD exhibits low dark current of less than 18 pA under –5 V bias at room temperature (RT), which corresponds to a dark current density of <inline-formula> <tex-math>$lt 1.8times 10^{-{9}}$ </tex-math></inline-formula> A/cm2. Even at a high temperature of <inline-formula> <tex-math>$150~^{circ }$ </tex-math></inline-formula>C, the dark current of the PD is still below 50 pA. The PD also shows a high solar-blind/UV rejection ratio up to four orders of magnitude in the temperature range of RT to <inline-formula> <tex-math>$150~^{circ }$ </tex-math></inline-formula>C. As the temperature continuously rises from RT to <inline-formula> <tex-math>$150~^{circ }$ </tex-math></inline-formula>C, the photocurrent of the PD only increases by less than 8%, which corresponds to an extremely small temperature coefficient (TC) of <0.06%/°C. The ultralow TC achieved is believed to be related to the high polarization electric field at the composition-graded heterojunction interface.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"5247-5250"},"PeriodicalIF":3.2,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144904803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The 2-D semiconductors, such as molybdenum disulfide (MoS2), have seen extensive use in the fields of electronics and optoelectronics. However, the lower carrier mobility and weak light absorption ability of the ultrathin layered structure greatly limit commercial applications. In this study, we use a single-step UV-ozone oxidation method to transform flat magnesium (Mg) into a rippled substrate, which effectively enhances the carrier mobility of MoS2 from the range of $19.2sim 31.2$ to $45.3sim 78.2$ cm${}^{{2}} cdot $ V${}^{text {-1}} cdot $ s${}^{text {-1}}$ . Owing to the multiple reflections from peak to peak, the device also demonstrates high photoresponsivity of $1.6times 10^{{5}}$ A/W. Interestingly, with appropriate gate bias, the device exhibits constant photoresponsivity of ~220 A/W independent of the incident light intensity. This work presents a simple oxidation-induced rippled Mg substrate, which simultaneously addresses low carrier mobility and weak light absorption in 2-D semiconductors, enabling synergistic electrical-optical improvements, paving the way for the design of high-performance optoelectronic devices.
二维半导体,如二硫化钼(MoS2),已经在电子和光电子领域得到了广泛的应用。然而,超薄层状结构载流子迁移率低,光吸收能力弱,极大地限制了其商业应用。在本研究中,我们使用单步紫外-臭氧氧化方法将平面镁(Mg)转化为脉动衬底,有效地提高了MoS2的载流子迁移率,从$19.2sim 31.2$到$45.3sim 78.2$ cm ${}^{{2}} cdot $ V ${}^{text {-1}}$ s ${}^{text{-1}}$。由于从一个峰到另一个峰的多次反射,该器件也显示出1.6 × 10^{{5}}$ A/W的高光响应性。有趣的是,在适当的栅极偏置下,该器件具有恒定的~220 A/W的光响应性,与入射光强度无关。这项工作提出了一种简单的氧化诱导波纹Mg衬底,同时解决了二维半导体中的低载流子迁移率和弱光吸收问题,实现了电光协同改进,为高性能光电器件的设计铺平了道路。
{"title":"High-Mobility and High-Responsivity MoS2 Phototransistor Enabled by Rippled Mg Substrate Engineering","authors":"Qianlei Tian;Changsheng You;Long Yue;Yang Xiao;Renfei Chen;Jin Yang;Xinpei Duan;Liming Wang;Ruohao Hong;Yuan Zhou","doi":"10.1109/TED.2025.3592175","DOIUrl":"https://doi.org/10.1109/TED.2025.3592175","url":null,"abstract":"The 2-D semiconductors, such as molybdenum disulfide (MoS2), have seen extensive use in the fields of electronics and optoelectronics. However, the lower carrier mobility and weak light absorption ability of the ultrathin layered structure greatly limit commercial applications. In this study, we use a single-step UV-ozone oxidation method to transform flat magnesium (Mg) into a rippled substrate, which effectively enhances the carrier mobility of MoS2 from the range of <inline-formula> <tex-math>$19.2sim 31.2$ </tex-math></inline-formula> to <inline-formula> <tex-math>$45.3sim 78.2$ </tex-math></inline-formula> cm<inline-formula> <tex-math>${}^{{2}} cdot $ </tex-math></inline-formula>V<inline-formula> <tex-math>${}^{text {-1}} cdot $ </tex-math></inline-formula>s<inline-formula> <tex-math>${}^{text {-1}}$ </tex-math></inline-formula>. Owing to the multiple reflections from peak to peak, the device also demonstrates high photoresponsivity of <inline-formula> <tex-math>$1.6times 10^{{5}}$ </tex-math></inline-formula> A/W. Interestingly, with appropriate gate bias, the device exhibits constant photoresponsivity of ~220 A/W independent of the incident light intensity. This work presents a simple oxidation-induced rippled Mg substrate, which simultaneously addresses low carrier mobility and weak light absorption in 2-D semiconductors, enabling synergistic electrical-optical improvements, paving the way for the design of high-performance optoelectronic devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"5255-5258"},"PeriodicalIF":3.2,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144904884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-07-31DOI: 10.1109/TED.2025.3592887
Yufei Sheng;Yonglin Xia;Jiaxuan Xu;Shuying Wang;Pengpeng Ren;Zhigang Ji;Hua Bao
For next-generation advanced logic devices, gate-all-around field-effect transistors (GAAFETs) with characteristic size reaching the 10 nm scale, necessitate thorough consideration of nanoscale thermal transport to assess the impact of self-heating on device performance and reliability. However, previous studies predominantly relied on simplified or fitting models to directly adjust the effective thermal conductivities of various device components within the heat diffusion equation (HDE) or thermal resistance networks. These methods are inadequate for fully capturing nanoscale thermal transport. Here, we perform multiscale thermal simulations of GAAFETs by integrating first-principles-based nongray Boltzmann transport equation (BTE) with the HDE. By comparing the temperature distributions calculated using the gray BTE and HDE, we demonstrate the necessity of employing the nongray phonon BTE for accurate simulation of the active region. We further discover that the size-dependent thermal conductivity of metal regions should be incorporated using the electron–phonon BTE. Moreover, based on comprehensive thermal simulations of a stacked nanosheet GAAFET, we identify that the amorphous passive layer, interfacial thermal resistance between different layers, along with the thermal resistance of the STI/BDI layers and interconnections, are key factors limiting heat dissipation. Our approach fully incorporates nanoscale thermal transport while eliminating reliance on empirical parameters and facilitates multiscale simulations from materials to structures to devices, with potential applicability to circuit-level simulations.
{"title":"Multiscale Thermal Simulation for GAAFET With First-Principles-Based Boltzmann Transport Equation","authors":"Yufei Sheng;Yonglin Xia;Jiaxuan Xu;Shuying Wang;Pengpeng Ren;Zhigang Ji;Hua Bao","doi":"10.1109/TED.2025.3592887","DOIUrl":"https://doi.org/10.1109/TED.2025.3592887","url":null,"abstract":"For next-generation advanced logic devices, gate-all-around field-effect transistors (GAAFETs) with characteristic size reaching the 10 nm scale, necessitate thorough consideration of nanoscale thermal transport to assess the impact of self-heating on device performance and reliability. However, previous studies predominantly relied on simplified or fitting models to directly adjust the effective thermal conductivities of various device components within the heat diffusion equation (HDE) or thermal resistance networks. These methods are inadequate for fully capturing nanoscale thermal transport. Here, we perform multiscale thermal simulations of GAAFETs by integrating first-principles-based nongray Boltzmann transport equation (BTE) with the HDE. By comparing the temperature distributions calculated using the gray BTE and HDE, we demonstrate the necessity of employing the nongray phonon BTE for accurate simulation of the active region. We further discover that the size-dependent thermal conductivity of metal regions should be incorporated using the electron–phonon BTE. Moreover, based on comprehensive thermal simulations of a stacked nanosheet GAAFET, we identify that the amorphous passive layer, interfacial thermal resistance between different layers, along with the thermal resistance of the STI/BDI layers and interconnections, are key factors limiting heat dissipation. Our approach fully incorporates nanoscale thermal transport while eliminating reliance on empirical parameters and facilitates multiscale simulations from materials to structures to devices, with potential applicability to circuit-level simulations.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"4700-4707"},"PeriodicalIF":3.2,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144904626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-07-31DOI: 10.1109/TED.2025.3591390
Soyoung Choi;Jaewook Jeong
The channel potential distribution of the dual-gate a-IGZO thin-film transistors (TFTs) was analyzed in the active layer using a gated-multiprobe method (GMP method) combining theory of quantum mechanics for the analysis of TFTs having very thin active layer. From the GMP method, the channel potential distribution follows the conventional gradual channel approximation rule from the source to the drain electrodes in case of linear region operation. In the saturation region, pinch-off with the formation of a space-charge-limited region was observed. To compare the result with the theory of quantum mechanics, ATLAS from Silvaco Inc. (ATLAS) device simulation was performed using both classical and quantum mechanical approach. The resulting parasitic resistance values of the dual-gate biasing (DGB) mode differed from the classical approach, owing to the same current spreading path of the top- and bottom-gate channel electrons, when the quantum mechanical density gradient method was applied. The accuracy of the quantum theory was confirmed using the prolonged stress results, which indicated defect creation near the middle of the channel region was the dominant mechanism for the bias stress instability, considering quantum mechanical channel electron distribution.
{"title":"Quantum Mechanical Analysis of Dual-Gate InGaZnO TFTs Employing a Gated-Multiprobe","authors":"Soyoung Choi;Jaewook Jeong","doi":"10.1109/TED.2025.3591390","DOIUrl":"https://doi.org/10.1109/TED.2025.3591390","url":null,"abstract":"The channel potential distribution of the dual-gate a-IGZO thin-film transistors (TFTs) was analyzed in the active layer using a gated-multiprobe method (GMP method) combining theory of quantum mechanics for the analysis of TFTs having very thin active layer. From the GMP method, the channel potential distribution follows the conventional gradual channel approximation rule from the source to the drain electrodes in case of linear region operation. In the saturation region, pinch-off with the formation of a space-charge-limited region was observed. To compare the result with the theory of quantum mechanics, ATLAS from Silvaco Inc. (ATLAS) device simulation was performed using both classical and quantum mechanical approach. The resulting parasitic resistance values of the dual-gate biasing (DGB) mode differed from the classical approach, owing to the same current spreading path of the top- and bottom-gate channel electrons, when the quantum mechanical density gradient method was applied. The accuracy of the quantum theory was confirmed using the prolonged stress results, which indicated defect creation near the middle of the channel region was the dominant mechanism for the bias stress instability, considering quantum mechanical channel electron distribution.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"4983-4990"},"PeriodicalIF":3.2,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144909233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}