Pub Date : 2024-10-28DOI: 10.1109/TMTT.2024.3482329
Hassan Kianmehr;Raafat R. Mansour
This article introduces chip-scale reflective-type phase shifters (RTPSs) realized by monolithically integrating liquid crystal (LC) with silicon micromachining technology. The RTPS is formed by integrating a highly miniature Quadrature hybrid with two LC-based tunable reflective loads. The LC material is confined within a micromachined silicon trench, with its dielectric properties controlled by an applied bias voltage. Two RTPSs at 28 and 62 GHz are experimentally demonstrated. The phase shifter operating at 28 GHz exhibits a phase shift of 115° as the bias voltage varies from 0 to 25 V. Its insertion loss and return loss over the frequency range of 26 to 30 GHz are 5.95 and 15 dB, respectively, resulting in a figure of merit (FOM) of 19.16°/dB. The phase shifter operating at 62 GHz achieves a phase shift of 118° with the same bias voltage range. This device demonstrates an insertion loss of 7 dB and a return loss of 13.7 dB, yielding an FOM of 16.43°/dB. Notably, the phase shift tuning for these devices is analog and continuous, with no dc power consumption. Additionally, each phase shifter incorporates a single tuning element, simplifying their operation and integration. The device fabrication is conducted in-house using a multilayer microfabrication process, resulting in the first silicon-based, chip-level LC integrated phase shifters.
{"title":"Integration of Liquid Crystal With Silicon-Micromachining Technology for the Realization of Chip-Scale Millimeter-Wave Phase Shifters","authors":"Hassan Kianmehr;Raafat R. Mansour","doi":"10.1109/TMTT.2024.3482329","DOIUrl":"https://doi.org/10.1109/TMTT.2024.3482329","url":null,"abstract":"This article introduces chip-scale reflective-type phase shifters (RTPSs) realized by monolithically integrating liquid crystal (LC) with silicon micromachining technology. The RTPS is formed by integrating a highly miniature Quadrature hybrid with two LC-based tunable reflective loads. The LC material is confined within a micromachined silicon trench, with its dielectric properties controlled by an applied bias voltage. Two RTPSs at 28 and 62 GHz are experimentally demonstrated. The phase shifter operating at 28 GHz exhibits a phase shift of 115° as the bias voltage varies from 0 to 25 V. Its insertion loss and return loss over the frequency range of 26 to 30 GHz are 5.95 and 15 dB, respectively, resulting in a figure of merit (FOM) of 19.16°/dB. The phase shifter operating at 62 GHz achieves a phase shift of 118° with the same bias voltage range. This device demonstrates an insertion loss of 7 dB and a return loss of 13.7 dB, yielding an FOM of 16.43°/dB. Notably, the phase shift tuning for these devices is analog and continuous, with no dc power consumption. Additionally, each phase shifter incorporates a single tuning element, simplifying their operation and integration. The device fabrication is conducted in-house using a multilayer microfabrication process, resulting in the first silicon-based, chip-level LC integrated phase shifters.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 1","pages":"309-320"},"PeriodicalIF":4.1,"publicationDate":"2024-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142938303","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-24DOI: 10.1109/TMTT.2024.3477712
Alex Pitt;Mark Beach;Tommaso Cappello
In this work, a novel tri-branch Doherty analog predistorter (DAPD) for the linearization of gain inflection within Doherty power amplifiers (DPAs) is demonstrated. This proposed circuit topology features two nonlinear branches, which can follow the amplitude and phase characteristic of a DPA in a reverse manner. The first branch conducts whilst the carrier is active in the low power range, whilst both branches conduct when both the carrier and peaking are active in the high power range. A thorough evaluation of this new topology is provided, where the overall gain and phase characteristics of the circuit are mathematically defined. Analysis is provided on various configurations of the topology, where in each case the ability to accurately predistort the gain and phase nonlinearity associated with carrier compression within a DPA is shown. An accurate DAPD design is then detailed, by means of passive modeling, and the use of measured predistortion characteristics of the candidate DPA to be linearized. Measurements are then provided on the combination of the manufactured DAPD with the candidate DPA, through modulated, continuous-wave, and two-tone signal measurements. When considering an orthogonal frequency division multiplexing (OFDM) waveform with varying bandwidths of 20, 50, and 80 MHz, and varying peak-to-average power ratios (PAPRs) of 8.6, 10, and 11.6 dB, a minimum level of adjacent channel power ratio (ACPR) of −40.9 to −43.5 dBc is observed, over a bandwidth of 2.2–2.6 GHz. A minimum error vector magnitude (EVM) of 1.4%–3.8% is also observed, along with a maximum average efficiency of 59.2%–67.5%.
{"title":"An Analog Gain Inflection Predistorter for Combined Back-Off Efficiency and Linearity With Doherty Power Amplifiers","authors":"Alex Pitt;Mark Beach;Tommaso Cappello","doi":"10.1109/TMTT.2024.3477712","DOIUrl":"https://doi.org/10.1109/TMTT.2024.3477712","url":null,"abstract":"In this work, a novel tri-branch Doherty analog predistorter (DAPD) for the linearization of gain inflection within Doherty power amplifiers (DPAs) is demonstrated. This proposed circuit topology features two nonlinear branches, which can follow the amplitude and phase characteristic of a DPA in a reverse manner. The first branch conducts whilst the carrier is active in the low power range, whilst both branches conduct when both the carrier and peaking are active in the high power range. A thorough evaluation of this new topology is provided, where the overall gain and phase characteristics of the circuit are mathematically defined. Analysis is provided on various configurations of the topology, where in each case the ability to accurately predistort the gain and phase nonlinearity associated with carrier compression within a DPA is shown. An accurate DAPD design is then detailed, by means of passive modeling, and the use of measured predistortion characteristics of the candidate DPA to be linearized. Measurements are then provided on the combination of the manufactured DAPD with the candidate DPA, through modulated, continuous-wave, and two-tone signal measurements. When considering an orthogonal frequency division multiplexing (OFDM) waveform with varying bandwidths of 20, 50, and 80 MHz, and varying peak-to-average power ratios (PAPRs) of 8.6, 10, and 11.6 dB, a minimum level of adjacent channel power ratio (ACPR) of −40.9 to −43.5 dBc is observed, over a bandwidth of 2.2–2.6 GHz. A minimum error vector magnitude (EVM) of 1.4%–3.8% is also observed, along with a maximum average efficiency of 59.2%–67.5%.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 1","pages":"167-179"},"PeriodicalIF":4.1,"publicationDate":"2024-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142938301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article presents a composite right-/left-handed (CRLH) loaded slow wave substrate integrated waveguide (SW-SIW) filter using through glass via (TGV) technology. The proposed glass-based topology integrates via holes and blind holes in a single-layer substrate, enabling the achievement of the SW effect. This miniaturization strategy can be flexibly combined with other miniaturization technologies. The size of the holes prepared using TGV technique is one-tenth that of printed circuit board (PCB), allowing glass substrate to be more competitive in millimeter-wave band. The propagation properties of glass-based SW-SIW are revealed first, and the designed third-order filter realizes more than 53% size reduction compared to conventional SIW cavity configuration. Subsequently, the CRLH resonator embedded in SW-SIW exhibits phase characteristics opposite to conventional parallel LC unit. Besides, the SW-CRLH resonator can facilitate the realization of fourth-order filtering function without enlarging the packaging size of the initial third-order filter. Furthermore, the glass-based filter with elliptic function response can achieve independent tuning of transmission zeros (TZs). As a prototype, a fourth-order millimeter-wave filter is designed, fabricated, and measured. The experimental results confirm the advancement of the manufacturing process and the feasibility of the miniaturization strategy.
{"title":"Glass-Based Single-Layer Slow Wave SIW Filter With Embedded Composite Right-/ Left-Handed Resonator","authors":"Wenlei Li;Jihua Zhang;Zhihua Tao;Libin Gao;Hongwei Chen;Lingyue Wang;Lei Zhao;Xingzhou Cai;Yong Li;Dongbin Wang;Shuang Li;Ting Liu;Wanli Zhang","doi":"10.1109/TMTT.2024.3440250","DOIUrl":"https://doi.org/10.1109/TMTT.2024.3440250","url":null,"abstract":"This article presents a composite right-/left-handed (CRLH) loaded slow wave substrate integrated waveguide (SW-SIW) filter using through glass via (TGV) technology. The proposed glass-based topology integrates via holes and blind holes in a single-layer substrate, enabling the achievement of the SW effect. This miniaturization strategy can be flexibly combined with other miniaturization technologies. The size of the holes prepared using TGV technique is one-tenth that of printed circuit board (PCB), allowing glass substrate to be more competitive in millimeter-wave band. The propagation properties of glass-based SW-SIW are revealed first, and the designed third-order filter realizes more than 53% size reduction compared to conventional SIW cavity configuration. Subsequently, the CRLH resonator embedded in SW-SIW exhibits phase characteristics opposite to conventional parallel LC unit. Besides, the SW-CRLH resonator can facilitate the realization of fourth-order filtering function without enlarging the packaging size of the initial third-order filter. Furthermore, the glass-based filter with elliptic function response can achieve independent tuning of transmission zeros (TZs). As a prototype, a fourth-order millimeter-wave filter is designed, fabricated, and measured. The experimental results confirm the advancement of the manufacturing process and the feasibility of the miniaturization strategy.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 2","pages":"1105-1116"},"PeriodicalIF":4.1,"publicationDate":"2024-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143361403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-15DOI: 10.1109/TMTT.2024.3474092
Anna Piacibello;Ricardo Figueiredo;Roberto Quaglia;Rocco Giofrè;Paolo Colantonio;Nuno Borges Carvalho;Vittorio Camarchia
This article presents the design strategy and extensive noise-to-power ratio (NPR)-focused characterization of a state-of-the-art Doherty power amplifier (DPA) for satellite applications in the Ka-band downlink (17.3–20.3 GHz), fabricated using a commercial 100-nm GaN-Si high electron mobility transistor technology. The design aims for high gain and good intrinsic linearity over a 3-GHz bandwidth by adopting an amplifying chain with limited phase distortion and a Doherty combiner designed to compensate for this residual phase distortion and by optimizing the baseband impedance. Single-tone experimental characterization of the fabricated chip shows that it maintains an output power of 36 dBm with a power-added efficiency (PAE) of 30% across the entire band. The linearity characterization explores the effects of signal statistics and nonlinear dynamics on NPR and discusses critical aspects concerning the comparability of different measurements. Modulations with instantaneous bandwidths up to a record of 2.9 GHz are explored, under which the Doherty PA is able to maintain PAE of at least 25% at 15-dB NPR. This demonstrates the amplifier’s excellent linearity, achieving state-of-the-art performance among integrated power amplifiers (PAs) for satellite communications.
本文介绍了用于ka波段下行链路(17.3-20.3 GHz)卫星应用的最先进的Doherty功率放大器(DPA)的设计策略和广泛的噪声功率比(NPR)特征,该放大器使用商用100纳米GaN-Si高电子迁移率晶体管技术制造。该设计的目标是在3ghz带宽上实现高增益和良好的固有线性,采用了相位失真有限的放大链和补偿这种剩余相位失真的Doherty合成器,并优化了基带阻抗。单音实验表征表明,该芯片在整个频段内保持了36 dBm的输出功率和30%的功率附加效率(PAE)。线性特性探讨了信号统计和非线性动力学对NPR的影响,并讨论了有关不同测量的可比性的关键方面。研究人员探索了瞬时带宽高达2.9 GHz的调制,在此条件下,Doherty PA能够在15 db NPR下保持至少25%的PAE。这表明放大器具有出色的线性度,在用于卫星通信的集成功率放大器(pa)中实现了最先进的性能。
{"title":"Design and Extensive NPR Characterization of a Highly Linear SatCom GaN MMIC Doherty PA","authors":"Anna Piacibello;Ricardo Figueiredo;Roberto Quaglia;Rocco Giofrè;Paolo Colantonio;Nuno Borges Carvalho;Vittorio Camarchia","doi":"10.1109/TMTT.2024.3474092","DOIUrl":"https://doi.org/10.1109/TMTT.2024.3474092","url":null,"abstract":"This article presents the design strategy and extensive noise-to-power ratio (NPR)-focused characterization of a state-of-the-art Doherty power amplifier (DPA) for satellite applications in the Ka-band downlink (17.3–20.3 GHz), fabricated using a commercial 100-nm GaN-Si high electron mobility transistor technology. The design aims for high gain and good intrinsic linearity over a 3-GHz bandwidth by adopting an amplifying chain with limited phase distortion and a Doherty combiner designed to compensate for this residual phase distortion and by optimizing the baseband impedance. Single-tone experimental characterization of the fabricated chip shows that it maintains an output power of 36 dBm with a power-added efficiency (PAE) of 30% across the entire band. The linearity characterization explores the effects of signal statistics and nonlinear dynamics on NPR and discusses critical aspects concerning the comparability of different measurements. Modulations with instantaneous bandwidths up to a record of 2.9 GHz are explored, under which the Doherty PA is able to maintain PAE of at least 25% at 15-dB NPR. This demonstrates the amplifier’s excellent linearity, achieving state-of-the-art performance among integrated power amplifiers (PAs) for satellite communications.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 1","pages":"156-166"},"PeriodicalIF":4.1,"publicationDate":"2024-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10718724","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142938302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-14DOI: 10.1109/TMTT.2024.3472268
Lin Lu;Xujun Ma;Jing Feng;Long He;Xuewei Fan;Qin Chen;Xin Chen;Xuan Wang;Yiyang Wang;Zhiqiang Liu;Xiangning Fan;Lianming Li
A 60-GHz joint radar-communication (JRC) transceiver is presented in this article. To achieve a compact JRC transceiver architecture with highly reused RF modules, a dedicated reconfigurable dual-mode Gilbert cell is proposed. Specifically, in the communication mode, the dual-mode Gilbert cells operate as conventional upconversion mixers to modulate the baseband (BB) communication data, while it could also be configured as an amplifier to strengthen the LO signal in the radar mode. Compared with the quadrature IF chirp modulation scheme in which the chirp bandwidth is constrained by the narrowband IF devices, in this work, a wideband chirp generated directly from the LO chain could be applied for radar sensing, significantly improving the range resolution in the radar mode. Besides, the direct RF dechirping could also relieve the hardware burden during radar signal processing compared with the digital dechirping utilized in the IF chirp modulation scheme. Fabricated in a 65-nm CMOS process, this JRC transceiver realizes an ultracompact chip size, and a 16-dBm saturated TX output power, an 11-dBm OP1 dB, and a 5.8-dB minimum RX noise figure (NF) are also achieved. Experiments demonstrate that the proposed JRC transceiver supports >4-GHz transmitted chirp bandwidth with <3.75-cm> $mu $