Xuebin Zhou, Kangshuai Dong, Jiabin Wang, Lin Yang
Industrial applications tend to involve a substantial assemblage of electronic devices, and it is imperative to consider diverse charging requirements while charging these devices. This paper proposes a three‐coil single‐input‐and‐dual‐output (SIDO) inductive power transfer (IPT) system to meet the charging requirements of different devices. The system includes two independent output ports, providing constant voltage (CV) output and constant current (CC) output for different loads, respectively. In addition, the zero‐phase angle (ZPA) operation can be achieved, thus avoiding injection of reactive power and improving energy transfer efficiency. Unlike previous related studies, the receiver of the proposed SIDO IPT system only includes one receiving coil to pick up energy, eliminating unnecessary cross‐coupling and complex decoupling circuits in traditional IPT systems with multiple outputs. This study first analyzes the CC/CV output theory of the proposed SIDO IPT system in detail, and designs and optimizes the parameters by establishing an equivalent model. Then, the conditions for achieving zero‐voltage switching (ZVS) operation of the inverter are obtained by analyzing the sensitivity of CC/CV performance to the variation of the compensation capacitors. Finally, a verification experimental prototype with 2.5A CC output and 72 V CV output is established to verify the effectiveness of the proposed IPT system.
工业应用往往涉及大量电子设备的组合，因此在为这些设备充电时必须考虑不同的充电要求。本文提出了一种三线圈单输入双输出（SIDO）感应式功率传输（IPT）系统，以满足不同设备的充电要求。该系统包括两个独立的输出端口，分别为不同负载提供恒压（CV）输出和恒流（CC）输出。此外，还可实现零相角（ZPA）运行，从而避免注入无功功率，提高能量传输效率。与以往的相关研究不同，所提出的 SIDO IPT 系统的接收器只包括一个接收线圈来接收能量，从而避免了传统 IPT 系统中不必要的交叉耦合和复杂的多输出去耦电路。本研究首先详细分析了拟议的 SIDO IPT 系统的 CC/CV 输出理论，并通过建立等效模型对参数进行设计和优化。然后，通过分析 CC/CV 性能对补偿电容变化的敏感性，得出逆变器实现零电压开关 (ZVS) 工作的条件。最后，建立了一个具有 2.5A CC 输出和 72 V CV 输出的验证实验原型，以验证所提出的 IPT 系统的有效性。
{"title":"Analysis and design of a three‐coil IPT system with independent dual output ports","authors":"Xuebin Zhou, Kangshuai Dong, Jiabin Wang, Lin Yang","doi":"10.1002/cta.4224","DOIUrl":"https://doi.org/10.1002/cta.4224","url":null,"abstract":"Industrial applications tend to involve a substantial assemblage of electronic devices, and it is imperative to consider diverse charging requirements while charging these devices. This paper proposes a three‐coil single‐input‐and‐dual‐output (SIDO) inductive power transfer (IPT) system to meet the charging requirements of different devices. The system includes two independent output ports, providing constant voltage (CV) output and constant current (CC) output for different loads, respectively. In addition, the zero‐phase angle (ZPA) operation can be achieved, thus avoiding injection of reactive power and improving energy transfer efficiency. Unlike previous related studies, the receiver of the proposed SIDO IPT system only includes one receiving coil to pick up energy, eliminating unnecessary cross‐coupling and complex decoupling circuits in traditional IPT systems with multiple outputs. This study first analyzes the CC/CV output theory of the proposed SIDO IPT system in detail, and designs and optimizes the parameters by establishing an equivalent model. Then, the conditions for achieving zero‐voltage switching (ZVS) operation of the inverter are obtained by analyzing the sensitivity of CC/CV performance to the variation of the compensation capacitors. Finally, a verification experimental prototype with 2.5A CC output and 72 V CV output is established to verify the effectiveness of the proposed IPT system.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"100 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zhifeng Dou, Changai Zhang, Ye Tian, Falong Lu, Qian Wang
Power losses in semiconductor devices present a significant impediment to advancing power electronics systems for achieving higher frequencies, improved efficiency, and greater integration. A major challenge lies in directly coupling power losses with various control strategies, considering the variations in manufacturers, packaging, and process structures within the power electronics field. This paper introduces a field‐circuit coupling simulation methodology of the insulated gate bipolar transistor (IGBT) within the Simulink/COMSOL environment, using a conventional three‐phase six‐switch voltage source inverter (VSI) IGBT module as a case study. A composite transfer function interconnects the electrical and thermal aspects, enabling bidirectional coupling between IGBT temperature and losses. This study aims to comprehensively compare the effects of various control strategies, namely, single‐vector, dual‐vector, and three‐vector current model predictive control (CMPC) and space vector pulse width modulation (SVPWM), on the losses and temperature of IGBT power modules. The findings emphasize that losses are significantly influenced by the selection of weighting factor coefficients and power factor settings under the same CMPC control strategy with a fixed switching frequency. Additionally, the selection of control strategies, such as CMPC and SVPWM, substantially impacts power losses in power electronic devices.
{"title":"Comparative analysis of control strategies impact on power losses in IGBT power modules with a multiphysics‐circuit coupling method","authors":"Zhifeng Dou, Changai Zhang, Ye Tian, Falong Lu, Qian Wang","doi":"10.1002/cta.4219","DOIUrl":"https://doi.org/10.1002/cta.4219","url":null,"abstract":"Power losses in semiconductor devices present a significant impediment to advancing power electronics systems for achieving higher frequencies, improved efficiency, and greater integration. A major challenge lies in directly coupling power losses with various control strategies, considering the variations in manufacturers, packaging, and process structures within the power electronics field. This paper introduces a field‐circuit coupling simulation methodology of the insulated gate bipolar transistor (IGBT) within the Simulink/COMSOL environment, using a conventional three‐phase six‐switch voltage source inverter (VSI) IGBT module as a case study. A composite transfer function interconnects the electrical and thermal aspects, enabling bidirectional coupling between IGBT temperature and losses. This study aims to comprehensively compare the effects of various control strategies, namely, single‐vector, dual‐vector, and three‐vector current model predictive control (CMPC) and space vector pulse width modulation (SVPWM), on the losses and temperature of IGBT power modules. The findings emphasize that losses are significantly influenced by the selection of weighting factor coefficients and power factor settings under the same CMPC control strategy with a fixed switching frequency. Additionally, the selection of control strategies, such as CMPC and SVPWM, substantially impacts power losses in power electronic devices.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"23 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this work, the capability to generate the negative group delay (NGD) phenomenon at those frequencies higher than a certain value, that is, the NGD high‐pass (HP) filtering function, of the bilinear double‐order transfer function has been demonstrated. Based on the Type‐I bilinear double‐order filter circuit, our theory has been verified by strong agreements between the formulae and their proof‐of‐concept (POC) circuit‐based simulation results. Both formula‐based and POC circuit‐based simulations give the minimum group delay of −5 ms yet the cut‐off frequency of 10 and 9 rad/s, respectively. Such slight deviation is caused by the approximation error of the bilinear double‐order impedance. By employing two orders, the bilinear double‐order transfer function has been found to be the basis transfer function for the NGD filtering function with the highest degree of freedom. Based on our design equation for the NGD filtering function, it can be seen that the distances between zero and pole and the characteristic frequency of the bilinear double‐order transfer function are governed by such characteristic frequency itself, the cut‐off frequency of the NGD filtering function, and the fractional order of the Laplacian operator. In addition, the effects of the fractional order of the Laplacian operator, the fractional order of the transfer function, and the ratio of the abovementioned distances to the characteristics of the newly found double‐order NGD filtering function have been studied in detail.
{"title":"Double‐order negative group delay filtering function: A brilliant capability of the bilinear double‐order transfer function","authors":"Rawid Banchuin","doi":"10.1002/cta.4213","DOIUrl":"https://doi.org/10.1002/cta.4213","url":null,"abstract":"In this work, the capability to generate the negative group delay (NGD) phenomenon at those frequencies higher than a certain value, that is, the NGD high‐pass (HP) filtering function, of the bilinear double‐order transfer function has been demonstrated. Based on the Type‐I bilinear double‐order filter circuit, our theory has been verified by strong agreements between the formulae and their proof‐of‐concept (POC) circuit‐based simulation results. Both formula‐based and POC circuit‐based simulations give the minimum group delay of −5 ms yet the cut‐off frequency of 10 and 9 rad/s, respectively. Such slight deviation is caused by the approximation error of the bilinear double‐order impedance. By employing two orders, the bilinear double‐order transfer function has been found to be the basis transfer function for the NGD filtering function with the highest degree of freedom. Based on our design equation for the NGD filtering function, it can be seen that the distances between zero and pole and the characteristic frequency of the bilinear double‐order transfer function are governed by such characteristic frequency itself, the cut‐off frequency of the NGD filtering function, and the fractional order of the Laplacian operator. In addition, the effects of the fractional order of the Laplacian operator, the fractional order of the transfer function, and the ratio of the abovementioned distances to the characteristics of the newly found double‐order NGD filtering function have been studied in detail.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"59 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chung‐Yi Li, Hong‐Chi Hu, Yuan‐Ho Chen, Shinn‐Yn Lin
Fixed‐width Booth multiplier (FWBM) plays a significant role in the arouse of approximate computing (AC) field. In this paper, a row‐based binary‐weighted compensator (RBC) for fixed‐width Booth multiplication is proposed. The derived binary‐weighted close‐form minimizes the conversion loss and hardware cost. With the proposed close‐form, the partial product array can be reduced dramatically. Consequently, the compact FWBM with the proposed RBC not only shortens the critical path to at least 24% but also minimizes the power dissipation to at least 44%. Moreover, the proposed RBC outperforms the state‐of‐art with a maximum merit improvement of 39%. By implementing the proposed RBC‐FWBM in the FIR filter, we manage to demonstrate the practicality of the proposed design with a significant reduction in power‐dissipation and delay while maintaining high accuracy.
{"title":"Low‐latency and power‐efficient row‐based binary‐weighted compensator for fixed‐width Booth multiplier","authors":"Chung‐Yi Li, Hong‐Chi Hu, Yuan‐Ho Chen, Shinn‐Yn Lin","doi":"10.1002/cta.4207","DOIUrl":"https://doi.org/10.1002/cta.4207","url":null,"abstract":"Fixed‐width Booth multiplier (FWBM) plays a significant role in the arouse of approximate computing (AC) field. In this paper, a row‐based binary‐weighted compensator (RBC) for fixed‐width Booth multiplication is proposed. The derived binary‐weighted close‐form minimizes the conversion loss and hardware cost. With the proposed close‐form, the partial product array can be reduced dramatically. Consequently, the compact FWBM with the proposed RBC not only shortens the critical path to at least 24<jats:italic>%</jats:italic> but also minimizes the power dissipation to at least 44%. Moreover, the proposed RBC outperforms the state‐of‐art with a maximum merit improvement of 39%. By implementing the proposed RBC‐FWBM in the FIR filter, we manage to demonstrate the practicality of the proposed design with a significant reduction in power‐dissipation and delay while maintaining high accuracy.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"372 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Rohit Kumar, Soumya R. Mohanty, Mitresh Kumar Verma
SummaryMitigating inter‐area low‐frequency oscillations is a significant concern in multi‐machine power systems due to their adverse effects on system stability. These oscillations are intricately linked with power oscillations. So appropriate power modulation through the Battery Energy Storage System (BESS) can be an effective strategy for preserving system stability. In this paper, the maximal of all minimal residue indices under variations in power system operating conditions is utilized as the index for identifying the location for installation of the BESS, the damping control loop, and the feedback signal. A fixed‐structure scheme‐based wide‐area damping controller (WADC) is proposed for the BESS, providing sufficient damping of inter‐area oscillation modes. A modified IEEE 39‐bus system is simulated using a real‐time digital simulator as a test system in this work. The simulation results confirmed that the proposed WADC could effectively damp various inter‐area oscillation modes. Furthermore, it offers robust damping performance over contingencies associated with the system's various operating scenarios as well as the uncertainty associated with fixed and variable communication delays in the feedback signal of WADC and the integration of solar photovoltaic systems. Moreover, a comparative analysis of the proposed WADC is carried out with a BESS‐based wide‐area power system stabilizer, which is found to be more effective in mitigating system inter‐area oscillations.
{"title":"Enhancing damping of low‐frequency oscillations in power networks through energy storage system‐based controller","authors":"Rohit Kumar, Soumya R. Mohanty, Mitresh Kumar Verma","doi":"10.1002/cta.4196","DOIUrl":"https://doi.org/10.1002/cta.4196","url":null,"abstract":"SummaryMitigating inter‐area low‐frequency oscillations is a significant concern in multi‐machine power systems due to their adverse effects on system stability. These oscillations are intricately linked with power oscillations. So appropriate power modulation through the Battery Energy Storage System (BESS) can be an effective strategy for preserving system stability. In this paper, the maximal of all minimal residue indices under variations in power system operating conditions is utilized as the index for identifying the location for installation of the BESS, the damping control loop, and the feedback signal. A fixed‐structure scheme‐based wide‐area damping controller (WADC) is proposed for the BESS, providing sufficient damping of inter‐area oscillation modes. A modified IEEE 39‐bus system is simulated using a real‐time digital simulator as a test system in this work. The simulation results confirmed that the proposed WADC could effectively damp various inter‐area oscillation modes. Furthermore, it offers robust damping performance over contingencies associated with the system's various operating scenarios as well as the uncertainty associated with fixed and variable communication delays in the feedback signal of WADC and the integration of solar photovoltaic systems. Moreover, a comparative analysis of the proposed WADC is carried out with a BESS‐based wide‐area power system stabilizer, which is found to be more effective in mitigating system inter‐area oscillations.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"8 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941934","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Haci Bodur, Abdulkerim Gundogan, Ahmet Faruk Bakan
In this paper, a new modular‐isolated‐forward‐based active snubber cell (SC) for power switches is designed. In the proposed new SC, the zero voltage transition (ZVT) technique is implemented with a forward converter although the current counterparts generally use a flyback converter. In the converter with the new SC, the main switch is turned on with ZVT (full zero voltage switching [ZVS]) and turned off with ZVS, the main diode is turned off with zero current switching (ZCS), the auxiliary switch is turned on with ZCS and turned off with ZVS, and the parasitic capacitor energies are recovered. In addition, thanks to the forward converter, it has been possible to minimize the transformer leakage inductance and greatly reduce the current values of devices in the new SC. The new cell is applied to a single‐phase, grid‐connected, T‐type three‐level inverter (T2‐3LI) as an example. A detailed steady‐state analysis of this inverter was made, and the theoretical analysis was confirmed with measurement results taken from a prototype with 100 kHz and 3.3 kW values. Compared to its hard switching (HS) equivalent, in the converter with soft switching (SS) cell, the total circuit loss was reduced from about 248 W to 86 W, thus achieving an increase in the total efficiency from 92.5% to 97.4%.
{"title":"Design of a new modular‐isolated‐forward‐based active snubber cell for power switches","authors":"Haci Bodur, Abdulkerim Gundogan, Ahmet Faruk Bakan","doi":"10.1002/cta.4205","DOIUrl":"https://doi.org/10.1002/cta.4205","url":null,"abstract":"In this paper, a new modular‐isolated‐forward‐based active snubber cell (SC) for power switches is designed. In the proposed new SC, the zero voltage transition (ZVT) technique is implemented with a forward converter although the current counterparts generally use a flyback converter. In the converter with the new SC, the main switch is turned on with ZVT (full zero voltage switching [ZVS]) and turned off with ZVS, the main diode is turned off with zero current switching (ZCS), the auxiliary switch is turned on with ZCS and turned off with ZVS, and the parasitic capacitor energies are recovered. In addition, thanks to the forward converter, it has been possible to minimize the transformer leakage inductance and greatly reduce the current values of devices in the new SC. The new cell is applied to a single‐phase, grid‐connected, T‐type three‐level inverter (T<jats:sup>2</jats:sup>‐3LI) as an example. A detailed steady‐state analysis of this inverter was made, and the theoretical analysis was confirmed with measurement results taken from a prototype with 100 kHz and 3.3 kW values. Compared to its hard switching (HS) equivalent, in the converter with soft switching (SS) cell, the total circuit loss was reduced from about 248 W to 86 W, thus achieving an increase in the total efficiency from 92.5% to 97.4%.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"79 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chaofeng Yan, Qirui Li, Xiaomeng Zhang, Yang Han, Ping Yang, Amr S. Zalhaf
In the multi‐paralleled converter microgrid system, the traditional hierarchical control strategy can eliminate the bus voltage amplitude and frequency deviation from the rated value. However, isolated AC microgrids may face extreme scenarios such as communication delays and interruptions in data transmission due to the use of low‐bandwidth communication (LBC) lines. Additionally, the inconsistent line impedance of each distributed generation (DG) unit may result in the inaccurate division of reactive power in multi‐paralleled converter systems, thus affecting system stability. To address these issues, this paper presents a distributed coordinated control strategy for isolated AC microgrids based on the consensus algorithm. The proposed strategy first replaces LBC lines with a filter to alleviate the effects of communication delays. A small‐signal model is established in its state space, and stability of the microgrid system under the proposed control strategy is verified through eigenvalue analysis. Furthermore, based on the above theoretical analysis, a consensus algorithm is introduced, and a distributed control strategy for isolated AC microgrids based on the consensus algorithm is proposed to solve the issue of inaccurate equalization of the system's reactive power. Finally, factors that influence the dynamic convergence performance of the consensus algorithm are analyzed through simulation in PLECS software. Also, the maximum tolerable communication delays of the microgrid system under different communication topologies are also compared, and the system's robustness is evaluated under the condition of sudden communication interruption in a DG unit and sudden weather variation. These analyses confirmed the robustness of the proposed strategy against communication delays, output power fluctuation, and communication interruptions.
{"title":"A distributed coordinated control strategy for isolated AC microgrids based on consensus algorithm considering communication delay","authors":"Chaofeng Yan, Qirui Li, Xiaomeng Zhang, Yang Han, Ping Yang, Amr S. Zalhaf","doi":"10.1002/cta.4210","DOIUrl":"https://doi.org/10.1002/cta.4210","url":null,"abstract":"In the multi‐paralleled converter microgrid system, the traditional hierarchical control strategy can eliminate the bus voltage amplitude and frequency deviation from the rated value. However, isolated AC microgrids may face extreme scenarios such as communication delays and interruptions in data transmission due to the use of low‐bandwidth communication (LBC) lines. Additionally, the inconsistent line impedance of each distributed generation (DG) unit may result in the inaccurate division of reactive power in multi‐paralleled converter systems, thus affecting system stability. To address these issues, this paper presents a distributed coordinated control strategy for isolated AC microgrids based on the consensus algorithm. The proposed strategy first replaces LBC lines with a filter to alleviate the effects of communication delays. A small‐signal model is established in its state space, and stability of the microgrid system under the proposed control strategy is verified through eigenvalue analysis. Furthermore, based on the above theoretical analysis, a consensus algorithm is introduced, and a distributed control strategy for isolated AC microgrids based on the consensus algorithm is proposed to solve the issue of inaccurate equalization of the system's reactive power. Finally, factors that influence the dynamic convergence performance of the consensus algorithm are analyzed through simulation in PLECS software. Also, the maximum tolerable communication delays of the microgrid system under different communication topologies are also compared, and the system's robustness is evaluated under the condition of sudden communication interruption in a DG unit and sudden weather variation. These analyses confirmed the robustness of the proposed strategy against communication delays, output power fluctuation, and communication interruptions.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"24 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Traditional wet plug charging for autonomous underwater vehicles (AUVs) limits its application. Inductive power transfer (IPT) is an effective solution to this problem. This paper proposes an arc‐shaped magnetic coupler incorporated with solenoid coils to achieve a stable and efficient output against rotational misalignment for charging AUV. The novel magnetic coupler consists of two solenoid coils and an arc‐shaped coil with a reverse winding, guaranteeing a relatively constant total mutual inductance and decoupling from each other. This magnetic coupler has the characteristics of a compact structure, an ultra‐wide coupling range, and a relatively stable equivalent mutual inductance. The experimental IPT prototype can deliver 1.29 kW with a dc–dc efficiency of 93% under the fully aligned case and 1.2 kW with a dc–dc efficiency of 91% under the misaligned case.
{"title":"A novel arc‐shaped magnetic coupler with dual‐channel receiver for rotational misalignment tolerance in AUV underwater wireless power transfer systems","authors":"Hongmin Tang, Zhiwei Shen, Ronghuan Xie, Wenbin Pan, Xiaoying Chen, Zhongqi Li, Yiming Zhang","doi":"10.1002/cta.4222","DOIUrl":"https://doi.org/10.1002/cta.4222","url":null,"abstract":"Traditional wet plug charging for autonomous underwater vehicles (AUVs) limits its application. Inductive power transfer (IPT) is an effective solution to this problem. This paper proposes an arc‐shaped magnetic coupler incorporated with solenoid coils to achieve a stable and efficient output against rotational misalignment for charging AUV. The novel magnetic coupler consists of two solenoid coils and an arc‐shaped coil with a reverse winding, guaranteeing a relatively constant total mutual inductance and decoupling from each other. This magnetic coupler has the characteristics of a compact structure, an ultra‐wide coupling range, and a relatively stable equivalent mutual inductance. The experimental IPT prototype can deliver 1.29 kW with a dc–dc efficiency of 93% under the fully aligned case and 1.2 kW with a dc–dc efficiency of 91% under the misaligned case.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"42 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141941935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Grid‐forming inverters play a vital role in connecting renewable energy sources to the grid, and maintaining stable output voltage is essential for system operation. However, traditional dual‐PI voltage–current loop control suffers from slow response and weak disturbance rejection, leading to suboptimal control performance of grid‐connected inverter output voltage. Moreover, employing traditional dual‐PI control in grid‐connected inverters results in low output impedance, making them prone to subsynchronous oscillations and instability under strong grid conditions. To address these challenges, this study introduces a novel dual‐loop control strategy based on linear active disturbance rejection control (LADRC), wherein voltage loop is regulated by LADRC while current loop employs PI control. Quantitative analysis and experimental findings demonstrate that compared with traditional dual‐PI voltage–current loop control, the LADRC‐based dual‐loop control strategy offers higher bandwidth and lower steady‐state error, thereby enhancing the tracking speed and precision of grid‐forming inverter output voltage. The LADRC‐based dual‐loop control strategy reduces output impedance in grid‐forming inverter systems, lowering THD of output voltage and improving harmonic suppression under nonlinear loads. Experimental results show its robustness against strong grid conditions compared with traditional dual‐PI control, ensuring stable output voltage.
并网逆变器在将可再生能源接入电网方面发挥着重要作用，保持稳定的输出电压对系统运行至关重要。然而，传统的双 PI 电压-电流环控制存在响应速度慢、干扰抑制能力弱等问题，导致并网逆变器输出电压的控制性能不理想。此外，在并网逆变器中采用传统的双 PI 控制会导致输出阻抗较低，在强电网条件下容易产生次同步振荡和不稳定性。为了应对这些挑战，本研究引入了一种基于线性有源干扰抑制控制（LADRC）的新型双环控制策略，其中电压环由 LADRC 调节，而电流环则采用 PI 控制。定量分析和实验结果表明，与传统的电压电流双 PI 环控制相比，基于 LADRC 的双环控制策略具有更高的带宽和更低的稳态误差，从而提高了并网逆变器输出电压的跟踪速度和精度。基于 LADRC 的双环控制策略降低了并网型逆变器系统的输出阻抗，降低了输出电压的总谐波失真（THD），改善了非线性负载下的谐波抑制。实验结果表明，与传统的双 PI 控制相比，它对强电网条件具有鲁棒性，可确保输出电压稳定。
{"title":"Research on linear active disturbance rejection control strategy based on grid‐forming inverters","authors":"Meng Jie Hu, Yu Tang","doi":"10.1002/cta.4186","DOIUrl":"https://doi.org/10.1002/cta.4186","url":null,"abstract":"Grid‐forming inverters play a vital role in connecting renewable energy sources to the grid, and maintaining stable output voltage is essential for system operation. However, traditional dual‐PI voltage–current loop control suffers from slow response and weak disturbance rejection, leading to suboptimal control performance of grid‐connected inverter output voltage. Moreover, employing traditional dual‐PI control in grid‐connected inverters results in low output impedance, making them prone to subsynchronous oscillations and instability under strong grid conditions. To address these challenges, this study introduces a novel dual‐loop control strategy based on linear active disturbance rejection control (LADRC), wherein voltage loop is regulated by LADRC while current loop employs PI control. Quantitative analysis and experimental findings demonstrate that compared with traditional dual‐PI voltage–current loop control, the LADRC‐based dual‐loop control strategy offers higher bandwidth and lower steady‐state error, thereby enhancing the tracking speed and precision of grid‐forming inverter output voltage. The LADRC‐based dual‐loop control strategy reduces output impedance in grid‐forming inverter systems, lowering THD of output voltage and improving harmonic suppression under nonlinear loads. Experimental results show its robustness against strong grid conditions compared with traditional dual‐PI control, ensuring stable output voltage.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"21 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141885372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
SummaryA novel, high voltage gain, non‐isolated, non‐coupled DC‐DC converter is proposed for applications such as PV systems, HEV, aerospace, and so forth. The proposed converter consists of two active switches in parallel, which are turned on and off simultaneously, two inductors in parallel and switched capacitors arrangements. During charging, both the inductor comes in parallel with voltage source and effectively reduces the ripple current and inductor size. These factors attribute to the lower power loss and low cost. The voltage stress of the switches is at least 5 times lower than the output voltage, which allows the use of low switches. The voltage stresses of the diodes are also at least 2.5 times lower than the output voltage, which enables to use low forward voltage drop diodes, and hence, the total power loss due to diode will be further reduced. Lower capacitors' stress also results in reduced parasitics. The detailed steady‐state analysis of the proposed converter and its comparison with the existing converters are presented. The efficiency of the proposed converter is highest. The hardware prototype of 325 W is implemented to boost the voltage by 18 times, and results are presented. The closed‐loop analysis of the proposed converter is also carried out. The maximum efficiency of the proposed converter is reported 96% for 100 W and 93% for 300 W.
摘要 针对光伏系统、混合动力汽车、航空航天等应用，提出了一种新型、高电压增益、非隔离、非耦合 DC-DC 转换器。拟议的转换器由两个并联的有源开关（同时打开和关闭）、两个并联的电感器和开关电容器组成。在充电过程中，两个电感器都与电压源并联，从而有效降低了纹波电流和电感器尺寸。这些因素都有助于降低功率损耗和成本。开关的电压应力至少比输出电压低 5 倍，因此可以使用低开关。二极管的电压应力也至少比输出电压低 2.5 倍，因此可以使用低正向压降二极管，从而进一步降低二极管造成的总功率损耗。较低的电容器应力也会减少寄生效应。本文详细介绍了拟议转换器的稳态分析及其与现有转换器的比较。建议的转换器效率最高。实现了 325 W 的硬件原型，将电压提升了 18 倍，并给出了结果。此外，还对拟议的转换器进行了闭环分析。据报告，100 W 和 300 W 转换器的最高效率分别为 96% 和 93%。
{"title":"A low stress, high voltage, switched capacitor and active switched inductor DC‐DC converter","authors":"Motiur Reza, Avneet Kumar, Pan Xuewei","doi":"10.1002/cta.4190","DOIUrl":"https://doi.org/10.1002/cta.4190","url":null,"abstract":"SummaryA novel, high voltage gain, non‐isolated, non‐coupled DC‐DC converter is proposed for applications such as PV systems, HEV, aerospace, and so forth. The proposed converter consists of two active switches in parallel, which are turned on and off simultaneously, two inductors in parallel and switched capacitors arrangements. During charging, both the inductor comes in parallel with voltage source and effectively reduces the ripple current and inductor size. These factors attribute to the lower power loss and low cost. The voltage stress of the switches is at least 5 times lower than the output voltage, which allows the use of low switches. The voltage stresses of the diodes are also at least 2.5 times lower than the output voltage, which enables to use low forward voltage drop diodes, and hence, the total power loss due to diode will be further reduced. Lower capacitors' stress also results in reduced parasitics. The detailed steady‐state analysis of the proposed converter and its comparison with the existing converters are presented. The efficiency of the proposed converter is highest. The hardware prototype of 325 W is implemented to boost the voltage by 18 times, and results are presented. The closed‐loop analysis of the proposed converter is also carried out. The maximum efficiency of the proposed converter is reported 96% for 100 W and 93% for 300 W.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"44 1","pages":""},"PeriodicalIF":2.3,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141885373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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