International Journal of Circuit Theory and Applications最新文献

The negative group delay (NGD) circuit is uniquely capable of propagating arbitrary waveform signals with time advancement. Achieving significant NGD performance in practical applications, however, requires a multistage design approach. This article develops a design methodology for multistage low-pass (LP) NGD circuits based on RL-networks. After recalling the theoretical design equations enabling the determination of the multistage LP-NGD parameters based on the desired time advance and signal bandwidth, a design flow methodology is introduced. As proof-of-concept, a feasibility study of a multistage LP-NGD circuit, designed for a time advance of −100 ms, is conducted using a three-stage printed circuit board (PCB) consisting of RL-cells. Simulations in both the frequency and time domains confirm that the fabricated PCB prototype can propagate different waveform signals as expected, demonstrating the LP-NGD properties. Time-advance measurements with the PCB prototype further validate these LP-NGD effect findings. The proposed multistage design methodology provides a promising solution for addressing signal delay issues and offers new opportunities for innovative signal processing applications in future electronic systems.

This work proposes a single-phase Simplified split source inverter with dual output. The topology consists of four power electronic switches, and one of the switches is added across one leg of the H-bridge. A hybrid quasi-sinusoidal pulse width modulation technique is implemented to ensure the inductor charges at a constant duty cycle that helps to enhance the input DC voltage and to charge the capacitor to perform the inverter action. The circuit design of the proposed topology has mitigated the effect of the common mode voltage (CMV) problem. In the previous literature, the family of single-phase split source inverter (SSI) topologies has been analyzed with a single-load connected at their load terminals; in contrast, a dual load is connected across the H-bridge terminals, and its performance is analyzed in this work. Different test cases are considered to evaluate the performance of the steady and dynamic states of the topology. The mathematical analogy is evaluated using MATLAB/SIMULINK software with different loads. An experimental prototype is designed in the laboratory, and its control algorithm is provided using an Artix-7 FPGA board.

In this paper, a new concept is proposed for classical cascaded H-bridge (CHB) multilevel inverter (MLI) configurations. The proposed structure includes a DC-DC converter circuit (switching rectifier) that generates multiple asymmetric voltages at the input of the H-bridges. This SR circuit can generate different voltages (1V_DC and 2V_DC) at the same terminals, thus providing a compact solution to existing topologies. Multiple DC bus voltages are generated using HFL and SR, resulting in higher levels at the output compared to traditional asymmetric source configurations. Three H-bridge circuits that generate a 27-level in trinary configuration and a 15-level in binary configuration are combined with two SRs to produce a 35-level output. With an output efficiency of over 96%, the topology offers low power losses and sustainable performance, making it an energy-efficient and cost-effective alternative. The high output level and stable performance characteristics make this hybrid CHB structure suitable for renewable energy systems, electric vehicles, and general power electronics applications. A comprehensive comparison with other MLI designs in the literature is made, and the simulation results are validated with a low-power prototype.

This article proposes a dual-receiver wireless power transfer (WPT) system that can simultaneously achieve load-independent constant current (CC) output and constant voltage (CV) output to charge different types of power modules inside an automated guided vehicle (AGV). In this system, a solenoid coil is wrapped around a Q coil and a piece of ferrite, which acts as the transmitter and receiver charging plate. The solenoid coil wound around the Q coil are naturally decoupled from each other, eliminating additional magnetic coupling interferences in the system, while also enhancing compactness. Furthermore, the two output ports of the proposed system are independent of each other and possess complete electrical isolation characteristics. Firstly, the comprehensive theoretical analysis of the proposed magnetic coupler decoupling characteristics is conducted. Secondly, the circuit model of the dual-receiver WPT system that simultaneously achieves CC and CV outputs and zero phase angle (ZPA) operation is mathematically derived. Thirdly, the implementation of inverter zero voltage switching (ZVS) and the impact of the change of the second-stage receiver series compensation capacitance on the system CC and CV output characteristics are analyzed in detail. Finally, an experimental prototype with the first-stage receiver output voltage of 54 V and the second-stage receiver output current of 3.5 A is built. The experimental results are consistent with the theoretical analysis.

The energies absorbed by ideal switches in general capacitor-switch circuits, both without and with topological degeneracy, are investigated through the so-called asymptotic approach. The core of this approach (already used by the author to address the well-known two-capacitor paradox) is the embedding of each ideal switch into a family of non-ideal switches with finite transition time, which converge to the ideal one when this parameter tends to zero. The conclusion of the investigation, performed through extensive use of graph theory and matrix calculus, is that the energy calculation is feasible, provided that each ideal switch is accompanied by information on its half-rise resistance. This result is the main contribution and novelty of the paper. To illustrate the method, two examples are treated in detail: a series circuit with three capacitors and one switch, and a ladder circuit with three capacitors and two switches (without and with an additional bridge capacitor).

This study proposes a novel architecture for an on-board charging (OBC) system that integrates dual energy sources, viz., single-phase AC grid and solar PV. The system employs a switched-capacitor bidirectional zeta (SCBZ) converter topology to facilitate both grid-to-vehicle (G2V) and vehicle-to-grid (V2G) functionalities. An H-bridge type active front-end converter (AFC) is used to convert AC to DC. An improved mixed second-order–third-order generalized integrator (IMSTOGI) control algorithm is developed to ensure robust operation of AFC under grid disturbance. The AFC ensures that the total harmonic distortion (THD) of the supply current stays within the limit specified by international standards and unity power factor (UPF) operation. The SCBZ converter manages both the charging and discharging processes for LEVs, with an emphasis on enhanced efficiency, low conduction losses, reduced component count, and high gain. The designed system has soft-starting features of BLDC drive in propulsion mode without using any current and voltage sensor at motor side. The performance of the system is tested by using the MATLAB simulation and validated by Opal-RT prototype; the results prove the improved performance of the advanced charging methodology by the proposed SCBZ converter.

This paper introduces the conception, synthesis, and fabrication of a set of miniaturized five-way differential phase shifters that incorporate an integrated filtering capability. In order to achieve a highly reduced footprint in this design, the three-line coupled structure (TLCS) is applied as the phase-shifting element in each phase-shifting branch. The working principles of the TLCS have been subjected to in-depth scholarly investigation. Benefitting from the miniaturized size of the TLCS, the electric size of the phase-shifting element is about 0.005 λ_g², which exhibits a considerably smaller scale when juxtaposed with state-of-the-art solutions. To confirm the feasibility of the concept and synthesis strategy, a group of five-way poly-phase phase shifters has undergone design, fabrication, and measurement, and design guidelines are summarized accordingly. The measured results demonstrate that the achieved relative phase-shift values are 45° ± 1.7°, 90° ± 2.3°, 135° ± 3.2°, and 180° ± 4.1° across a 53% fractional bandwidth, accompanied by amplitude imbalances that do not exceed 0.15 dB across the various phase-shifting pathways.

Many complex systems found in nature, such as lung tissues, transmission lines, and porous energy storage materials, can be modeled by fractal electrical circuit networks. In this work, we compare the input impedance of four different two-dimensional (2-D) infinite $�R�C$ network topologies with different locations being considered in each network for the resistors and capacitors, leading to a number of distinct universal expressions. In particular, we consider the cases of a (i) ladder–tree, (ii) tree–ladder, (iii) ladder–ladder, and (iv) tree–tree network topologies where 1-D ladder and/or 1-D tree networks are used to construct the 2-D planar structures. We only focus on symmetrical self-similar equal-$�R$, equal-$�C$ networks for simplicity, and derive the networks input impedances in normalized form. Although some topologies yield unique impedance functions not obtainable from other topologies, we find that some impedance functions are more universal in the sense that they can be obtained from multiple topologies with simple scaling of the employed $�R$ and/or $�C$ component values. For these specific functions, we derive closed-form expressions for the time-domain voltage and current resulting from a step-current excitation or a step-voltage excitation, respectively. Circuit simulations and experimental results are provided to validate some of our findings.