International Journal of Circuit Theory and Applications最新文献

Passivity-based control (PBC) has been employed as a nonlinear control method in LCL-filtered grid-tied DC/AC inverters (GTIs). However, theoretical analysis has proven that the conventional PBC (C-PBC) technique heavily depends on the accurate mathematical model of the controlled system. This leads to a steady-state error, as well as degradation of the dynamic performance under the condition of parameter drift. To address these issues and in response to existing research focused on improving the power quality of the grid-tied system, enhancing control performance, and optimizing system dynamic response, a new modified PBC (M-PBC) controller for LCL-filtered GTIs is proposed. The dynamic damping injection (DDI) technique is utilized to eliminate the steady-state error. Furthermore, due to the simple feedback coefficient and effective damping effect, the capacitor current feedback (CCF) active damping loop is also designed to achieve a better dynamic response. Finally, the state observer technique is adopted to reduce sensors and save industrial costs. The detailed analysis process is presented and the performance comparison between the C-PBC and M-PBC is carried out. A simulation platform is constructed in MATLAB/Simulink and a 3-kW experimental prototype system is built using dSPACE of DS1202 to validate the proposed controller's feasibility and effectiveness.

This paper introduces an FPGA-accelerated transmission fluctuation autocorrelation spectrum technique for real-time particle size measurement. The system leverages the simplicity of the optical path in the transmission fluctuation autocorrelation spectrum method combined with the parallel processing and pipeline technology of an FPGA to significantly enhance signal processing speed and data throughput. The FPGA implements modules for signal acquisition, autocorrelation processing, data preprocessing, and serial port communication, all parallelized to boost performance. Experimental results demonstrate that the system can effectively measure particle sizes of industrial glass beads with good real-time performance, stability, and repeatability. While some dispersion in measurements is observed, the overall results align with expectations, showcasing the feasibility and potential of this technique for particle size measurement.

This paper introduces a new static random-access memory (SRAM) cell, the Differential Virtual Ground (VGND) 10 T (Dvgnd10T), designed for superior performance. By employing a configuration that consistently maintains the VGND voltage below the threshold of an NMOS transistor, this approach minimizes power consumption and eliminates the risk of half-select disturbance during near-threshold voltage operation. Additionally, the integration of a cut-off supply voltage technique significantly improves the writability of the cell. Simulation outcomes in a 32-nm CMOS technology demonstrate that the Dvgnd10T cell enhances read stability and writability by 3.6× and 1.8×, respectively, over traditional 6T cells. Furthermore, the write and read energy requirements are improved by 1.032× and 1.86× compared to 6T cells. The leakage power of the proposed cell is reduced by 2.24× compared to the 6T cell, while occupying 1.75× more silicon area. The proposed cell improves the overall Figure of Merit (FOM) by 13.2× compared to the 6T cell.

In order to solve the problem that the automatic guided vehicle requires load-independent constant current (CC) and constant voltage (CV) dual-type outputs, it is necessary to design a dual-output wireless power transfer (WPT) system with different output types. However, the existing dual-output WPT systems have problems such as unnecessary cross-coupling, limited space utilization, and complex control methods; therefore, this paper proposes a CC and CV dual-output WPT system based on receiving side decoupling. In the system, the transmitting side coil uses a Q-type coil and a solenoid coil that are connected in series and wound vertically, and the receiving side coil uses a Q-type coil and a solenoid coil that are independent and perpendicular to each other; the mutually perpendicular Q-coil and solenoid coils are naturally decoupled, thus eliminating the effects of cross coupling in the system. First, the decoupling characteristics of the proposed magnetic coupler are analyzed in detail. Second, a mathematical model is established based on the decoupling of the magnetic coupler, and the load-independent output characteristics of the dual-output WPT system and the input impedance showing pure resistance characteristics are derived in detail. Then, the output characteristics under ZPA conditions that can be achieved by the system are further verified through simulation analysis. In addition, in order to reduce the conduction loss of the switch tube in the system, the influence of the change of compensation component parameters on the realization of zero voltage switching is analyzed through normalized simulation. Finally, an experimental prototype is built, achieving CC output of 3.5 A and CV output of 70 V, verifying the correctness of the above theoretical analysis. In addition, when the first receiving side load $�{�R�}_{�B�1�}$ is 30 $�\Omega$ and the second receiving side load $�{�R�}_{�B�2�}$ is 19 $�\Omega$, the peak efficiency can reach 92.6%.

This paper proposes a resistance-to-frequency conversion read-out circuit tailored for gas sensors, adept at translating resistance values into corresponding output signal periods with minimal susceptibility to temperature and voltage fluctuations. The proposed circuit is distinguished by its extensive measurement range, economical power usage, compact chip area, and exceptional accuracy, all integrated through a synergy of current mirrors, an integrator, and a comparator. Realized with 180-nm CMOS technology and functioning at a 1.8-V supply voltage, the circuit adeptly measures resistance values from 4 kΩ to 1 GΩ, encompassing the resistance range of the most resistive gas sensors. The chip area is a modest 0.413 mm², with the core read-out circuit exhibiting a power consumption of merely 4 mW. Furthermore, the circuit achieves a commendable measurement accuracy of 0.1%.

In dynamic wireless power transfer systems for smart rail trains, a high fluctuation rate of mutual inductance leads to reduced efficiency when an offset occurs between the transmitting and receiving coils. This paper explores the mutual inductance characteristics and the variation rule of the magnetic flux density between the transmitting coil and the receiving coil at the offset. In addition, an I-shaped coil structure is proposed. The I-shaped coil structure has good antioffset performance in the direction of motion, and the maximum offset distance is up to 1.2 times the outer length of the transmitting coil. First, the mutual inductance characteristics of this I-shaped coil structure are investigated based on the coupling mechanism of the I-coil. Moreover, a mutual inductance optimization method is proposed, which is used to obtain the values of each coil parameter that satisfy the requirements. Second, the magnetic core of the I-coil structure is optimized for higher mutual inductance and better transmission efficiency. Finally, a wireless power transfer system is constructed based on the obtained coil and magnetic core parameters. Simulation and experimental tests are carried out for this coil structure and the coil structure with a magnetic core, respectively. The experimental results verify the rationality and correctness of the structure. The results show that the maximum mutual inductance fluctuation rate is only 4.97% in the coil structure without magnetic cores, with the offset distance between the transmitting and receiving coils at 120% of the outer edge length of the transmitting coil. With the addition of the magnetic core, the maximum mutual inductance fluctuation is only 5.02%, with an efficiency of 97.61% at an offset distance between the transmitting and receiving coils of 120% (50.8 cm) of the outer edge length of the transmitting coil.

Common mode voltage (CMV) influences the operation and life of inverter-fed drives. This can be attributed to the fact that the high pulsating CMV will dictate the nature of ground currents/common mode currents (CMC) that flow through the drive. The nature of CMV depends on multiple factors like switching patterns, adopted pulse width modulation (PWM), and inverter topology. Additionally, for DC-decoupled inverter topologies and for inverters with non-complementary switching actions of top and bottom switches, the CMV depends on the semiconductor device parasitic capacitances (SDPC). Thus, analysis of CMV is critical before designing a drive system. Additionally, the analysis is more critical in an inverter-fed pole phase modulated (PPM) induction motor drive (IMD). Therefore, the paper proposes switching function–based CMV analysis by considering the inverter's SDPC effect employed for PPM-IMD. Further, the paper also gives an analysis of the system's CMC. To prove the proposed analysis, a DC-decoupled inverter-fed PPM-IMD is considered to pre-verify the CMV nature in different pole-phase combinations (3-φ, 12-pole, 9-φ, 4-pole). The analysis helps in the pre-fixation of the PWM and switching patterns of the inverter for smooth PPM-IMD operation. The realization of the proposed analysis is carried out in the ANSYS environment and illuminated experimentally.

This brief report introduces a low-cost, open-loop digital spread spectrum clock divider (DSSCD) specifically designed for class-D audio amplifier applications. Unlike conventional spread spectrum clock generators that rely on feedback architectures, such as phase-locked loops (PLLs) and delay-locked loops (DLLs), the proposed DSSCD employs a feed-forward architecture using simple, fully synthesizable circuit blocks combined with an analog harmonic suppresser. The core design features a counter-based clock divider (CBCD) with dynamically adjustable division factors. This clock divider is driven by a $�\Delta �\Sigma$-modulated triangular waveform, which continuously varies the division ratio, effectively spreading the clock spectrum and reducing spectral peaks that contribute to electromagnetic interference (EMI). A digital waveform generator produces the triangular input signal for modulation, while the harmonic suppresser attenuates high-frequency harmonics to smooth the divider's output. Fabricated in 180-nm digital process and operating at a 1.2-V supply, the proposed DSSCD achieves an output frequency range from 96 kHz (12 fs, 1 fs = 8 kHz) to 1.024 MHz (128 fs), with a frequency spread range from 0% to 10%. The design occupies an area of 0.0108 mm$�{}^{�2�}$ and consumes 252 $�\mu$W with 147.456-MHz (18,432-fs) input and 192-kHz (24-fs) output. By simplifying circuit complexity while reducing power consumption and chip area, the proposed DSSCD provides an efficient and cost-effective spread spectrum solution for class-D audio applications.