Printed electronics is a fastest growing and emerging technology that have shown much potential in several industries including automotive, wearables, healthcare, and aerospace. Its applications can be found not only in flexible but also in large area electronics. Inkjet technology has gained much attention due to its low-cost, low material consumption, and capability for mass manufacturing. The preferred conductive metal of choice has been mostly silver due to its excellent electrical properties and ease in sintering. However, silver comes to be expensive than its counterpart copper. Since copper is prone to oxidation, much focus has been given towards photonic sintering that involves sudden burst of pulsed light at certain energy to sinter the copper Nanoparticles. With this technique, only the printed material gets sintered in a matter of seconds without having a great impact on its substrate. With all the knowledge, there is still a large gap in the process side with copper where it is important to look how the print process affects the electrical and mechanical properties of copper. With the process developed, the resistivity of printed copper was found to be 5 times the bulk copper. In regards to adhesion to the polyimide film, mechanical shear load to failure was found to be within 15-20 gF. To demonstrate the complete process, commercial-off-the-shelf components are also mounted on the additively printed pads. Statistically, control charting technique is implemented to understand any process variation over long duration of prints.
{"title":"Process Development for Printed Copper with Surface Mount Devices On Inkjet Metallization","authors":"P. Lall, Kartik Goyal, C. Hill","doi":"10.1115/1.4055986","DOIUrl":"https://doi.org/10.1115/1.4055986","url":null,"abstract":"\u0000 Printed electronics is a fastest growing and emerging technology that have shown much potential in several industries including automotive, wearables, healthcare, and aerospace. Its applications can be found not only in flexible but also in large area electronics. Inkjet technology has gained much attention due to its low-cost, low material consumption, and capability for mass manufacturing. The preferred conductive metal of choice has been mostly silver due to its excellent electrical properties and ease in sintering. However, silver comes to be expensive than its counterpart copper. Since copper is prone to oxidation, much focus has been given towards photonic sintering that involves sudden burst of pulsed light at certain energy to sinter the copper Nanoparticles. With this technique, only the printed material gets sintered in a matter of seconds without having a great impact on its substrate. With all the knowledge, there is still a large gap in the process side with copper where it is important to look how the print process affects the electrical and mechanical properties of copper. With the process developed, the resistivity of printed copper was found to be 5 times the bulk copper. In regards to adhesion to the polyimide film, mechanical shear load to failure was found to be within 15-20 gF. To demonstrate the complete process, commercial-off-the-shelf components are also mounted on the additively printed pads. Statistically, control charting technique is implemented to understand any process variation over long duration of prints.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-10-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43593198","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Miniaturization as well as manufacturing processes that electronics devices are subjected to, often results to increase in operational parameters such as current density, temperature, mechanical load, with potential to induce stresses that may be detrimental to device reliability. Past studies have identified some failure mechanisms common to these devices. Examples of these failure mechanisms include fatigue, electromigration, stress induced voiding, corrosion, conduction filament formation and time dependent dielectric breakdown. While some review activities related to reliability model development based on these failure mechanisms can be easily found in literature, to the best of our knowledge, a single review paper, which captures the reliability model progresses made over the past four decades across these failure mechanisms in comparison with Standards such as Joint Electron Device Engineering Council (JEDEC) and Institute for Printed Circuits (IPC) is to the best of our knowledge lacking. To fill this gap, a detailed review of failure mechanism driven reliability models, with emphasis on physics of failure (PoF) for power electronics was carried out in this paper. Although, other failure mechanisms exist, our review is only limited to fatigue, electromigration, stress induced voiding, corrosion, conduction filament formation and time dependent dielectric breakdown. It was found that, most reliability research modelling efforts are yet to be fully integrated into Standards.
{"title":"Failure Mechanisms Driven Reliability Models for Power Electronics: A Review","authors":"E. Okafor, D. Huitink","doi":"10.1115/1.4055774","DOIUrl":"https://doi.org/10.1115/1.4055774","url":null,"abstract":"\u0000 Miniaturization as well as manufacturing processes that electronics devices are subjected to, often results to increase in operational parameters such as current density, temperature, mechanical load, with potential to induce stresses that may be detrimental to device reliability. Past studies have identified some failure mechanisms common to these devices. Examples of these failure mechanisms include fatigue, electromigration, stress induced voiding, corrosion, conduction filament formation and time dependent dielectric breakdown. While some review activities related to reliability model development based on these failure mechanisms can be easily found in literature, to the best of our knowledge, a single review paper, which captures the reliability model progresses made over the past four decades across these failure mechanisms in comparison with Standards such as Joint Electron Device Engineering Council (JEDEC) and Institute for Printed Circuits (IPC) is to the best of our knowledge lacking. To fill this gap, a detailed review of failure mechanism driven reliability models, with emphasis on physics of failure (PoF) for power electronics was carried out in this paper. Although, other failure mechanisms exist, our review is only limited to fatigue, electromigration, stress induced voiding, corrosion, conduction filament formation and time dependent dielectric breakdown. It was found that, most reliability research modelling efforts are yet to be fully integrated into Standards.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46223999","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This study introduces a modified dynamic multiphysics modeling framework to characterize the electromagnetic-electro-thermal (EET) coupled behavior of a power conversion system during a long load operation. The modeling framework extends the prior model with more comprehensive analysis and enhanced computational efficiency and modeling simplicity. This framework incorporates a fully integrated electromagnetic circuit (FIEC) model for extracting parasitics, including self and mutual inductances and also exploring their effect on the switching characteristics and power losses, and a dynamic power loss-temperature thermal (PTT) model for describing the temperature-dependent instantaneous electrical behavior and power loss. Moreover, a simple resistance-capacitance (RC) snubber circuit design is applied to prevent overvoltage and diminish voltage oscillations and spike value during the operation, and their power losses are also assessed and considered in the dynamic EET coupled modeling. Furthermore, the proposed PTT model employs an equivalent thermal RC network to calculate the chip junction temperature with a given power. Additionally, a simple power-temperature relationship derived from the FIEC co-simulation is applied for modeling simplicity and computational efficiency. This framework is tested on a three-phase inverter operating with a 180-degree conduction mode. The proposed FIEC co-simulation and CFD thermal models are validated by double pulse (DPT) and IR thermography experiments, respectively. Moreover, the PTT model is validated compared with the conventional dynamic coupled electro-thermal model. Finally, a design guideline for enhanced thermal performance of the tested power conversion system is sought through parametric analysis.
{"title":"Dynamic Modeling Framework for Evaluating Electromagnetic-Electro-Thermal Behavior of Power Conversion System During Load Operation","authors":"Hsien-Chie Cheng, Yan-Cheng Liu","doi":"10.1115/1.4055591","DOIUrl":"https://doi.org/10.1115/1.4055591","url":null,"abstract":"\u0000 This study introduces a modified dynamic multiphysics modeling framework to characterize the electromagnetic-electro-thermal (EET) coupled behavior of a power conversion system during a long load operation. The modeling framework extends the prior model with more comprehensive analysis and enhanced computational efficiency and modeling simplicity. This framework incorporates a fully integrated electromagnetic circuit (FIEC) model for extracting parasitics, including self and mutual inductances and also exploring their effect on the switching characteristics and power losses, and a dynamic power loss-temperature thermal (PTT) model for describing the temperature-dependent instantaneous electrical behavior and power loss. Moreover, a simple resistance-capacitance (RC) snubber circuit design is applied to prevent overvoltage and diminish voltage oscillations and spike value during the operation, and their power losses are also assessed and considered in the dynamic EET coupled modeling. Furthermore, the proposed PTT model employs an equivalent thermal RC network to calculate the chip junction temperature with a given power. Additionally, a simple power-temperature relationship derived from the FIEC co-simulation is applied for modeling simplicity and computational efficiency. This framework is tested on a three-phase inverter operating with a 180-degree conduction mode. The proposed FIEC co-simulation and CFD thermal models are validated by double pulse (DPT) and IR thermography experiments, respectively. Moreover, the PTT model is validated compared with the conventional dynamic coupled electro-thermal model. Finally, a design guideline for enhanced thermal performance of the tested power conversion system is sought through parametric analysis.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47015906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tiwei Wei, Sougata Hazra, Yujui Lin, M. Gupta, M. Degner, M. Asheghi, E. K. Goodson
Silicon-based embedded microchannel with 3D manifold micro-cooler offers lower pressure drop and increased heat removal capability (>1 kW/cm2) for microprocessors and power electronics cooling using single-phase water. In this paper, we present a thermal-fluidic numerical analysis of silicon-embedded micro-channel cooling. We develop a full-scale computational fluid dynamics (CFD) model of a large footprint (24 × 24 mm2) device having embedded microchannels and a 3D manifold. It is found that the pressure/velocity distributions at three different critical regions inside the inlet manifold have a significant impact on the temperature distribution. A previous study reported a shift of the chip temperature hot-spot at high flow rates, this study delves deep into the flow and pressure variations within the Manifold (MF) and Cold Plate (CP) that leads to this shift. This study also investigates the degree of flow maldistribution, first between the manifold channels caused by the plenum and then between the Cold Plate channels caused by the individual MF channels. Finally, this study concludes with a comparison between two different 3D manifold inlet channel heights. The comparison reveals that the manifold with 1.5 mm thickness can reduce the pressure drop by a factor of 4 while maintaining the same thermal resistance of 0.04 K.cm2/W, thus indicating an increase in the coefficient of performance (COP) by a factor of 4, compared with a manifold thickness of 0.7 mm.
{"title":"Numerical Study of Large Footprint (24 × 24mm2) Silicon-Based Embedded Microchannel 3D Manifold Coolers","authors":"Tiwei Wei, Sougata Hazra, Yujui Lin, M. Gupta, M. Degner, M. Asheghi, E. K. Goodson","doi":"10.1115/1.4055468","DOIUrl":"https://doi.org/10.1115/1.4055468","url":null,"abstract":"\u0000 Silicon-based embedded microchannel with 3D manifold micro-cooler offers lower pressure drop and increased heat removal capability (>1 kW/cm2) for microprocessors and power electronics cooling using single-phase water. In this paper, we present a thermal-fluidic numerical analysis of silicon-embedded micro-channel cooling. We develop a full-scale computational fluid dynamics (CFD) model of a large footprint (24 × 24 mm2) device having embedded microchannels and a 3D manifold. It is found that the pressure/velocity distributions at three different critical regions inside the inlet manifold have a significant impact on the temperature distribution. A previous study reported a shift of the chip temperature hot-spot at high flow rates, this study delves deep into the flow and pressure variations within the Manifold (MF) and Cold Plate (CP) that leads to this shift. This study also investigates the degree of flow maldistribution, first between the manifold channels caused by the plenum and then between the Cold Plate channels caused by the individual MF channels. Finally, this study concludes with a comparison between two different 3D manifold inlet channel heights. The comparison reveals that the manifold with 1.5 mm thickness can reduce the pressure drop by a factor of 4 while maintaining the same thermal resistance of 0.04 K.cm2/W, thus indicating an increase in the coefficient of performance (COP) by a factor of 4, compared with a manifold thickness of 0.7 mm.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46326591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Joshua Kasitz, Aniket Ajay Lad, M. J. Hoque, N. Miljkovic, D. Huitink
High power electronics are a key component in the electrification of aircraft. Large amounts of power need to be handled onboard to generate sufficient lift for flight. The transient nature of the aircraft's mission profile produces varied loading and environmental influences, making consistent cooling and device reliability difficult to maintain. Due to limitations in weight and performance metrics, the thermal management capability becomes a key inhibiting factor in preventing adoption of all electric aircraft. Many efforts are focused on the improvement of high-powered electronics such as the inverters, batteries, and motors, but there is a need for increased focus on the implications of each improved device on the total system with regards to thermal management. To address the many concerns for thermal management within aviation, this paper will review the prevalent factors of flight and couple them to their respective challenges to highlight the overarching effort needed to successfully integrate efficient electric propulsion devices with their protective thermal management systems. A review will be combined with a brief analytical study over inverter cooling to examine the effects of various transient parameters on the device temperature of an inverter in flight. The impact of failure in the cooling systems on the shutdown process will also be examined. Both studies are tied to the motivation for examining the impacts of new and transient challenges faced by electric power systems and help signify the importance of this focus as these systems become more present and capable within the aviation industry.
{"title":"Transient Nature of Flight and Its Impact on Thermal Management for All Electric Aircraft","authors":"Joshua Kasitz, Aniket Ajay Lad, M. J. Hoque, N. Miljkovic, D. Huitink","doi":"10.1115/1.4055464","DOIUrl":"https://doi.org/10.1115/1.4055464","url":null,"abstract":"\u0000 High power electronics are a key component in the electrification of aircraft. Large amounts of power need to be handled onboard to generate sufficient lift for flight. The transient nature of the aircraft's mission profile produces varied loading and environmental influences, making consistent cooling and device reliability difficult to maintain. Due to limitations in weight and performance metrics, the thermal management capability becomes a key inhibiting factor in preventing adoption of all electric aircraft. Many efforts are focused on the improvement of high-powered electronics such as the inverters, batteries, and motors, but there is a need for increased focus on the implications of each improved device on the total system with regards to thermal management. To address the many concerns for thermal management within aviation, this paper will review the prevalent factors of flight and couple them to their respective challenges to highlight the overarching effort needed to successfully integrate efficient electric propulsion devices with their protective thermal management systems. A review will be combined with a brief analytical study over inverter cooling to examine the effects of various transient parameters on the device temperature of an inverter in flight. The impact of failure in the cooling systems on the shutdown process will also be examined. Both studies are tied to the motivation for examining the impacts of new and transient challenges faced by electric power systems and help signify the importance of this focus as these systems become more present and capable within the aviation industry.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46649670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The electromigration (EM) damage is becoming a severe problem in the printed flexible electronics as the printed circuits are fabricated thinner and thinner due to the development of printing technology. In this work, the EM behavior of printed silver wires was investigated by EM experiments and numerical simulations. The EM tests showed that voids are generated in the cathode area and hillocks are formed in the anode area for a wire with a small length. However, with the increase of wire length, hillocks tend to occur on the two sides of the silver wire middle part. The results of numerical simulations based on the atomic flux divergence (AFD) method revealed that the formation of the hillocks on the printed wire is caused by not only the mechanism of electron wind, but also the strong temperature gradient along the wire length and width direction. Also, it can be concluded that the temperature gradient induced by Joule heating plays a more important role than electron wind in the atomic migration of the printed silver wire subjected to a high current density. The influence of the printed silver wire size on the EM behavior was also analyzed by numerical simulation, and the results demonstrated that the printed silver wires with a larger length and a smaller width-to-thickness ratio are more likely to develop hillocks on the two sides of silver wire middle part while subjected to a high current density.
{"title":"Experimental and Numerical Investigation of Electromigration Behavior of Printed Silver Wire Under High Current Density","authors":"Haibin Zhang, Quanshe Sun, Zhidan Sun, Yebo Lu","doi":"10.1115/1.4055469","DOIUrl":"https://doi.org/10.1115/1.4055469","url":null,"abstract":"\u0000 The electromigration (EM) damage is becoming a severe problem in the printed flexible electronics as the printed circuits are fabricated thinner and thinner due to the development of printing technology. In this work, the EM behavior of printed silver wires was investigated by EM experiments and numerical simulations. The EM tests showed that voids are generated in the cathode area and hillocks are formed in the anode area for a wire with a small length. However, with the increase of wire length, hillocks tend to occur on the two sides of the silver wire middle part. The results of numerical simulations based on the atomic flux divergence (AFD) method revealed that the formation of the hillocks on the printed wire is caused by not only the mechanism of electron wind, but also the strong temperature gradient along the wire length and width direction. Also, it can be concluded that the temperature gradient induced by Joule heating plays a more important role than electron wind in the atomic migration of the printed silver wire subjected to a high current density. The influence of the printed silver wire size on the EM behavior was also analyzed by numerical simulation, and the results demonstrated that the printed silver wires with a larger length and a smaller width-to-thickness ratio are more likely to develop hillocks on the two sides of silver wire middle part while subjected to a high current density.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43464868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Xin Wei, M. Belhadi, S. Hamasha, Ali Alahmer, R. Zhao, B. Prorok, N. Sakib
The reliability of SAC-based solder alloys has been extensively investigated after the prohibition of lead in the electronics industry owing to their toxicity. Low-temperature solder (LTS) alloys have recently received considerable attention because of their low cost and reduced defects in complex assemblies. The shear and fatigue properties of individual solder joints were tested using an Instron micromechanical testing system in this research. Two novel solder alloys (Sn-58Bi-0.5Sb-0.15Ni and Sn-42Bi) with low melting temperatures were examined and compared with Sn-3.5Ag and Sn-3.0Ag-0.8Cu-3.0Bi. The surface finish was electroless nickel-immersion gold (ENIG) during the test. Shear testing was conducted at three strain rates, and the shear strength of each solder alloy was measured. A constant strain rate was used for the cyclic fatigue experiments. The fatigue life of each alloy was determined for various stress amplitudes. The failure mechanism in shear and fatigue tests were characterized using scanning electron microscopy/energy-dispersive spectroscopy (SEM/EDS). The results revealed that Sn-3.0Ag-0.8Cu-3.0Bi had superior shear and fatigue properties compared to other alloys, but was more susceptible to brittle failure. The shear strain rate affected the failure modes of Sn-3.0Ag-0.8Cu-3.0Bi, Sn-58Bi-0.5Sb-0.15Ni, and Sn-42Bi; however, Sn-3.5Ag was found to be insensitive. Several failure modes were detected for Sn-3.5Ag in both shear strength and fatigue tests.
{"title":"Shear and Fatigue Properties of Lead-Free Solder Joints: Modeling and Microstructure Analysis","authors":"Xin Wei, M. Belhadi, S. Hamasha, Ali Alahmer, R. Zhao, B. Prorok, N. Sakib","doi":"10.1115/1.4055318","DOIUrl":"https://doi.org/10.1115/1.4055318","url":null,"abstract":"\u0000 The reliability of SAC-based solder alloys has been extensively investigated after the prohibition of lead in the electronics industry owing to their toxicity. Low-temperature solder (LTS) alloys have recently received considerable attention because of their low cost and reduced defects in complex assemblies. The shear and fatigue properties of individual solder joints were tested using an Instron micromechanical testing system in this research. Two novel solder alloys (Sn-58Bi-0.5Sb-0.15Ni and Sn-42Bi) with low melting temperatures were examined and compared with Sn-3.5Ag and Sn-3.0Ag-0.8Cu-3.0Bi. The surface finish was electroless nickel-immersion gold (ENIG) during the test. Shear testing was conducted at three strain rates, and the shear strength of each solder alloy was measured. A constant strain rate was used for the cyclic fatigue experiments. The fatigue life of each alloy was determined for various stress amplitudes. The failure mechanism in shear and fatigue tests were characterized using scanning electron microscopy/energy-dispersive spectroscopy (SEM/EDS). The results revealed that Sn-3.0Ag-0.8Cu-3.0Bi had superior shear and fatigue properties compared to other alloys, but was more susceptible to brittle failure. The shear strain rate affected the failure modes of Sn-3.0Ag-0.8Cu-3.0Bi, Sn-58Bi-0.5Sb-0.15Ni, and Sn-42Bi; however, Sn-3.5Ag was found to be insensitive. Several failure modes were detected for Sn-3.5Ag in both shear strength and fatigue tests.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42250054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
F. Qin, Qi He, Yanpeng Gong, Chuantao Hou, Hao Cheng, Tong An, Yanwei Dai, Pei Chen
We introduce a coupled finite and boundary element method for elastic-plastic analysis over multiscale electronic packaging structures. Based on the FE-BE coupling algorithm, an automatic implementation procedure for the coupling of the Abaqus with a self-written elastic BE code is introduced for elastic problems. In the mixed FEM-BEM model, the effective stiffness and effective forces at the interfacial boundary are evaluated by the self-written BE code. Then, the obtained effective stiffness and effective forces are assembled to the global FE formulations by using the user subroutine (UEL) in Abaqus. Numerical simulation of structures with plastic deformation, stress concentration, etc. is carried out by using FEM theory. The boundary element method is used for linear elastic domains with large-scale structure. The proposed method offers several key improvements compared with current analysis methods available for multi-scale electronic packaging structures. The benefits are: (i) the powerful pre- and post-processing of ABAQUS; (ii) the higher accuracy of the solution; (iii) the computational cost and time can be reduced by using the scheme; and (iv) solving systems with infinite extension by using the BEM as a supplement. Furthermore, we demonstrate the ability of the proposed approach to handle multiscale structures in electronic packaging problems.
{"title":"An Automatic Fem-bem Coupling Method for Elastic-plastic Problems of Multiscale Structures in Electronic Packaging","authors":"F. Qin, Qi He, Yanpeng Gong, Chuantao Hou, Hao Cheng, Tong An, Yanwei Dai, Pei Chen","doi":"10.1115/1.4055125","DOIUrl":"https://doi.org/10.1115/1.4055125","url":null,"abstract":"\u0000 We introduce a coupled finite and boundary element method for elastic-plastic analysis over multiscale electronic packaging structures. Based on the FE-BE coupling algorithm, an automatic implementation procedure for the coupling of the Abaqus with a self-written elastic BE code is introduced for elastic problems. In the mixed FEM-BEM model, the effective stiffness and effective forces at the interfacial boundary are evaluated by the self-written BE code. Then, the obtained effective stiffness and effective forces are assembled to the global FE formulations by using the user subroutine (UEL) in Abaqus. Numerical simulation of structures with plastic deformation, stress concentration, etc. is carried out by using FEM theory. The boundary element method is used for linear elastic domains with large-scale structure. The proposed method offers several key improvements compared with current analysis methods available for multi-scale electronic packaging structures. The benefits are: (i) the powerful pre- and post-processing of ABAQUS; (ii) the higher accuracy of the solution; (iii) the computational cost and time can be reduced by using the scheme; and (iv) solving systems with infinite extension by using the BEM as a supplement. Furthermore, we demonstrate the ability of the proposed approach to handle multiscale structures in electronic packaging problems.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43028168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shuv Dey, Luis Diego Monge Jimenez, J. M. Brown, Y. Joshi
Outdoor digital displays have become increasingly popular and common for smart city applications, and more recently provides a concealment solution and integration point for outdoor communications devices meant to be attached to buildings, streetlamps, or traffic poles. Given the larger energy requirements for powering next generation 5G cellular networks, these devices create unique difficulties in developing and evaluating thermal management solutions. The present study develops and validates the extreme condition transient (ECT) climate model using a CFD/HT numerical model, to evaluate diurnal thermal responses from a representative 5G small cell devices. The model is validated for local conditions present in Atlanta, GA for two unique days. The thermal response from the ECT climate model is presented alongside three real case study locations, Miami, FL, New York City, NY, and Phoenix, AZ.
{"title":"Development and Validation of a Transient Heat Transfer Model for Evaluating Thermal Management Solutions for Packaging Next-Generation Smart City Infrastructure Devices","authors":"Shuv Dey, Luis Diego Monge Jimenez, J. M. Brown, Y. Joshi","doi":"10.1115/1.4055094","DOIUrl":"https://doi.org/10.1115/1.4055094","url":null,"abstract":"\u0000 Outdoor digital displays have become increasingly popular and common for smart city applications, and more recently provides a concealment solution and integration point for outdoor communications devices meant to be attached to buildings, streetlamps, or traffic poles. Given the larger energy requirements for powering next generation 5G cellular networks, these devices create unique difficulties in developing and evaluating thermal management solutions. The present study develops and validates the extreme condition transient (ECT) climate model using a CFD/HT numerical model, to evaluate diurnal thermal responses from a representative 5G small cell devices. The model is validated for local conditions present in Atlanta, GA for two unique days. The thermal response from the ECT climate model is presented alongside three real case study locations, Miami, FL, New York City, NY, and Phoenix, AZ.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45644443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this work, a novel testing system has been employed to facilitate the estimation of the reliability of solder interconnects under the combined influence of EM and mechanical strain. The system subjects solder interconnects to high current density, elevated ambient temperature, and a constant tensile stress while recording the change in electrical resistance and change in length of the solder over time. The solder samples were created using two copper wires connected by a eutectic Pb/Sn solder ball to imitate flip-chip or BGA packaging interconnects, allowing for controlled testing conditions in order to demonstrate the combined effects of a mechanical load and EM on the lifetime of a solder joint. A significant reduction in lifetime was observed for samples which endured the coupled accelerating factors. Comparing the experimental results of different current densities at different stress levels provided a new outlook on the nature of coupled failure acceleration in solders. This novel test methodology can inform model generation for better anticipating the failure rate of solder interconnects which naturally experience multiple stress inputs during their lifetime.
{"title":"Accelerated Solder Interconnect Testing Under Electromigratory and Mechanical Strain Conditions","authors":"Mahsa Montazeri, Whit Vinson, D. Huitink","doi":"10.1115/1.4055024","DOIUrl":"https://doi.org/10.1115/1.4055024","url":null,"abstract":"\u0000 In this work, a novel testing system has been employed to facilitate the estimation of the reliability of solder interconnects under the combined influence of EM and mechanical strain. The system subjects solder interconnects to high current density, elevated ambient temperature, and a constant tensile stress while recording the change in electrical resistance and change in length of the solder over time. The solder samples were created using two copper wires connected by a eutectic Pb/Sn solder ball to imitate flip-chip or BGA packaging interconnects, allowing for controlled testing conditions in order to demonstrate the combined effects of a mechanical load and EM on the lifetime of a solder joint. A significant reduction in lifetime was observed for samples which endured the coupled accelerating factors. Comparing the experimental results of different current densities at different stress levels provided a new outlook on the nature of coupled failure acceleration in solders. This novel test methodology can inform model generation for better anticipating the failure rate of solder interconnects which naturally experience multiple stress inputs during their lifetime.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48332932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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