Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301954
M. Nguyen, V. Nguyen, J. Saint-Martin, P. Dollfus
The effects of local uniaxial strain on grapshene devices like single-barrier structure and p-n tunnel diode are investigated. The strain-induced displacement of Dirac points allows us toi suppress and/or control the Klein tunneling and the interband tunneling, which leads to strong effect of negative differential conductance. It is shown that when strain is suitably applied, the peak-to-valley ratio of the current-voltage characteristics can reach of a few hundred at room temperature.
{"title":"Strong negative differential resistance in graphene devices with local strain","authors":"M. Nguyen, V. Nguyen, J. Saint-Martin, P. Dollfus","doi":"10.1109/IWCE.2015.7301954","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301954","url":null,"abstract":"The effects of local uniaxial strain on grapshene devices like single-barrier structure and p-n tunnel diode are investigated. The strain-induced displacement of Dirac points allows us toi suppress and/or control the Klein tunneling and the interband tunneling, which leads to strong effect of negative differential conductance. It is shown that when strain is suitably applied, the peak-to-valley ratio of the current-voltage characteristics can reach of a few hundred at room temperature.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"24 20","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120971687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301971
C. Lai, Chien-Yang Chen, Yiming Li
In this work, we investigate workfunction (WK) fluctuation of gate-all-around Si nanowire MOS devices by solving a sets of 2D Schrödinger-Poisson equations. We discuss characteristic fluctuation in view of randomly interactive quantum confinement with subbands and wavefunctions. The influences of metal-grain size and channel width on the random WK-induced characteristic fluctuation are studied; additionally, the random positions of metal grain are discussed. The WK of metal grain in the corner of square-shaped channel possesses greater impact on characteristic fluctuation because of enhanced corner effect. Devices with a large channel width and small nanosized metal grains suffer from relatively smaller percentage of fluctuation.
{"title":"Nanosized-metal-grain-induced characteristic fluctuation in gate-all-around si nanowire metal-oxide-semiconductor devices","authors":"C. Lai, Chien-Yang Chen, Yiming Li","doi":"10.1109/IWCE.2015.7301971","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301971","url":null,"abstract":"In this work, we investigate workfunction (WK) fluctuation of gate-all-around Si nanowire MOS devices by solving a sets of 2D Schrödinger-Poisson equations. We discuss characteristic fluctuation in view of randomly interactive quantum confinement with subbands and wavefunctions. The influences of metal-grain size and channel width on the random WK-induced characteristic fluctuation are studied; additionally, the random positions of metal grain are discussed. The WK of metal grain in the corner of square-shaped channel possesses greater impact on characteristic fluctuation because of enhanced corner effect. Devices with a large channel width and small nanosized metal grains suffer from relatively smaller percentage of fluctuation.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"218 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123254212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301980
A. Price, A. Martinez
Using quantum transport simulations the effect of confinement in GaAs and InGaAs gate-all-around (GAA) nanowire field effect transistors (NWFETs) of different dimensions has been investigated. NWFETs of two cross-sections: 2.2x2.2 nm2 and 4.2x4.2 nm2 and three channel lengths: 6 nm, 10 nm and 20 nm have been simulated. The Non-Equilibrium Green's Function (NEGF) formalism in the effective mass approximation (EMA) has been used, and both ballistic and dissipative transport have been considered. Scattering mechanisms for acoustic, optical and polar optical phonons have been included. The effective masses have been extracted from tight-binding (TB) simulations.
{"title":"Effect of confinement in III-V nanowire field effect transistors","authors":"A. Price, A. Martinez","doi":"10.1109/IWCE.2015.7301980","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301980","url":null,"abstract":"Using quantum transport simulations the effect of confinement in GaAs and InGaAs gate-all-around (GAA) nanowire field effect transistors (NWFETs) of different dimensions has been investigated. NWFETs of two cross-sections: 2.2x2.2 nm2 and 4.2x4.2 nm2 and three channel lengths: 6 nm, 10 nm and 20 nm have been simulated. The Non-Equilibrium Green's Function (NEGF) formalism in the effective mass approximation (EMA) has been used, and both ballistic and dissipative transport have been considered. Scattering mechanisms for acoustic, optical and polar optical phonons have been included. The effective masses have been extracted from tight-binding (TB) simulations.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125088377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301977
D. Nagy, M. Elmessary, M. Aldegunde, J. Lindberg, A. García-Loureiro, K. Kalna
Interface roughness scattering (IRS) is one of the key limiting scattering mechanism for both planar and non-planar CMOS devices. To predict the performance of future scaled devices and new structures the quantum mechanical confinement based IRS models are essential. In this work, the in-house 3D finite element Monte Carlo code with 2D Schrodinger equation based quantum correction serves as a base for implementation of a new multi-subband extended Prange & Nee (EPN) IRS model and for comparison with the previously used 3D Ando model. The transistors selected for the comparison are 10.7 nm gate length SOI Si FinFETs with two cross-sections: rectangular and triangular. The drive current for the rectangular device has been reduced by 25% when using the multi-subband EPN model and even more reduced for the triangular shape, by 44%, at VD = 0.7 V.
{"title":"Multi-subband interface roughness scattering using 2D finite element schodinger equation for monte carlo simulations of multi-gate transistors","authors":"D. Nagy, M. Elmessary, M. Aldegunde, J. Lindberg, A. García-Loureiro, K. Kalna","doi":"10.1109/IWCE.2015.7301977","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301977","url":null,"abstract":"Interface roughness scattering (IRS) is one of the key limiting scattering mechanism for both planar and non-planar CMOS devices. To predict the performance of future scaled devices and new structures the quantum mechanical confinement based IRS models are essential. In this work, the in-house 3D finite element Monte Carlo code with 2D Schrodinger equation based quantum correction serves as a base for implementation of a new multi-subband extended Prange & Nee (EPN) IRS model and for comparison with the previously used 3D Ando model. The transistors selected for the comparison are 10.7 nm gate length SOI Si FinFETs with two cross-sections: rectangular and triangular. The drive current for the rectangular device has been reduced by 25% when using the multi-subband EPN model and even more reduced for the triangular shape, by 44%, at VD = 0.7 V.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122048732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301949
E. Colomés, D. Marian, X. Oriols
In this work, quantum noise is reformulated taking into account the finite size of (normalizable) wave functions associated to electrons. We consider two-particle scattering with tunneling and exchange. This reformulation provides a richer phenomenology compared to timeindependent approaches, such as the Landauer-Buttiker formalism. It is proved that, depending on the scenario, the noise associated to identical electrons may behave as the one for distinguishable particles. In addition, it is showed that new contributions to the quantum noise appear.
{"title":"Reformulation of quantum noise: when indistinguishable becomes distinguishable?","authors":"E. Colomés, D. Marian, X. Oriols","doi":"10.1109/IWCE.2015.7301949","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301949","url":null,"abstract":"In this work, quantum noise is reformulated taking into account the finite size of (normalizable) wave functions associated to electrons. We consider two-particle scattering with tunneling and exchange. This reformulation provides a richer phenomenology compared to timeindependent approaches, such as the Landauer-Buttiker formalism. It is proved that, depending on the scenario, the noise associated to identical electrons may behave as the one for distinguishable particles. In addition, it is showed that new contributions to the quantum noise appear.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134548831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301952
V. Nguyen, J. Saint-Martin, P. Dollfus, Huy V. Nguyen
The effects of uniaxial strain on the electronic and transport properties of twisted graphene bilayer structures are investigated by means of atomistic simulation. It is shown that the strain-induced modulation of band structure makes it possible to break the degeneracy and to modulate the position van Hove singularities. It is even possible to observe low-energy saddle points for a large range of twist angles. It is shown also that the strain-induced separation of Dirac points of the two lattices may generate a finite transport gap as large as a few hundreds of meV for a small strain of a few percent.
{"title":"Strain effects on the electronic properties of devices made of twisted graphene layers","authors":"V. Nguyen, J. Saint-Martin, P. Dollfus, Huy V. Nguyen","doi":"10.1109/IWCE.2015.7301952","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301952","url":null,"abstract":"The effects of uniaxial strain on the electronic and transport properties of twisted graphene bilayer structures are investigated by means of atomistic simulation. It is shown that the strain-induced modulation of band structure makes it possible to break the degeneracy and to modulate the position van Hove singularities. It is even possible to observe low-energy saddle points for a large range of twist angles. It is shown also that the strain-induced separation of Dirac points of the two lattices may generate a finite transport gap as large as a few hundreds of meV for a small strain of a few percent.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"03 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129103990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301981
T. Sadi, Liping Wang, L. Gerrer, V. Georgiev, A. Asenov
We apply a unique three-dimensional (3D) physics-based atomistic simulator to study silicon-rich (SiOx, x<;2) resistive switching nonvolatile memory (RRAM) devices. We couple self-consistently a simulation of ion and electron transport to the `atomistic' simulator GARAND and a self-heating model to explore the switching processes in these structures. The simulation model is more advanced than other available phenomenological models based on the resistor breaker network. The simulator is calibrated with experimental data, and reconstructs accurately the formation and rupture of the conductive filament in the 3D space. We demonstrate how the simulator is useful for exploring the little-known physics of these promising devices, and show that switching is an intrinsic property of the SiOx layer. In general, the simulation framework is useful for providing efficient designs, in terms of performance, variability and reliability, for memory devices and circuits. The simulator validity is not limited to SiOx-based devices, and can be used to study other promising RRAM systems based, e.g., on transition metal oxides.
{"title":"Self-consistent physical modeling of SiOx-based RRAM structures","authors":"T. Sadi, Liping Wang, L. Gerrer, V. Georgiev, A. Asenov","doi":"10.1109/IWCE.2015.7301981","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301981","url":null,"abstract":"We apply a unique three-dimensional (3D) physics-based atomistic simulator to study silicon-rich (SiOx, x<;2) resistive switching nonvolatile memory (RRAM) devices. We couple self-consistently a simulation of ion and electron transport to the `atomistic' simulator GARAND and a self-heating model to explore the switching processes in these structures. The simulation model is more advanced than other available phenomenological models based on the resistor breaker network. The simulator is calibrated with experimental data, and reconstructs accurately the formation and rupture of the conductive filament in the 3D space. We demonstrate how the simulator is useful for exploring the little-known physics of these promising devices, and show that switching is an intrinsic property of the SiOx layer. In general, the simulation framework is useful for providing efficient designs, in terms of performance, variability and reliability, for memory devices and circuits. The simulator validity is not limited to SiOx-based devices, and can be used to study other promising RRAM systems based, e.g., on transition metal oxides.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130218672","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301976
Souvik Mukherjee, S. Farid, M. Stroscio, M. Dutta
There are mainly three different types of losses that accounts for the decrease in the efficiency of polycrystalline CdTe solar cells namely: (1) optical losses resulting from the interface reflections and absorption from the window and buffer layers in superstrate configuration; (2) recombination losses due to the interface between adjacent layers and also at grain boundaries; and (3) electrical losses due to the device series and shunt resistances. Over the years researchers have mostly studied the nature of the optical and electrical losses in single crystalline cells and have put forward various theoretical models to accurately explain their effect on various performance parameters. However the problem gets much complicated for polycrystalline materials as grain size effects can significantly affect these performance parameters such as short circuit current, open circuit voltage and fill factor. In this work we have studied these polycrystalline effects in depth and have presented a comparative analysis using minority carrier lifetime based model to accurately formulate micron scale grain size effects in CdTe based solar cells.
{"title":"Modeling polycrystalline effects on the device characteristics of cdte based solar cells","authors":"Souvik Mukherjee, S. Farid, M. Stroscio, M. Dutta","doi":"10.1109/IWCE.2015.7301976","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301976","url":null,"abstract":"There are mainly three different types of losses that accounts for the decrease in the efficiency of polycrystalline CdTe solar cells namely: (1) optical losses resulting from the interface reflections and absorption from the window and buffer layers in superstrate configuration; (2) recombination losses due to the interface between adjacent layers and also at grain boundaries; and (3) electrical losses due to the device series and shunt resistances. Over the years researchers have mostly studied the nature of the optical and electrical losses in single crystalline cells and have put forward various theoretical models to accurately explain their effect on various performance parameters. However the problem gets much complicated for polycrystalline materials as grain size effects can significantly affect these performance parameters such as short circuit current, open circuit voltage and fill factor. In this work we have studied these polycrystalline effects in depth and have presented a comparative analysis using minority carrier lifetime based model to accurately formulate micron scale grain size effects in CdTe based solar cells.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134450866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301943
M. S. Choi, X. Meshik, M. Dutta, M. Stroscio
In this paper, the calculation of the strength of the electrostatic field produced by ZnO quantum dots due to the spontaneous polarization in a physiological electrolyte and its application on retinal horizontal cells are presented.
本文介绍了ZnO量子点在生理电解质中自发极化产生的静电场强度的计算及其在视网膜水平细胞上的应用。
{"title":"Screening effect on electric field produced by spontaneous polarization in ZnO quantum dot in electrolyte","authors":"M. S. Choi, X. Meshik, M. Dutta, M. Stroscio","doi":"10.1109/IWCE.2015.7301943","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301943","url":null,"abstract":"In this paper, the calculation of the strength of the electrostatic field produced by ZnO quantum dots due to the spontaneous polarization in a physiological electrolyte and its application on retinal horizontal cells are presented.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124867065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-10-26DOI: 10.1109/IWCE.2015.7301957
Jingtian Fang, W. Vandenberghe, M. Fischetti
After performing one-dimensional simulation of electron transport in narrow quantum wires without gate control in (Fang et al., 2014) and (Fu and Fischetti, 2013) using the open boundary-conditions full-band plane-wave transport formalism derived in (Fu, 2013), we now extend the work to simulate three-dimensionally field-effect transistors (FETs) with a gate bias applied and obtain their transport characteristics. We optimize multiple procedures for solving the quantum transport equation (QTE), such as using a selected eigenvalue solver, the fast Fourier transform (FFT), block assignment of matrices, a sparse matrix solver, and parallel computing techniques. With an expanded computing capability, we are able to simulate the transistors in the sub- 1 nm technology node as suggested by the ITRS, which features 5 nm physical gate length, 2 nm body thick6ness, 0.4 nm effective oxide thickness (EOT), 0.6 V power supply voltage, and a multi-gate structure. Here we simulate an armchair graphene nanoribbon (aGNR) FET using a gateall- around architecture and obtain its transport properties. We will discuss the numerics concerning the matrix size of the transport equation, memory consumption, and simulation time.
在(Fang et al.， 2014)和(Fu and Fischetti, 2013)中使用(Fu, 2013)中导出的开放边界条件全带平面波输运形式对没有栅极控制的窄量子线中的电子输运进行一维模拟后，我们现在将工作扩展到模拟应用栅极偏置的三维场效应晶体管(fet)并获得其输运特性。我们优化了求解量子输运方程(QTE)的多个过程，例如使用选择的特征值求解器、快速傅立叶变换(FFT)、矩阵的块分配、稀疏矩阵求解器和并行计算技术。利用扩展的计算能力，我们能够模拟ITRS建议的亚1nm技术节点上的晶体管，其物理栅极长度为5nm，体厚为2nm，有效氧化物厚度(EOT)为0.4 nm，供电电压为0.6 V，采用多栅极结构。本文采用门环结构模拟了扶手椅型石墨烯纳米带场效应管，并获得了其输运特性。我们将讨论有关传输方程的矩阵大小、内存消耗和模拟时间的数值。
{"title":"Progress on quantum transport simulation using empirical pseudopotentials","authors":"Jingtian Fang, W. Vandenberghe, M. Fischetti","doi":"10.1109/IWCE.2015.7301957","DOIUrl":"https://doi.org/10.1109/IWCE.2015.7301957","url":null,"abstract":"After performing one-dimensional simulation of electron transport in narrow quantum wires without gate control in (Fang et al., 2014) and (Fu and Fischetti, 2013) using the open boundary-conditions full-band plane-wave transport formalism derived in (Fu, 2013), we now extend the work to simulate three-dimensionally field-effect transistors (FETs) with a gate bias applied and obtain their transport characteristics. We optimize multiple procedures for solving the quantum transport equation (QTE), such as using a selected eigenvalue solver, the fast Fourier transform (FFT), block assignment of matrices, a sparse matrix solver, and parallel computing techniques. With an expanded computing capability, we are able to simulate the transistors in the sub- 1 nm technology node as suggested by the ITRS, which features 5 nm physical gate length, 2 nm body thick6ness, 0.4 nm effective oxide thickness (EOT), 0.6 V power supply voltage, and a multi-gate structure. Here we simulate an armchair graphene nanoribbon (aGNR) FET using a gateall- around architecture and obtain its transport properties. We will discuss the numerics concerning the matrix size of the transport equation, memory consumption, and simulation time.","PeriodicalId":165023,"journal":{"name":"2015 International Workshop on Computational Electronics (IWCE)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116380183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：