Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232588
J. Yan, Xuesen Liu, Mike Liu, YiLing Liu
This paper discusses combining Focused Ion Beam (FIB) circuit edit with OBIRH technology. FIB can cut or rewire an integrated circuit. OBIRCH can locate failure location. If FIB circuit edit & OBIRCH were applied at the same time, we can locate the failure site and find the root cause of the failure. The paper will share one case of failure analysis and present advanced FIB technology.
{"title":"A study of combining FIB circuit edit and OBIRCH technology for failure analysis","authors":"J. Yan, Xuesen Liu, Mike Liu, YiLing Liu","doi":"10.1109/IPFA.2009.5232588","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232588","url":null,"abstract":"This paper discusses combining Focused Ion Beam (FIB) circuit edit with OBIRH technology. FIB can cut or rewire an integrated circuit. OBIRCH can locate failure location. If FIB circuit edit & OBIRCH were applied at the same time, we can locate the failure site and find the root cause of the failure. The paper will share one case of failure analysis and present advanced FIB technology.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114839092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232726
G. P. Zhang, M. Wang, B. Zhang
A testing system for evaluation of failure behavior of gold interconnects subjected to alternating current was established. Thermal fatigue in gold lines has been investigated by using alternating currents to generate cyclic temperatures and thermal strains. It is found that the lifetime versus thermal cyclic strain range (Δε) for the 2 µm-wide Au interconnect follows the conventional Coffin-Manson relationship when Δε ≤ 0.47%, while when Δε ≫ 0.47%, the damage behavior of the Au lines is dominated by excessive Joule heating
{"title":"Failure analysis of 200 nm-thick gold interconnects induced by alternating current","authors":"G. P. Zhang, M. Wang, B. Zhang","doi":"10.1109/IPFA.2009.5232726","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232726","url":null,"abstract":"A testing system for evaluation of failure behavior of gold interconnects subjected to alternating current was established. Thermal fatigue in gold lines has been investigated by using alternating currents to generate cyclic temperatures and thermal strains. It is found that the lifetime versus thermal cyclic strain range (Δε) for the 2 µm-wide Au interconnect follows the conventional Coffin-Manson relationship when Δε ≤ 0.47%, while when Δε ≫ 0.47%, the damage behavior of the Au lines is dominated by excessive Joule heating","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128134864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232590
Bin Zhang, Rong Su, S. Feng, Guangchen Zhang, Chunsheng Guo, Yin Liu, Kaikai Ding
The thermal analysis of ICs has been studied in different methods for years. In this paper, a new method to analyze the steady-state temperature distribution of integrated circuit is presented. According to equivalent thermal resistance formula obtaining by an aid tool ANSYS and programming idea, the temperature distribution graph of an analog integrated circuit is obtained. And the result is verified by a complete ANSYS analysis.
{"title":"Thermal analysis of ICS based on equivalent thermal resistance and skill language","authors":"Bin Zhang, Rong Su, S. Feng, Guangchen Zhang, Chunsheng Guo, Yin Liu, Kaikai Ding","doi":"10.1109/IPFA.2009.5232590","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232590","url":null,"abstract":"The thermal analysis of ICs has been studied in different methods for years. In this paper, a new method to analyze the steady-state temperature distribution of integrated circuit is presented. According to equivalent thermal resistance formula obtaining by an aid tool ANSYS and programming idea, the temperature distribution graph of an analog integrated circuit is obtained. And the result is verified by a complete ANSYS analysis.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125784939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The impact ionization that occurred near channel-S/D junctions is responsible for the dynamic bias temperature instability (BTI) of p-channel poly-Si thin-film transistors (TFTs). Impact ionization is induced by lateral electric field when gate voltage switches from inversion or full-depletion to accumulation bias. Drain current increases initially due to shortened effective channel length. As the stress time increases, the grain barrier height increases to reduce the drain current, especially at high temperature. In addition to the transient switches, the plateau portions of the gate pulse have significant impact on the device degradation for large stress amplitudes.
{"title":"Dynamic bias temperature instability of p-channel polycrystalline silicon thin-film transistors","authors":"Ching-Fang Huang, Hung-Chang Sun, P. Kuo, Yen‐Ting Chen, Cheewee Liu, Yuan-Jun Hsu, Jim-Shone Chen","doi":"10.1109/IPFA.2009.5232678","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232678","url":null,"abstract":"The impact ionization that occurred near channel-S/D junctions is responsible for the dynamic bias temperature instability (BTI) of p-channel poly-Si thin-film transistors (TFTs). Impact ionization is induced by lateral electric field when gate voltage switches from inversion or full-depletion to accumulation bias. Drain current increases initially due to shortened effective channel length. As the stress time increases, the grain barrier height increases to reduce the drain current, especially at high temperature. In addition to the transient switches, the plateau portions of the gate pulse have significant impact on the device degradation for large stress amplitudes.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131583316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232663
L. Xiaoqing, Lam Tim Fai
The wetting behavior of Sn-Ag-Cu solder ball on nickel pad has been studied. SEM and EDX were employed to analyze the solder joint interfacial microstructure. Three zone-reactive wetting ring structure was found at the interface. To further study this kind of structures, Solder ball attachment (SBA) and Surface Mount Technology (SMT) were performed to prepare more samples. Experimental results show that the reactive wetting ring is a characteristic of wetting behavior of Sn-Ag-Cu solder ball on Ni or Cu Pad. It forms in ball attach reflow and sometimes can remain after SMT. A model was proposed to illustrate the three zone structure. Effects of the reactive wetting ring on the joint adhesion quality are discussed in this paper.
{"title":"Three zone-reactive wetting ring structure at interface between lead-free Sn-Ag-Cu solder and Ni pad","authors":"L. Xiaoqing, Lam Tim Fai","doi":"10.1109/IPFA.2009.5232663","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232663","url":null,"abstract":"The wetting behavior of Sn-Ag-Cu solder ball on nickel pad has been studied. SEM and EDX were employed to analyze the solder joint interfacial microstructure. Three zone-reactive wetting ring structure was found at the interface. To further study this kind of structures, Solder ball attachment (SBA) and Surface Mount Technology (SMT) were performed to prepare more samples. Experimental results show that the reactive wetting ring is a characteristic of wetting behavior of Sn-Ag-Cu solder ball on Ni or Cu Pad. It forms in ball attach reflow and sometimes can remain after SMT. A model was proposed to illustrate the three zone structure. Effects of the reactive wetting ring on the joint adhesion quality are discussed in this paper.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130780908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232677
X. Li, C. Tung, K. Pey
How can a metal-oxide-semiconductor (MOS) transistor suffer from multiple dielectric breakdowns (BD) with severe structural damages (e.g., local melting and metal migration) remain functional? Our results show that the amorphization of Si in the vicinity of the BD forms an effective p-n diode which prevents terminal short from happening when reverse-biased.
{"title":"Can a MOSFET survive from multiple breakdowns?","authors":"X. Li, C. Tung, K. Pey","doi":"10.1109/IPFA.2009.5232677","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232677","url":null,"abstract":"How can a metal-oxide-semiconductor (MOS) transistor suffer from multiple dielectric breakdowns (BD) with severe structural damages (e.g., local melting and metal migration) remain functional? Our results show that the amorphization of Si in the vicinity of the BD forms an effective p-n diode which prevents terminal short from happening when reverse-biased.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133016668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232602
Hiroyoshi Suzuki, K. Koshikawa, Takahiko Kuroda, Toshimichi Ishizuka, Fan Pin Gyue, Fang Pei Yuan, Wang Jia Ji
We have developed a 30x IR sensitive lens for thermal microscopy making it possible to observe thermal images under high magnification beyond 100x in combination with a solid immersion lens. And we could find that it possible to observe thermal images with high magnification beyond 100x and high resolution as less than 1 µm line and space
{"title":"Improvement of performance for higher magnification thermal imaging","authors":"Hiroyoshi Suzuki, K. Koshikawa, Takahiko Kuroda, Toshimichi Ishizuka, Fan Pin Gyue, Fang Pei Yuan, Wang Jia Ji","doi":"10.1109/IPFA.2009.5232602","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232602","url":null,"abstract":"We have developed a 30x IR sensitive lens for thermal microscopy making it possible to observe thermal images under high magnification beyond 100x in combination with a solid immersion lens. And we could find that it possible to observe thermal images with high magnification beyond 100x and high resolution as less than 1 µm line and space","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133305980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232642
L. Guoguang, Huang Yun, En Yunfei, Yang Shaohua, Lei Zhifeng
Package is a key factor, and affects the reliability of LED. In this paper, the main failure modes and mechanisms that caused by poor package process were investigated through some failure analysis cases, and some improving methods to improve the LED's reliability are put forward.
{"title":"The relationship between LED package and reliability","authors":"L. Guoguang, Huang Yun, En Yunfei, Yang Shaohua, Lei Zhifeng","doi":"10.1109/IPFA.2009.5232642","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232642","url":null,"abstract":"Package is a key factor, and affects the reliability of LED. In this paper, the main failure modes and mechanisms that caused by poor package process were investigated through some failure analysis cases, and some improving methods to improve the LED's reliability are put forward.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131676119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232656
Yinchao Chen, Shuhui Yang, Liguo Sun, K. Sun
In this paper, we target to investigate the crosstalk between two adjacent traces by studying the effects of their spacing and orientation. It is found that the trace routing is a critical way to reduce the crosstalk between two traces designed in high-density integrated circuits. Simulation results show that two vertical traces result in the smallest crosstalk and that the crosstalk signals are insensitive to the spacing increment between two parallel traces in the range investigated.
{"title":"Trace routing effects on crosstalk signals in high-density integrated circuits","authors":"Yinchao Chen, Shuhui Yang, Liguo Sun, K. Sun","doi":"10.1109/IPFA.2009.5232656","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232656","url":null,"abstract":"In this paper, we target to investigate the crosstalk between two adjacent traces by studying the effects of their spacing and orientation. It is found that the trace routing is a critical way to reduce the crosstalk between two traces designed in high-density integrated circuits. Simulation results show that two vertical traces result in the smallest crosstalk and that the crosstalk signals are insensitive to the spacing increment between two parallel traces in the range investigated.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115638629","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-06DOI: 10.1109/IPFA.2009.5232735
Yi-Lung Cheng, B. Wei, Yi-Lung Wang
In this paper, we attempt to combine short length and via number effects to study the impact on the electromigration (EM) characteristics of dual damascene Cu lines. The results revealed interesting differences in electromigration behaviours of long and short length Cu lines. Increasing via number resulted in a higher electromigration failure time, but is related to the line length. For multiple-via structures with short Cu length, electromigration lifetime was significantly enhanced due to obvious back-stress effect and single failure mechanism of line depletion. These observed effects are specific to Cu dual-damascene structures and can have great technological implications for electromigration assessment.
{"title":"Electromigration characteristics of copper dual damascene interconnects - line length and via number dependence","authors":"Yi-Lung Cheng, B. Wei, Yi-Lung Wang","doi":"10.1109/IPFA.2009.5232735","DOIUrl":"https://doi.org/10.1109/IPFA.2009.5232735","url":null,"abstract":"In this paper, we attempt to combine short length and via number effects to study the impact on the electromigration (EM) characteristics of dual damascene Cu lines. The results revealed interesting differences in electromigration behaviours of long and short length Cu lines. Increasing via number resulted in a higher electromigration failure time, but is related to the line length. For multiple-via structures with short Cu length, electromigration lifetime was significantly enhanced due to obvious back-stress effect and single failure mechanism of line depletion. These observed effects are specific to Cu dual-damascene structures and can have great technological implications for electromigration assessment.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124145004","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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