Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514577
I. Nakanishi, T. Yamamoto, Y. Fukui
In the IA and HA algorithms, the convergence factors are updated every iteration, producing an increase in the number of operations. We propose a new composite-adaptive algorithm in which the IA and HA algorithms are complementarily used for a reduction in the number of operations. In particular, we apply the thinned-out method to the IA algorithm in which the convergence factors are updated only once a block. The results of the computer simulations for system identification show that the proposed algorithm works successfully.
{"title":"A new composite-adaptive algorithm with reduced computational complexity","authors":"I. Nakanishi, T. Yamamoto, Y. Fukui","doi":"10.1109/APCCAS.1994.514577","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514577","url":null,"abstract":"In the IA and HA algorithms, the convergence factors are updated every iteration, producing an increase in the number of operations. We propose a new composite-adaptive algorithm in which the IA and HA algorithms are complementarily used for a reduction in the number of operations. In particular, we apply the thinned-out method to the IA algorithm in which the convergence factors are updated only once a block. The results of the computer simulations for system identification show that the proposed algorithm works successfully.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129396562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514574
Horng-Dar Lin
Trellis codes and rate-k/n convolutional codes are often used in wired communications, terrestrial radio and satellite radio links for bandwidth efficiency. To further increase data rates and coding gain, higher rate codes with more states can be used. Cost effectiveness of decoders for these complex rate-k/n and trellis codes becomes a major issue. While cost effective decoder architectures for rate-k/n convolutional codes and high speed decoder architectures are well know, current low-cost decoders for rate-k/n convolutional and trellis codes still resort to suboptimal decoding algorithms. This paper describes a new way to design cost-effective Viterbi decoders for complex rate-k/n convolutional and trellis codes through a co-design of state-processor mapping, topology scaling, scheduling, metric reordering, and VLSI structures of processing elements. Also proposed is a new processing element which has 1/(2/sup k/-1) of the complexity of a conventional processing element.
{"title":"Cost-effective ML trellis decoder for video distribution and high speed communication links","authors":"Horng-Dar Lin","doi":"10.1109/APCCAS.1994.514574","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514574","url":null,"abstract":"Trellis codes and rate-k/n convolutional codes are often used in wired communications, terrestrial radio and satellite radio links for bandwidth efficiency. To further increase data rates and coding gain, higher rate codes with more states can be used. Cost effectiveness of decoders for these complex rate-k/n and trellis codes becomes a major issue. While cost effective decoder architectures for rate-k/n convolutional codes and high speed decoder architectures are well know, current low-cost decoders for rate-k/n convolutional and trellis codes still resort to suboptimal decoding algorithms. This paper describes a new way to design cost-effective Viterbi decoders for complex rate-k/n convolutional and trellis codes through a co-design of state-processor mapping, topology scaling, scheduling, metric reordering, and VLSI structures of processing elements. Also proposed is a new processing element which has 1/(2/sup k/-1) of the complexity of a conventional processing element.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116636767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514515
Yisheng Li, Y. Miyanaga, K. Tochinai
In this report, a module structured recurrent neural network whose size is adaptively determined in a learning process is proposed. The network has the ability to memorize and regenerate any waveforms. In particular, this report shows any periodical waveforms can be approximated by using the minimum number of elementary modules. This network is constructed by adaptive oscillating modules. The adaptive oscillating module consists of two simple neuron nodes. Each node effects the other and itself for oscillating and all weights on connections are adaptively learned. The learning algorithm is based on the modified BP method. The learning of the total network is based on a different criterion called a constructive learning algorithm. In this algorithm, each module can independently learn with suitable speed for given input data. Some simulation examples are demonstrated to check the effectiveness of the proposed network structure and the learning algorithm.
{"title":"A module structured recurrent neural network capable of memorizing and regenerating dynamics","authors":"Yisheng Li, Y. Miyanaga, K. Tochinai","doi":"10.1109/APCCAS.1994.514515","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514515","url":null,"abstract":"In this report, a module structured recurrent neural network whose size is adaptively determined in a learning process is proposed. The network has the ability to memorize and regenerate any waveforms. In particular, this report shows any periodical waveforms can be approximated by using the minimum number of elementary modules. This network is constructed by adaptive oscillating modules. The adaptive oscillating module consists of two simple neuron nodes. Each node effects the other and itself for oscillating and all weights on connections are adaptively learned. The learning algorithm is based on the modified BP method. The learning of the total network is based on a different criterion called a constructive learning algorithm. In this algorithm, each module can independently learn with suitable speed for given input data. Some simulation examples are demonstrated to check the effectiveness of the proposed network structure and the learning algorithm.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"679 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121994294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
An adaptive algorithm for detecting a single sinusoid of unknown frequency corrupted by Gaussian noise has been proposed by Nishimura et al. using IIR bandpass filter with a variable center frequency/sup [1]/. The filter has the parallel block structure for fast processing. However, the algorithm has two problems: one is that it has several input frequencies making it impossible to converge; another is that the convergence rate cannot be higher than that of the scalar structure. In this paper, the causes of these problems are investigated and a new algorithm is proposed to solve these problems. Simulation results are given to illustrate the performance of the proposed algorithm.
{"title":"An implementation of high-speed adaptive noise canceller with parallel block structure","authors":"Chawalit Benjangkaprasert, Katsumi Kikuchi, Sobuaki Takahashi, Tsuyoshi Takehe","doi":"10.1109/APCCAS.1994.514579","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514579","url":null,"abstract":"An adaptive algorithm for detecting a single sinusoid of unknown frequency corrupted by Gaussian noise has been proposed by Nishimura et al. using IIR bandpass filter with a variable center frequency/sup [1]/. The filter has the parallel block structure for fast processing. However, the algorithm has two problems: one is that it has several input frequencies making it impossible to converge; another is that the convergence rate cannot be higher than that of the scalar structure. In this paper, the causes of these problems are investigated and a new algorithm is proposed to solve these problems. Simulation results are given to illustrate the performance of the proposed algorithm.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125215269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514512
S. Kato
Summary form only given, as follows. Portability of services is one of the key elements of personal communications since it will enable us to communicate with everyone, anytime and anywhere. Mobile communications are reviewed in conjunction with radio and network technologies. The most important and often overlooked condition-customer requirements-is discussed by comparing the cordless phone and cellular phone approaches toward personal communications systems (PCS). A perspective view of PCS through PHS field tests in Japan is given with survey data on acceptable tariff and what customers really want. An example of portable terminal development is described to meet these customers requirements: high quality voice transmission, longer talk time, small and light weight through 1-chip LSIC implementation.
{"title":"Technologies for personal communications","authors":"S. Kato","doi":"10.1109/APCCAS.1994.514512","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514512","url":null,"abstract":"Summary form only given, as follows. Portability of services is one of the key elements of personal communications since it will enable us to communicate with everyone, anytime and anywhere. Mobile communications are reviewed in conjunction with radio and network technologies. The most important and often overlooked condition-customer requirements-is discussed by comparing the cordless phone and cellular phone approaches toward personal communications systems (PCS). A perspective view of PCS through PHS field tests in Japan is given with survey data on acceptable tariff and what customers really want. An example of portable terminal development is described to meet these customers requirements: high quality voice transmission, longer talk time, small and light weight through 1-chip LSIC implementation.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124800957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514524
M. Hwang, J. Wey, Wei-Pang Yang
We propose a new service for digital mobile communication systems which enables two or more users to hold a secure conference. Two requirements must be considered: privacy and authentication. Privacy is to ensure that an eavesdropper cannot intercept conversations. Authentication ensures that the service is not obtained fraudulently in order to avoid charge for usage. We present a new conference key distribution scheme for digital mobile communication systems. In the scheme, a group of users can generate a common secret key over the public channel to hold a secure conference.
{"title":"A new service for digital mobile communications","authors":"M. Hwang, J. Wey, Wei-Pang Yang","doi":"10.1109/APCCAS.1994.514524","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514524","url":null,"abstract":"We propose a new service for digital mobile communication systems which enables two or more users to hold a secure conference. Two requirements must be considered: privacy and authentication. Privacy is to ensure that an eavesdropper cannot intercept conversations. Authentication ensures that the service is not obtained fraudulently in order to avoid charge for usage. We present a new conference key distribution scheme for digital mobile communication systems. In the scheme, a group of users can generate a common secret key over the public channel to hold a secure conference.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130285511","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514572
Wen-Kuang Su, Yih-Rong Chen, D. Lin
Echo cancellation is common in full-duplex data transmission over pair-wire telephone lines. A well-designed hybrid circuit can lessen the echo canceller's burden as well as reduce the A/D converter's complexity in a digital implementation. We formulate the task of hybrid design as an optimization problem where the objective function is a weighted average of post-cancellation echo power, echo canceller complexity, and A/D converter complexity. In contrast, prior work in this area appears to have not considered the effect of echo cancellation in problem formulation. We discuss proper forms for the objective function and employ one of them in a numerical study. The chosen objective function is a weighted sum-squares value of the transhybrid echo impulse response. We consider several simple balance network topologies for the hybrid. These networks range from a simple resistor to a fourth-order RLC circuit. The numerical results obtained show that there is significant advantage in using optimized higher-order balance networks, as compared to suboptimal balance networks or simple resistor balance, in terms of both echo cancellation efficiency and hardware complexity. Some topics for further study are indicated.
{"title":"Optimization of hybrid circuits for echo cancellation in high-rate digital subscriber line transmission","authors":"Wen-Kuang Su, Yih-Rong Chen, D. Lin","doi":"10.1109/APCCAS.1994.514572","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514572","url":null,"abstract":"Echo cancellation is common in full-duplex data transmission over pair-wire telephone lines. A well-designed hybrid circuit can lessen the echo canceller's burden as well as reduce the A/D converter's complexity in a digital implementation. We formulate the task of hybrid design as an optimization problem where the objective function is a weighted average of post-cancellation echo power, echo canceller complexity, and A/D converter complexity. In contrast, prior work in this area appears to have not considered the effect of echo cancellation in problem formulation. We discuss proper forms for the objective function and employ one of them in a numerical study. The chosen objective function is a weighted sum-squares value of the transhybrid echo impulse response. We consider several simple balance network topologies for the hybrid. These networks range from a simple resistor to a fourth-order RLC circuit. The numerical results obtained show that there is significant advantage in using optimized higher-order balance networks, as compared to suboptimal balance networks or simple resistor balance, in terms of both echo cancellation efficiency and hardware complexity. Some topics for further study are indicated.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117263597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514583
Jau-Hung Chen, Chung-Hsien Wu, Jhing-Fa Wang
A two-level method is proposed in this study for rapidly and accurately computing the line spectrum pair (LSP) frequencies. An efficient decimation-in-degree (DID) algorithm is also proposed in the first level which can transform any symmetric or antisymmetric polynomial with real coefficients into the other polynomials with lower degrees and without any transcendental functions. The DID algorithm not only can avoid prior storage or large calculation of transcendental functions but can also be easily applied towards those fast root-finding methods. In the second level, the Newton-Raphson method is applied. The process of the Newton-Raphson method can be accelerated by adopting a deflation scheme along with the interlacing property of LSP frequencies for selecting the better initial values. A few conventional numerical methods are also implemented to make a comparison with the two-level method. Experimental results indicate that the two-level method is the fastest one.
{"title":"A two-level method using a decimation-in-degree algorithm for the computation of the LSP frequencies","authors":"Jau-Hung Chen, Chung-Hsien Wu, Jhing-Fa Wang","doi":"10.1109/APCCAS.1994.514583","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514583","url":null,"abstract":"A two-level method is proposed in this study for rapidly and accurately computing the line spectrum pair (LSP) frequencies. An efficient decimation-in-degree (DID) algorithm is also proposed in the first level which can transform any symmetric or antisymmetric polynomial with real coefficients into the other polynomials with lower degrees and without any transcendental functions. The DID algorithm not only can avoid prior storage or large calculation of transcendental functions but can also be easily applied towards those fast root-finding methods. In the second level, the Newton-Raphson method is applied. The process of the Newton-Raphson method can be accelerated by adopting a deflation scheme along with the interlacing property of LSP frequencies for selecting the better initial values. A few conventional numerical methods are also implemented to make a comparison with the two-level method. Experimental results indicate that the two-level method is the fastest one.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121446363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514561
B. Courtois
This paper details the history and development of MPC (Multi-Project Chip) Services available in various countries. The CMP French Service is also used to exemplify a few basic principles that should govern the management of such Services. Some of these principles have evolved during the last 10 years, especially when considering University oriented chip fabrication. Also the expected development of different technologies is addressed, to assess which of these technologies should be offered.
{"title":"MPC services available worldwide","authors":"B. Courtois","doi":"10.1109/APCCAS.1994.514561","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514561","url":null,"abstract":"This paper details the history and development of MPC (Multi-Project Chip) Services available in various countries. The CMP French Service is also used to exemplify a few basic principles that should govern the management of such Services. Some of these principles have evolved during the last 10 years, especially when considering University oriented chip fabrication. Also the expected development of different technologies is addressed, to assess which of these technologies should be offered.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"254 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121356206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-05DOI: 10.1109/APCCAS.1994.514619
M. Higashimura, Y. Fukui
This paper proposes the realization of voltage-mode and current-mode transfer functions using current followers (CFs) and voltage followers (VFs). Since the circuits are composed of CFs and VFs, they are suitable for high frequency operation.
{"title":"Realization of transfer functions using current followers and voltage followers","authors":"M. Higashimura, Y. Fukui","doi":"10.1109/APCCAS.1994.514619","DOIUrl":"https://doi.org/10.1109/APCCAS.1994.514619","url":null,"abstract":"This paper proposes the realization of voltage-mode and current-mode transfer functions using current followers (CFs) and voltage followers (VFs). Since the circuits are composed of CFs and VFs, they are suitable for high frequency operation.","PeriodicalId":231368,"journal":{"name":"Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123211872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：