Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870275
M. Ding, Yao-Hong Liu, Yan Zhang, Chuang Lu, P. Zhang, B. Busze, Christian Bachmann, K. Philips
Wireless sensor nodes (WSN) in IoT applications (e.g., Bluetooth Low Energy, BLE) rely on heavily duty-cycling the wireless transceivers to reduce the overall system power consumption [1]. This requires swift start-up behavior of the transceiver. The crystal oscillator (XO) generates a stable reference clock for the PLL to synthesize a carrier and to derive clocks for all other parts of the transceiver SoC, e.g., ADC and the digital baseband. The typical start-up time (Ts) of an XO is relatively long (∼ms) due to a high quality factor of the crystal quartz. This leads to a significant (up to 30%) power overhead for a highly duty-cycled transceiver with a short packet format, e.g., the packet length is as short as 128µs in BLE (Fig. 5.3.1). A reduction of Ts of the XO is necessary, at the same time, the power overhead to enable a fast start-up should be minimized in order to reduce the overall energy consumption (Fig. 5.3.1).
{"title":"5.3 A 95µW 24MHz digitally controlled crystal oscillator for IoT applications with 36nJ start-up energy and >13× start-up time reduction using a fully-autonomous dynamically-adjusted load","authors":"M. Ding, Yao-Hong Liu, Yan Zhang, Chuang Lu, P. Zhang, B. Busze, Christian Bachmann, K. Philips","doi":"10.1109/ISSCC.2017.7870275","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870275","url":null,"abstract":"Wireless sensor nodes (WSN) in IoT applications (e.g., Bluetooth Low Energy, BLE) rely on heavily duty-cycling the wireless transceivers to reduce the overall system power consumption [1]. This requires swift start-up behavior of the transceiver. The crystal oscillator (XO) generates a stable reference clock for the PLL to synthesize a carrier and to derive clocks for all other parts of the transceiver SoC, e.g., ADC and the digital baseband. The typical start-up time (Ts) of an XO is relatively long (∼ms) due to a high quality factor of the crystal quartz. This leads to a significant (up to 30%) power overhead for a highly duty-cycled transceiver with a short packet format, e.g., the packet length is as short as 128µs in BLE (Fig. 5.3.1). A reduction of Ts of the XO is necessary, at the same time, the power overhead to enable a fast start-up should be minimized in order to reduce the overall energy consumption (Fig. 5.3.1).","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129914888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870473
S. Moazeni, Sen Lin, M. Wade, L. Alloatti, Rajeev J Ram, M. Popović, V. Stojanović
Silicon photonics is a rapidly maturing technology, promising to realize low-cost and energy-efficient optical links for rack-to-rack, within-rack datacenter applications, and supercomputer interconnects. Recently, the possibility of implementing ultra-power-efficient silicon photonic links using an unmodified state-of-the-art 45nm SOI CMOS process has been demonstrated [1]. This approach enabled the fabrication of millions of transistors and hundreds of photonic devices in the same chip to improve processor-memory link bandwidth, and opened a path to solving this traditional computation bottleneck.
硅光子学是一项迅速成熟的技术,有望实现低成本和节能的光链路,用于机架到机架、机架内数据中心应用和超级计算机互连。最近,已经证明了使用未经修改的最先进的45nm SOI CMOS工艺实现超节能硅光子链路的可能性[1]。这种方法使得在同一芯片上制造数百万个晶体管和数百个光子器件,从而提高了处理器-存储器链路带宽,为解决这一传统的计算瓶颈开辟了一条道路。
{"title":"29.3 A 40Gb/s PAM-4 transmitter based on a ring-resonator optical DAC in 45nm SOI CMOS","authors":"S. Moazeni, Sen Lin, M. Wade, L. Alloatti, Rajeev J Ram, M. Popović, V. Stojanović","doi":"10.1109/ISSCC.2017.7870473","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870473","url":null,"abstract":"Silicon photonics is a rapidly maturing technology, promising to realize low-cost and energy-efficient optical links for rack-to-rack, within-rack datacenter applications, and supercomputer interconnects. Recently, the possibility of implementing ultra-power-efficient silicon photonic links using an unmodified state-of-the-art 45nm SOI CMOS process has been demonstrated [1]. This approach enabled the fabrication of millions of transistors and hundreds of photonic devices in the same chip to improve processor-memory link bandwidth, and opened a path to solving this traditional computation bottleneck.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128658500","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870418
Mo Huang, Yan Lu, U. Seng-Pan, R. Martins
Wireless power transfer (WPT) is currently on the critical point of an explosive growth. Here, as projected in Fig. 22.4.1, we propose a future WPT eco-system of consumer electronics, which includes three layers: 1) wireless charging pads being the fundamental energy plants that can charge a wireless power bank and mobile devices; 2) wireless power banks that get energy from plants and feed mobile devices; and 3) power hungry mobile devices that get energy from all the other sources. To enable the mobile devices charging others without additional hardware, we propose a reconfigurable bidirectional 6.78MHz WPT transceiver (TRX) that reuses the LC resonant tank and 4 area-consuming power transistors for the differential Class-D power amplifier (PA) and the full-wave rectifier. With such WPT TRX embedded, one can provide a first-aid to his/her smart watch or friend's device of which the battery is dying.
{"title":"22.4 A reconfigurable bidirectional wireless power transceiver with maximum-current charging mode and 58.6% battery-to-battery efficiency","authors":"Mo Huang, Yan Lu, U. Seng-Pan, R. Martins","doi":"10.1109/ISSCC.2017.7870418","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870418","url":null,"abstract":"Wireless power transfer (WPT) is currently on the critical point of an explosive growth. Here, as projected in Fig. 22.4.1, we propose a future WPT eco-system of consumer electronics, which includes three layers: 1) wireless charging pads being the fundamental energy plants that can charge a wireless power bank and mobile devices; 2) wireless power banks that get energy from plants and feed mobile devices; and 3) power hungry mobile devices that get energy from all the other sources. To enable the mobile devices charging others without additional hardware, we propose a reconfigurable bidirectional 6.78MHz WPT transceiver (TRX) that reuses the LC resonant tank and 4 area-consuming power transistors for the differential Class-D power amplifier (PA) and the full-wave rectifier. With such WPT TRX embedded, one can provide a first-aid to his/her smart watch or friend's device of which the battery is dying.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127129933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870460
T. Chang, Max L. Wang, Jayant Charthad, Marcus J. Weber, A. Arbabian
The next generation of implantable medical devices focuses on minimally invasive miniaturized solutions that operate reliably at large depths, provide duplex communication for closed-loop therapies, and enable multi-access for a network of implants to gather information or provide systemic interventions. Using ultrasound (US), power and data can be efficiently transferred through the body as its wavelength at MHz is comparable to a mm-sized receiver, resulting in improved focusing, coupling, and acoustic-to-electrical conversion efficiency. Furthermore, thanks to the low propagation loss (∼1dB/cm/MHz) and 7.2mW/mm2 safety limit, several mW of power is obtainable at the receiver, enabling high-power, complicated functionalities.
{"title":"27.7 A 30.5mm3 fully packaged implantable device with duplex ultrasonic data and power links achieving 95kb/s with <10−4 BER at 8.5cm depth","authors":"T. Chang, Max L. Wang, Jayant Charthad, Marcus J. Weber, A. Arbabian","doi":"10.1109/ISSCC.2017.7870460","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870460","url":null,"abstract":"The next generation of implantable medical devices focuses on minimally invasive miniaturized solutions that operate reliably at large depths, provide duplex communication for closed-loop therapies, and enable multi-access for a network of implants to gather information or provide systemic interventions. Using ultrasound (US), power and data can be efficiently transferred through the body as its wavelength at MHz is comparable to a mm-sized receiver, resulting in improved focusing, coupling, and acoustic-to-electrical conversion efficiency. Furthermore, thanks to the low propagation loss (∼1dB/cm/MHz) and 7.2mW/mm2 safety limit, several mW of power is obtainable at the receiver, enabling high-power, complicated functionalities.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127340510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870311
B. Yousefzadeh, K. Makinwa
This paper presents a BJT-based temperature sensor, which can be accurately trimmed in both ceramic and plastic packages, on the basis of purely electrical measurements at room temperature. This is achieved by combining the voltage-calibration technique from [1] with an on-chip heater, which can heat the sensing BJTs from room temperature to ∼85°C in 0.5s. Measurements show that the sensor can then be trimmed to an inaccuracy of ±0.3°C (3σ) over the military range (−55 to +125°C). This is similar to the inaccuracy obtained after conventional temperature calibration, i.e., at well-defined temperatures, but requires much less calibration time and infrastructure.
{"title":"9.3 A BJT-based temperature sensor with a packaging-robust inaccuracy of ±0.3°C (3σ) from −55°C to +125°C after heater-assisted voltage calibration","authors":"B. Yousefzadeh, K. Makinwa","doi":"10.1109/ISSCC.2017.7870311","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870311","url":null,"abstract":"This paper presents a BJT-based temperature sensor, which can be accurately trimmed in both ceramic and plastic packages, on the basis of purely electrical measurements at room temperature. This is achieved by combining the voltage-calibration technique from [1] with an on-chip heater, which can heat the sensing BJTs from room temperature to ∼85°C in 0.5s. Measurements show that the sensor can then be trimmed to an inaccuracy of ±0.3°C (3σ) over the military range (−55 to +125°C). This is similar to the inaccuracy obtained after conventional temperature calibration, i.e., at well-defined temperatures, but requires much less calibration time and infrastructure.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130661843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870437
Wei-Han Yu, Haidong Yi, Pui-in Mak, Jun Yin, R. Martins
For true mobility, wearable electronics should be self-powered by the environment. On-body thermoelectric (∼50µW/cm2) is a maturing energy source but delivers a deeply low and inconstant output voltage (0.05 to 0.3V) hindering its utility. With the limited power efficiency of ultra-low-voltage (ULV) boost converters (64% in [1]), there is a rising interest in developing ULV radios that can operate directly at the energy-harvester output, reducing the waste of energy and active-sleep latency. The 2.4GHz receiver in [2] validates 0.3V operation, but is a non-standard design without I/Q demodulation. Also, its focus is on the active power (1.6mW) assuming its 0.3V supply is constant.
{"title":"24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS","authors":"Wei-Han Yu, Haidong Yi, Pui-in Mak, Jun Yin, R. Martins","doi":"10.1109/ISSCC.2017.7870437","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870437","url":null,"abstract":"For true mobility, wearable electronics should be self-powered by the environment. On-body thermoelectric (∼50µW/cm2) is a maturing energy source but delivers a deeply low and inconstant output voltage (0.05 to 0.3V) hindering its utility. With the limited power efficiency of ultra-low-voltage (ULV) boost converters (64% in [1]), there is a rising interest in developing ULV radios that can operate directly at the energy-harvester output, reducing the waste of energy and active-sleep latency. The 2.4GHz receiver in [2] validates 0.3V operation, but is a non-standard design without I/Q demodulation. Also, its focus is on the active power (1.6mW) assuming its 0.3V supply is constant.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116842431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870407
Minseo Kim, Hyunki Kim, Jaeeun Jang, Jihee Lee, Jaehyuk Lee, Jiwon Lee, Kyungrog Lee, Kwantae Kim, Yongsu Lee, H. Yoo
Electrical impedance tomography (EIT) has been studied to monitor lung ventilation because it is the only real-time lung imaging method without large equipment [1–2]. However, previous EIT systems just provided 2D cross-sectional image with limited spatial information of the lung and unneglectable volume detection error depending on the location of 2D EIT belt relative to the patient's lung. In spite of its importance, the 3D-EIT has not been realized in lung monitoring because it has many design challenges such as noises incurred by complicated wiring, long cable length, wide variation in electrode contact and signal, and large personal-to-person impedance variation. In this paper, we present a portable 3D-EIT SoC for real-time lung ventilation monitoring with following 5 features: 1) The active electrodes (AEs) system to reduce coupling noise, 2) High output impedance current stimulator to inject stable current, 3) Impedance spectroscopy to enable both time-difference (TD) EIT and frequency-difference (FD) EIT, and to select an optimal frequency for TD-EIT, 4) Wide-dynamic range front-end circuit to detect variable ranges of signal with high-input impedance and CMRR, 5) Calibration to reduce the electrical characteristics variations of AEs.
{"title":"21.2 A 1.4mΩ-sensitivity 94dB-dynamic-range electrical impedance tomography SoC and 48-channel Hub SoC for 3D lung ventilation monitoring system","authors":"Minseo Kim, Hyunki Kim, Jaeeun Jang, Jihee Lee, Jaehyuk Lee, Jiwon Lee, Kyungrog Lee, Kwantae Kim, Yongsu Lee, H. Yoo","doi":"10.1109/ISSCC.2017.7870407","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870407","url":null,"abstract":"Electrical impedance tomography (EIT) has been studied to monitor lung ventilation because it is the only real-time lung imaging method without large equipment [1–2]. However, previous EIT systems just provided 2D cross-sectional image with limited spatial information of the lung and unneglectable volume detection error depending on the location of 2D EIT belt relative to the patient's lung. In spite of its importance, the 3D-EIT has not been realized in lung monitoring because it has many design challenges such as noises incurred by complicated wiring, long cable length, wide variation in electrode contact and signal, and large personal-to-person impedance variation. In this paper, we present a portable 3D-EIT SoC for real-time lung ventilation monitoring with following 5 features: 1) The active electrodes (AEs) system to reduce coupling noise, 2) High output impedance current stimulator to inject stable current, 3) Impedance spectroscopy to enable both time-difference (TD) EIT and frequency-difference (FD) EIT, and to select an optimal frequency for TD-EIT, 4) Wide-dynamic range front-end circuit to detect variable ranges of signal with high-input impedance and CMRR, 5) Calibration to reduce the electrical characteristics variations of AEs.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133175460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870331
Chulbum Kim, Ji-Ho Cho, Woopyo Jeong, I. Park, Hyun-wook Park, Doo-Hyun Kim, D. Kang, Sunghoon Lee, Ji-Sang Lee, Wontae Kim, Jiyoon Park, Yang-Lo Ahn, Jiyoung Lee, Jonghoon Lee, Seungbum Kim, Hyun-Jun Yoon, Jaedoeg Yu, Nayoung Choi, Yelim Kwon, Nahyun Kim, Hwajun Jang, Jong-Yeol Park, Seunghwan Song, Yongha Park, Jinbae Bang, Sangki Hong, B. Jeong, Hyun-Jin Kim, Chunan Lee, Young-Sun Min, Inryul Lee, In-Mo Kim, Sung-Hoon Kim, Dongkyu Yoon, KiSeung Kim, Youngdon Choi, Moosung Kim, Hyunggon Kim, Pansuk Kwak, Jeong-Don Ihm, D. Byeon, Jin-Yub Lee, Ki-Tae Park, K. Kyung
The advent of emerging technologies such as cloud computing, big data, the internet of things and mobile computing is producing a tremendous amount of data. In the era of big data, storage devices with versatile characteristics are required for ultra-fast processing, higher capacity storage, lower cost, and lower power operation. SSDs employing 3D NAND are a promising to meet these requirements. Since the introduction of 3D NAND technology to marketplace in 2014 [1], the memory array size has nearly doubled every year [2,3]. To continue scaling 3D NAND array density, it is essential to scale down vertically to minimize total mold height. However, vertical scaling results in critical problems such as increasing WL capacitance and non-uniformity of stacked WLs due to variation in the channel hole diameter. To tackle these issues, this work proposes schemes for programming speed improvement and power reduction, and on-chip processing algorithms for error correction.
{"title":"11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory","authors":"Chulbum Kim, Ji-Ho Cho, Woopyo Jeong, I. Park, Hyun-wook Park, Doo-Hyun Kim, D. Kang, Sunghoon Lee, Ji-Sang Lee, Wontae Kim, Jiyoon Park, Yang-Lo Ahn, Jiyoung Lee, Jonghoon Lee, Seungbum Kim, Hyun-Jun Yoon, Jaedoeg Yu, Nayoung Choi, Yelim Kwon, Nahyun Kim, Hwajun Jang, Jong-Yeol Park, Seunghwan Song, Yongha Park, Jinbae Bang, Sangki Hong, B. Jeong, Hyun-Jin Kim, Chunan Lee, Young-Sun Min, Inryul Lee, In-Mo Kim, Sung-Hoon Kim, Dongkyu Yoon, KiSeung Kim, Youngdon Choi, Moosung Kim, Hyunggon Kim, Pansuk Kwak, Jeong-Don Ihm, D. Byeon, Jin-Yub Lee, Ki-Tae Park, K. Kyung","doi":"10.1109/ISSCC.2017.7870331","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870331","url":null,"abstract":"The advent of emerging technologies such as cloud computing, big data, the internet of things and mobile computing is producing a tremendous amount of data. In the era of big data, storage devices with versatile characteristics are required for ultra-fast processing, higher capacity storage, lower cost, and lower power operation. SSDs employing 3D NAND are a promising to meet these requirements. Since the introduction of 3D NAND technology to marketplace in 2014 [1], the memory array size has nearly doubled every year [2,3]. To continue scaling 3D NAND array density, it is essential to scale down vertically to minimize total mold height. However, vertical scaling results in critical problems such as increasing WL capacitance and non-uniformity of stacked WLs due to variation in the channel hole diameter. To tackle these issues, this work proposes schemes for programming speed improvement and power reduction, and on-chip processing algorithms for error correction.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133183200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870263
Bongki Son, Yunjae Suh, Sungho Kim, Heejae Jung, Jun-Seok Kim, Chang-Woo Shin, Keunju Park, Kyoobin Lee, Jin Man Park, J. Woo, Yohan J. Roh, Hyunku Lee, Y. Wang, I. Ovsiannikov, H. Ryu
We report a VGA dynamic vision sensor (DVS) with a 9µm pixel, developed through a digital as well as an analog implementation. DVS systems in the literature try to increase spatial resolution up to QVGA [1–2] and data rates up to 50 million events per second (Meps) (self-acknowledged) [3], but they are still inadequate for high-performance applications such as gesture recognition, drones, automotive, etc. Moreover, the smallest reported pixel of 18.5µm is too large for economical mass production [3]. This paper reports a 640×480 VGA-resolution DVS system with a 9µm pixel pitch supporting a data rate of 300Meps for sufficient event transfer in spite of higher resolution. Maintaining acceptable pixel performance, the pixel circuitry is carefully designed and optimized using a BSI CIS process. To acquire data (i.e., pixel events) at high speed even with high resolution (e.g., VGA), a fully synthesized word-serial group address-event representation (G-AER) is implemented, which handles massive events in parallel by binding neighboring 8 pixels into a group. In addition, a 10b programmable bias generator dedicated to a DVS system provides easy controllability of pixel biases and event thresholds.
{"title":"4.1 A 640×480 dynamic vision sensor with a 9µm pixel and 300Meps address-event representation","authors":"Bongki Son, Yunjae Suh, Sungho Kim, Heejae Jung, Jun-Seok Kim, Chang-Woo Shin, Keunju Park, Kyoobin Lee, Jin Man Park, J. Woo, Yohan J. Roh, Hyunku Lee, Y. Wang, I. Ovsiannikov, H. Ryu","doi":"10.1109/ISSCC.2017.7870263","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870263","url":null,"abstract":"We report a VGA dynamic vision sensor (DVS) with a 9µm pixel, developed through a digital as well as an analog implementation. DVS systems in the literature try to increase spatial resolution up to QVGA [1–2] and data rates up to 50 million events per second (Meps) (self-acknowledged) [3], but they are still inadequate for high-performance applications such as gesture recognition, drones, automotive, etc. Moreover, the smallest reported pixel of 18.5µm is too large for economical mass production [3]. This paper reports a 640×480 VGA-resolution DVS system with a 9µm pixel pitch supporting a data rate of 300Meps for sufficient event transfer in spite of higher resolution. Maintaining acceptable pixel performance, the pixel circuitry is carefully designed and optimized using a BSI CIS process. To acquire data (i.e., pixel events) at high speed even with high resolution (e.g., VGA), a fully synthesized word-serial group address-event representation (G-AER) is implemented, which handles massive events in parallel by binding neighboring 8 pixels into a group. In addition, a 10b programmable bias generator dedicated to a DVS system provides easy controllability of pixel biases and event thresholds.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127670110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-02-01DOI: 10.1109/ISSCC.2017.7870459
Y. Katsube, Shinya Kajiyama, Takuma Nishimoto, T. Nakagawa, Yasuyuki Okuma, Yohei Nakamura, T. Terada, Yutaka Igarashi, T. Yamawaki, T. Yazaki, Y. Hayashi, Kazuhiro Amino, Takuya Kaneko, Hiroki Tanaka
A diagnostic ultrasound (US) system transmits acoustic waves at several to tens of MHz into the human body for clinical purposes and detects the reflected waves to observe the internal organs without having a medical operation or radiation exposure. The system is composed of a main unit and probe connected via coaxial cables. The probe is very small because medical technicians laboriously grab and manipulate it for a long time. To avoid image obscurity depending on medical technicians, high-speed and high-resolution 3D/4D imaging is necessary. For this reason, several thousands of lead bulk piezoelectric material transducers (TD) need to be squeezed into the small probe. Since the number of cables is limited to several hundreds, the probe needs to include beamforming functionality and a 2D array IC [1–6], which includes thousands of US transceivers.
{"title":"27.6 Single-chip 3072ch 2D array IC with RX analog and all-digital TX beamformer for 3D ultrasound imaging","authors":"Y. Katsube, Shinya Kajiyama, Takuma Nishimoto, T. Nakagawa, Yasuyuki Okuma, Yohei Nakamura, T. Terada, Yutaka Igarashi, T. Yamawaki, T. Yazaki, Y. Hayashi, Kazuhiro Amino, Takuya Kaneko, Hiroki Tanaka","doi":"10.1109/ISSCC.2017.7870459","DOIUrl":"https://doi.org/10.1109/ISSCC.2017.7870459","url":null,"abstract":"A diagnostic ultrasound (US) system transmits acoustic waves at several to tens of MHz into the human body for clinical purposes and detects the reflected waves to observe the internal organs without having a medical operation or radiation exposure. The system is composed of a main unit and probe connected via coaxial cables. The probe is very small because medical technicians laboriously grab and manipulate it for a long time. To avoid image obscurity depending on medical technicians, high-speed and high-resolution 3D/4D imaging is necessary. For this reason, several thousands of lead bulk piezoelectric material transducers (TD) need to be squeezed into the small probe. Since the number of cables is limited to several hundreds, the probe needs to include beamforming functionality and a 2D array IC [1–6], which includes thousands of US transceivers.","PeriodicalId":269679,"journal":{"name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"160 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127670265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}