Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633265
S. Sarkar, P. Sen, B. Perumana, D. Yeh, D. Dawn, S. Pinel, J. Laskar
A 60GHz single-chip CMOS radio has been fully integrated using standard 90nm CMOS process technology. The digitally controlled wideband super-heterodyne architecture combined with a high-speed digital signal processor has been designed to support the whole 57 to 66 GHz bandwidth available, and enable data throughput exceeding 7Gbps QPSK and 15Gbps 16QAM for a total DC power budget below 200mW. The receiver chain provides a total gain of nearly 50dB for a total noise figure below 9dB while the power amplifier delivers +8.4dBm saturated output power at 60GHz. The single-chip radio is digitally controlled via a standard SPI, and scalable to a phased array architecture. This is the highest level of integration for a 60GHz single-chip transceiver reported till date. The design has been optimized for robustness against process variation and temperature, and verified by measurement results.
{"title":"60 GHz single-chip 90nm CMOS radio with integrated signal processor","authors":"S. Sarkar, P. Sen, B. Perumana, D. Yeh, D. Dawn, S. Pinel, J. Laskar","doi":"10.1109/MWSYM.2008.4633265","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633265","url":null,"abstract":"A 60GHz single-chip CMOS radio has been fully integrated using standard 90nm CMOS process technology. The digitally controlled wideband super-heterodyne architecture combined with a high-speed digital signal processor has been designed to support the whole 57 to 66 GHz bandwidth available, and enable data throughput exceeding 7Gbps QPSK and 15Gbps 16QAM for a total DC power budget below 200mW. The receiver chain provides a total gain of nearly 50dB for a total noise figure below 9dB while the power amplifier delivers +8.4dBm saturated output power at 60GHz. The single-chip radio is digitally controlled via a standard SPI, and scalable to a phased array architecture. This is the highest level of integration for a 60GHz single-chip transceiver reported till date. The design has been optimized for robustness against process variation and temperature, and verified by measurement results.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129324422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633188
J. Hacker, M. Urteaga, D. Mensa, R. Pierson, Mike E. B. Jones, Z. Griffith, M. Rodwell
An indium-phosphide (InP) double-heterojunction bipolar transistor (DHBT) based common-base monolithic power amplifier has been fabricated and has a measured small signal gain of 4.8 dB at 324 GHz. This is the highest frequency DHBT MMIC amplifier reported to date. The submillimeter-wave power amplifier MMIC incorporates microstrip transmission lines on a 10-μm thick layer of BCB dielectric. The thick BCB layer provides mode-free low-loss millimeter-wave transmission lines without requiring a thin fragile InP substrate and through-wafer VIAs as with conventional microstrip placed directly on the semiconductor substrate. The single-stage power amplifier has a compact size of only 0.124 mm2 and a measured saturated output power of 1.3 milliWatts with a dc input power of 1.4 V at 12 mA. These results demonstrate the capability of 250nm InP DHBT technology to enable power amplifiers for submillimeter-wave applications.
{"title":"250 nm InP DHBT monolithic amplifiers with 4.8 dB gain at 324 GHz","authors":"J. Hacker, M. Urteaga, D. Mensa, R. Pierson, Mike E. B. Jones, Z. Griffith, M. Rodwell","doi":"10.1109/MWSYM.2008.4633188","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633188","url":null,"abstract":"An indium-phosphide (InP) double-heterojunction bipolar transistor (DHBT) based common-base monolithic power amplifier has been fabricated and has a measured small signal gain of 4.8 dB at 324 GHz. This is the highest frequency DHBT MMIC amplifier reported to date. The submillimeter-wave power amplifier MMIC incorporates microstrip transmission lines on a 10-μm thick layer of BCB dielectric. The thick BCB layer provides mode-free low-loss millimeter-wave transmission lines without requiring a thin fragile InP substrate and through-wafer VIAs as with conventional microstrip placed directly on the semiconductor substrate. The single-stage power amplifier has a compact size of only 0.124 mm2 and a measured saturated output power of 1.3 milliWatts with a dc input power of 1.4 V at 12 mA. These results demonstrate the capability of 250nm InP DHBT technology to enable power amplifiers for submillimeter-wave applications.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130637328","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4632951
N. Buchanan, V. Fusco
A new method for producing phase conjugation is presented. This is the essential component of a retrodirective array. This architecture, for the first time, addresses virtually all of the shortcomings of the previously used mixer approaches to this problem. The requirement for a frequency component at 2x FRF to be present is dispensed with. The architecture here does not require any frequency component higher than FRF, and also exhibits other advantages such as excellent conversion gain, and the re-transmission of a low phase noise high power carrier. Our solution involves the addition of a standard power combiner, used for vector summation, to a standard PLL. By using a novel four quadrant switching method, we can obtain reliable conjugation over a 360° phase range. Our circuit is ideally suited to low cost point to point self steered wireless applications such as video streaming.
{"title":"Quadrant switching PLL phase conjugator for retrodirective antenna applications","authors":"N. Buchanan, V. Fusco","doi":"10.1109/MWSYM.2008.4632951","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4632951","url":null,"abstract":"A new method for producing phase conjugation is presented. This is the essential component of a retrodirective array. This architecture, for the first time, addresses virtually all of the shortcomings of the previously used mixer approaches to this problem. The requirement for a frequency component at 2x FRF to be present is dispensed with. The architecture here does not require any frequency component higher than FRF, and also exhibits other advantages such as excellent conversion gain, and the re-transmission of a low phase noise high power carrier. Our solution involves the addition of a standard power combiner, used for vector summation, to a standard PLL. By using a novel four quadrant switching method, we can obtain reliable conjugation over a 360° phase range. Our circuit is ideally suited to low cost point to point self steered wireless applications such as video streaming.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124519245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633211
I. G. Insua, K. Kojucharow, C. Schaeffer
Advances in broadband radio-over-fiber multigbit/s transmission links are presented. An optical double sideband with suppressed carrier (DSB-SC) spectrum is used to generate a mm-wave signal of outstanding performance. One sideband is modulated with baseband data rates of up to 10 Gbps. Transmission experiments prove this modulation scheme to be dispersion tolerant and error free transmission was demonstrated after 40 km of single mode fiber for data rates up to 5 Gbps. The limits of the setup were tested with data rates of 10 Gbps.
{"title":"MultiGbit/s transmission over a fiber optic mm-wave link","authors":"I. G. Insua, K. Kojucharow, C. Schaeffer","doi":"10.1109/MWSYM.2008.4633211","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633211","url":null,"abstract":"Advances in broadband radio-over-fiber multigbit/s transmission links are presented. An optical double sideband with suppressed carrier (DSB-SC) spectrum is used to generate a mm-wave signal of outstanding performance. One sideband is modulated with baseband data rates of up to 10 Gbps. Transmission experiments prove this modulation scheme to be dispersion tolerant and error free transmission was demonstrated after 40 km of single mode fiber for data rates up to 5 Gbps. The limits of the setup were tested with data rates of 10 Gbps.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124053711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633071
Y. Chow, H.T. Tan, S. Low, M. Mutanizam, T.W. Lee, C.C. Lim, S. Khoo, Y. Y. Liew, W. Kim
We describe for the first time, a miniature GPS front-end module that achieves state-of-the-art gain and filtering in a single package. The module combines a E-mode pHEMT LNA MMIC with FBAR filter chip in a molded chip-on-board plastic package. At 2.7V supply voltage and 5mA current consumption, overall gain achieved is 18dB with 0.82dB noise figure. Filter rejection is better than 76dBc in the 827MHz and 65dBc in the 1.885GHz cellular frequency bands. The module is immune to interfering signals up to −3.7dBm at the above frequencies, more than adequate to prevent gain compression in a S-GPS environment. The complete chip is housed in a 2-layer BTNX green material PC board and occupies an area of (3.3 × 2.1)mm.
{"title":"A miniature LNA-Filter GPS receiver front-end module combining FBAR and E-mode pHEMT technology","authors":"Y. Chow, H.T. Tan, S. Low, M. Mutanizam, T.W. Lee, C.C. Lim, S. Khoo, Y. Y. Liew, W. Kim","doi":"10.1109/MWSYM.2008.4633071","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633071","url":null,"abstract":"We describe for the first time, a miniature GPS front-end module that achieves state-of-the-art gain and filtering in a single package. The module combines a E-mode pHEMT LNA MMIC with FBAR filter chip in a molded chip-on-board plastic package. At 2.7V supply voltage and 5mA current consumption, overall gain achieved is 18dB with 0.82dB noise figure. Filter rejection is better than 76dBc in the 827MHz and 65dBc in the 1.885GHz cellular frequency bands. The module is immune to interfering signals up to −3.7dBm at the above frequencies, more than adequate to prevent gain compression in a S-GPS environment. The complete chip is housed in a 2-layer BTNX green material PC board and occupies an area of (3.3 × 2.1)mm.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126284762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633146
U. Rohde, A. Poddar
This paper describes the STPCR (Stubs-Tuned Planar Coupled Resonators) based VCO that offers cost-effective and integrable alternative for DRO (Dielectric Resonator Oscillators) circuits. The measured phase noise is typically −122 dBc/Hz at 100 kHz offset from a 12 GHz with 400 MHz tuning, and 13.8 % DC-to-RF conversion efficiency.
{"title":"STPCR offers integrable alternatives of DRO","authors":"U. Rohde, A. Poddar","doi":"10.1109/MWSYM.2008.4633146","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633146","url":null,"abstract":"This paper describes the STPCR (Stubs-Tuned Planar Coupled Resonators) based VCO that offers cost-effective and integrable alternative for DRO (Dielectric Resonator Oscillators) circuits. The measured phase noise is typically −122 dBc/Hz at 100 kHz offset from a 12 GHz with 400 MHz tuning, and 13.8 % DC-to-RF conversion efficiency.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"2010 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125984561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633049
Christophe Quindroit, E. Ngoya, A. Bennadji, J. Nebus
In this paper, an new methodology for modeling the nonlinearity in power amplifier (PA) with memory is presented. It is based on the construction of a basis of orthogonal lookup-tables using SVD technique. It provides an effective and systematic way of representing and digitizing dynamic kernels in PA models that account for memory. It is shown that this procedure guarantees a high accuracy in PA intermodulation (IMD) prediction.
{"title":"An orthogonal lookup-table decomposition for accurate IMD prediction in power amplifier with memory","authors":"Christophe Quindroit, E. Ngoya, A. Bennadji, J. Nebus","doi":"10.1109/MWSYM.2008.4633049","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633049","url":null,"abstract":"In this paper, an new methodology for modeling the nonlinearity in power amplifier (PA) with memory is presented. It is based on the construction of a basis of orthogonal lookup-tables using SVD technique. It provides an effective and systematic way of representing and digitizing dynamic kernels in PA models that account for memory. It is shown that this procedure guarantees a high accuracy in PA intermodulation (IMD) prediction.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121946833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633248
A. Roussel, C. Nicholls, J. Wight
The frequency agile bandstop filter (FABSF) is an RF system component that functions as a frequency agile tunable notch filter capable of rejecting the low-level noise in presence of a high-level signal such as the out-of-band noise at the output of a high-power amplifier. The FABSF finds application in a frequency agile duplexer (FAD) system architecture to be implemented in the RF front-end of frequency division duplex (FDD) radio.
{"title":"Frequency agile bandstop filter (FABSF)","authors":"A. Roussel, C. Nicholls, J. Wight","doi":"10.1109/MWSYM.2008.4633248","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633248","url":null,"abstract":"The frequency agile bandstop filter (FABSF) is an RF system component that functions as a frequency agile tunable notch filter capable of rejecting the low-level noise in presence of a high-level signal such as the out-of-band noise at the output of a high-power amplifier. The FABSF finds application in a frequency agile duplexer (FAD) system architecture to be implemented in the RF front-end of frequency division duplex (FDD) radio.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127962478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4632944
Mehdi Sarkeshi, O. B. Leong, A. V. van Roermund
We are reporting a new topology for the Doherty amplifier to increase its bandwidth and enhance the load modulation. A varactor-based impedance transformer has been employed to replace the bulky and narrowband quarter-wave impedance inverter. Load modulation is carried out adaptively using the proposed varactor-based structure based on the input power level. An envelope detector is employed for adaptive impedance transformation of the carrier amplifier as well as bias adaptation of the peak amplifier. Based on the proposed topology, a 2W Doherty amplifier has been fabricated using discrete pHEMT transistors and low loss varactors. In order to evaluate the broad-band/multi-band performance of the proposed topology, measurements have been carried out at three sample frequencies (1.8GHZ, 2GHz and 2.2GHz) over a 400 MHz bandwidth. Power added efficiency of better than 45.3% has been achieved at maximum power level and 6-dB power back-off and maintained over the entire bandwidth. Measured IM3 is better than −42.2dBc at P1dB of 33dBm for all design frequencies.
{"title":"A novel Doherty amplifier for enhanced load modulation and higher bandwidth","authors":"Mehdi Sarkeshi, O. B. Leong, A. V. van Roermund","doi":"10.1109/MWSYM.2008.4632944","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4632944","url":null,"abstract":"We are reporting a new topology for the Doherty amplifier to increase its bandwidth and enhance the load modulation. A varactor-based impedance transformer has been employed to replace the bulky and narrowband quarter-wave impedance inverter. Load modulation is carried out adaptively using the proposed varactor-based structure based on the input power level. An envelope detector is employed for adaptive impedance transformation of the carrier amplifier as well as bias adaptation of the peak amplifier. Based on the proposed topology, a 2W Doherty amplifier has been fabricated using discrete pHEMT transistors and low loss varactors. In order to evaluate the broad-band/multi-band performance of the proposed topology, measurements have been carried out at three sample frequencies (1.8GHZ, 2GHz and 2.2GHz) over a 400 MHz bandwidth. Power added efficiency of better than 45.3% has been achieved at maximum power level and 6-dB power back-off and maintained over the entire bandwidth. Measured IM3 is better than −42.2dBc at P1dB of 33dBm for all design frequencies.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115948110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-06-15DOI: 10.1109/MWSYM.2008.4633136
T. Chalvatzis, S. Voinigescu
A digital receiver tunable from 4.5 GHz to 5.8 GHz is reported for the first time. The circuit is based on a 40 GS/s continuous-time bandpass δσ ADC with Q-enhancement. In addition to the center frequency, the receiver bandwidth is independently tunable between 120 MHz and 500 MHz. An SNR of 37.9 dB is measured at 5 GHz over 500 MHz bandwidth. Center frequency scaling of bandpass digital receivers from 2 GHz to 5.8 GHz is shown without changing the digital section and clock frequency of the ADC. The circuit, which consumes 2.09W from 2.5V supply, can be used as a broadband RF sampler for 5.8 GHz WLAN, or as the digital IF of a 60 GHz radio.
{"title":"A 4.5 GHz to 5.8 GHz tunable δσdigital receiver with Q enhancement","authors":"T. Chalvatzis, S. Voinigescu","doi":"10.1109/MWSYM.2008.4633136","DOIUrl":"https://doi.org/10.1109/MWSYM.2008.4633136","url":null,"abstract":"A digital receiver tunable from 4.5 GHz to 5.8 GHz is reported for the first time. The circuit is based on a 40 GS/s continuous-time bandpass δσ ADC with Q-enhancement. In addition to the center frequency, the receiver bandwidth is independently tunable between 120 MHz and 500 MHz. An SNR of 37.9 dB is measured at 5 GHz over 500 MHz bandwidth. Center frequency scaling of bandpass digital receivers from 2 GHz to 5.8 GHz is shown without changing the digital section and clock frequency of the ADC. The circuit, which consumes 2.09W from 2.5V supply, can be used as a broadband RF sampler for 5.8 GHz WLAN, or as the digital IF of a 60 GHz radio.","PeriodicalId":273767,"journal":{"name":"2008 IEEE MTT-S International Microwave Symposium Digest","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130911706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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