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1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)最新文献

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Strained InGaAs/AlGaAs double quantum well laser with GRIN-SCH GRIN-SCH应变InGaAs/AlGaAs双量子阱激光器
C. Guoying, Ma Zuguang, Wang Xingqiao
Strained InGaAs/AlGaAs double quantum well lasers with two pairs of GRIN heterostructures have been fabricated by Metal-Organic Chemical Vapor Deposition (MOCVD). Its wavelength ranges from 970 to 982 nm, threshold current density is 140 A/cm/sup 2/ at room temperature CW operation. 520 mw/facet and 1.49 w/facet for CW output optical power has been obtained under 0.9 A and 2.0 A operation, respectively. The maximum CW output optical power can come up to 2.4 w/facet.
采用金属-有机化学气相沉积(MOCVD)技术制备了两对GRIN异质结构的InGaAs/AlGaAs应变双量子阱激光器。其波长范围为970 ~ 982 nm,室温连续工作时的阈值电流密度为140 A/cm/sup 2/。在0.9 A和2.0 A下,连续波输出光功率分别为520 mw/facet和1.49 w/facet。最大连续波输出光功率可达2.4 w/facet。
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引用次数: 0
VLSI process integration VLSI制程集成
C. Y. Wong, M. Chan
It has been predicted that microprocessors will use over 13 million transistors by year 2001 and that by year 2010, over 90 million transistors will he deployed to fabricate semiconductor chips with ever increasing efficiency. It has also been generally accepted that the costs of a wafer fab essentially double for each new generation of microprocessor. In the coming 21st Century, VLSI process integration, in product/research/development and in manufacturing, will need to meet the demands of not only the technology innovations, the reliability and scaling challenges, but also the cost effectiveness of yield, factory workflow and capacity management. Issues addressing these factors, sometimes leading in diametric directions, and the novel solutions, are presented and discussed.
据预测,到2001年,微处理器将使用超过1300万个晶体管,到2010年,将使用超过9000万个晶体管来制造效率不断提高的半导体芯片。人们普遍认为,每生产一代新微处理器,晶圆厂的成本就会翻一番。在即将到来的21世纪,VLSI工艺集成,在产品/研究/开发和制造中,不仅需要满足技术创新、可靠性和规模挑战的需求,还需要满足成品率、工厂工作流程和产能管理的成本效益。提出并讨论了解决这些因素的问题,有时会导致截然不同的方向,以及新的解决方案。
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引用次数: 4
Multilayer solid phase reaction and epitaxial growth of metal silicide on Si 金属硅化物在硅上的多层固相反应及外延生长
Bingzong Li, X. Qu, G. Ru, H. Mo, J. Liu
Co-silicide/Si hetero-epitaxial growth by solid phase reaction of various multilayers with a Ti-interlayer and its mechanism are studied and discussed.
研究和讨论了含ti中间层的多种多层材料固相反应生长co -硅化物/Si异质外延及其机理。
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引用次数: 0
Lead zirconate titanate thin films on GaAs for microwave device applications 微波器件用砷化镓锆钛酸铅薄膜
S. Arscott, R. Miles, S. J. Milne
Summary form only given. Bulk Acoustic Wave (BAW) resonant devices based on quartz crystals are widely used in electronic systems at frequencies up to a few tens of MHz. However for operation at higher frequencies the crystal must be made much thinner and consequently-ceases to be mechanically self supporting. Similarly, Surface Acoustic Wave (SAW) device dimensions shrink at high frequencies requiring sub-micron electrode structures for microwave operation. In this paper we describe how the submicron critical dimensionality of acoustic wave devices can be achieved by depositing thin piezo-ceramic films on semiconductor substrates with the subsequent fabrication of BAW devices. The piezoelectric ceramic used in this work is sol-gel derived lead zirconate titanate (PZT) about 0.5 /spl mu/m thick. Films having the composition Pb(Zr/sub 0.53/Ti/sub 0.47/)O/sub 3/, have been prepared on platinized silicon (Pt-Si) and platinized gallium arsenide (Pt-GaAs) substrates using a 1,3-propanediol and a novel 1,1,1-tris(hydroxymethyl)ethane based sol-gel technique. Crystallisation of the PZT films on the Pt-GaAs was achieved by firing the sol-gel coating at 650/spl deg/C for a dwell time of 1 second using rapid thermal processing (RTP) techniques. Films having the required thickness of /spl sim/0.5 /spl mu/m were produced from a single deposition of the precursor sol resulted. Average values of remnant polarisation (P/sub r/) for the Films were 29 /spl mu/C/cm/sup 2/ and 24 /spl mu/C/cm/sup 2/ on Pt-Si and Pt-GaAs respectively, comparing very well with bulk values. Preliminary microwave characterisation performed on PZT/Pt-Si based BAW resonator structures indicates a fundamental parallel resonance at 0.1 GHz, having an unloaded Q of 1100. Higher frequency operation will be obtained when substrate thinning under the active layer has been optimised.
只提供摘要形式。基于石英晶体的体声波(BAW)谐振装置广泛应用于频率高达几十兆赫的电子系统中。然而,为了在更高的频率下工作,晶体必须做得更薄,因此不再具有机械上的自我支撑能力。同样,表面声波(SAW)器件尺寸在高频率下收缩,需要亚微米电极结构用于微波操作。在本文中,我们描述了如何通过在半导体衬底上沉积薄压电陶瓷薄膜并随后制造BAW器件来实现声波器件的亚微米临界尺寸。这项工作中使用的压电陶瓷是溶胶-凝胶衍生的锆钛酸铅(PZT),厚度约为0.5 /spl mu/m。采用1,3-丙二醇和新型的1,1,1-三(羟甲基)乙烷溶胶-凝胶技术,在铂化硅(Pt-Si)和铂化砷化镓(Pt-GaAs)衬底上制备了Pb(Zr/sub 0.53/Ti/sub 0.47/)O/sub 3/薄膜。采用快速热处理(RTP)技术,将溶胶-凝胶涂层在650/spl℃下烧制1秒,实现了PZT薄膜在Pt-GaAs上的结晶。前驱体溶胶的单次沉积产生了所需厚度为/spl sim/0.5 /spl mu/m的薄膜。Pt-Si和Pt-GaAs薄膜的残余极化平均值(P/sub r/)分别为29 /spl mu/C/cm/sup 2/和24 /spl mu/C/cm/sup 2/,与体值比较良好。在基于PZT/Pt-Si的BAW谐振器结构上进行的初步微波表征表明,在0.1 GHz处存在基本并行谐振,其卸载Q为1100。当有源层下的衬底减薄得到优化时,将获得更高频率的操作。
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引用次数: 2
Discharging and recharging of anomalous positive charges in MOSFETs mosfet中异常正电荷的放电和再充电
Yongjun Wu, Mingzhen Xu, Changhua Tan, Jian-Lin Wei, Yi Liang, Yangyuan Wang
The discharging of positive charges is found to increase with bias. Following the same discharging, higher recharging bias leads to larger recharging of APC. However, under the same recharging bias with different previous discharging, the recharging does show a different response. In particular, there is larger recharging after the larger previous discharging, whatever the same recharging bias.
发现正电荷的放电随着偏置的增加而增加。在相同的放电条件下,越高的充电偏压导致APC的再充电越大。但是,在相同的充电偏压和不同的前次放电情况下,充电确实表现出不同的响应。特别是,无论相同的充电偏压,在之前较大的放电之后都会有更大的充电。
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引用次数: 0
The recent TEM application development for microelectronics 瞬变电磁法在微电子领域的最新应用进展
T. Sheng, C. Tung, J.L.F. Wang
Transmission electron microscopy (TEM) has played an important role in silicon VLSI/ULSI process evaluation and failure analysis. More recently, it has also been applied to micro-electro-machine system (MEMS), MCM, ...etc. In this talk, a few recent TEM application developments are presented. Some of these TEM applications may seem very difficult or impossible previously. These new applications are made possible by innovative sample preparation break through.
透射电子显微镜(TEM)在硅VLSI/ULSI工艺评价和失效分析中发挥了重要作用。近年来,它也被应用于微机电系统(MEMS)、MCM等。在这次演讲中,介绍了TEM的一些最新应用进展。这些TEM的一些应用在以前可能看起来非常困难或不可能。这些新的应用是通过创新的样品制备突破而实现的。
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引用次数: 0
The comparison of delay modeling for basic interconnect net topologies 基本互连网络拓扑的延迟建模比较
S. Lingling, Yan Xiaolang, Wang Junhu, Cai Miaohua
This paper makes an attempt to compare several methods of interconnect delay modelling. The results of different interconnect delay analyses are given and compared with SPICE simulation results for testing basic interconnect net topology.
本文试图比较几种互连延迟建模方法。给出了不同互连延迟分析的结果,并与SPICE仿真结果进行了比较,用于测试基本互连网络拓扑结构。
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引用次数: 1
Non-destructive characterization of thin silicides using X-ray reflectivity 利用x射线反射率对薄硅化物进行无损表征
C. Detavernier, R. Degryse, R. Van Meirhaeghe, F. Cardon, G. Ru, Bingzong Li
With the increasing miniaturisation, the use of thin silicide films in VLSI technology becomes more important X-ray reflectivity (XRR) is a non-destructive method for the characterization of layer thickness, surface and interfacial roughness of thin films. We have used XRR for the characterization of thin CoSi/sub 2/ and PtSi layers. The silicide films were prepared by rapid thermal annealing and XRR war used before and alter silicidation to measure the layer thickness. The XRR results are compared with results obtained on the same films by Rutherford backscattering spectrometry (RBS), cross-sectional transmission electron microscopy (XTEM), profilometry and atomic force microscopy (AFM). By XRR we were able to accurately measure the thickness of silicide layers down to 3 nm.
随着小型化程度的不断提高,硅化薄膜在超大规模集成电路技术中的应用变得越来越重要。x射线反射率(XRR)是表征薄膜层厚、表面和界面粗糙度的一种无损方法。我们已经使用XRR来表征薄CoSi/ sub2 /和PtSi层。采用快速热退火法制备了硅化膜,并在硅化前用XRR法测定了层厚。并将XRR结果与卢瑟福后向散射光谱(RBS)、横断面透射电子显微镜(XTEM)、轮廓术和原子力显微镜(AFM)在相同薄膜上得到的结果进行了比较。通过XRR,我们能够精确地测量硅化物层的厚度到3nm。
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引用次数: 0
The investigation of recessed channel SOI devices 嵌入式通道SOI器件的研究
Xing Zhang, Ru Huang, X. Xi, M. Chan, P. Ko, Yangyuan Wang
Recessed channel SOI devices were investigated. In this paper, the structure and processing of such devices is described in detail. The characteristics of a SOI MOSFET using recessed channel technology are much better than normal thick non-depleted and thin-film fully depleted SOI MOSFETs. The 0.15/spl sim/4.0 /spl mu/m recessed channel SOI MOSFETs with a silicon channel film of 70 nm and a source/drain silicon film of 160 nm are developed using a submicron process. The transconductance and drain current are increased by 40% more than thin-film fully depleted SOI MOSFETs.
研究了嵌入式通道SOI器件。本文详细介绍了该装置的结构和加工工艺。采用凹槽沟道技术的SOI MOSFET的特性比普通的厚非耗尽和薄膜完全耗尽SOI MOSFET要好得多。采用亚微米工艺制备了具有70 nm硅沟道膜和160 nm硅源/漏极膜的0.15/spl sim/4.0 /spl mu/m凹槽SOI mosfet。跨导和漏极电流比薄膜完全耗尽SOI mosfet增加了40%以上。
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引用次数: 0
SOI material: ready to take over mainstream bulk Si SOI材料:准备接管主流块状硅
W. Maszara
An extensive effort has been undertaken to benchmark the quality of the 200 mm SOI substrates, involving all viable sources of the material in the world. A comprehensive overview of the state of the art of all pertinent parameters of this material is given. The quality of the recent material appears very competitive with the bulk material. In particular, the level of defects in the SOI film is comparable to bulk, below 0.1/cm/sup 2/ for the best material. SOI wafer processing will require only minor equipment and process adjustments. The main challenges for the SOI material today is a sustainable consistency of its parameters, the price and volume availability.
已经进行了广泛的努力,对200毫米SOI基板的质量进行基准测试,涉及世界上所有可行的材料来源。全面概述了该材料的所有相关参数的最新技术。新材料的质量与散装材料相比很有竞争力。特别是,SOI薄膜中的缺陷水平与体积相当,低于0.1/cm/sup 2/为最佳材料。SOI晶圆加工只需要轻微的设备和工艺调整。目前SOI材料面临的主要挑战是其参数、价格和数量的可持续一致性。
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引用次数: 1
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1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)
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