Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785920
Zhiliang Hong
A new model is presented for an EEPROM cell using devices existing in most simulators. Transient simulation can be performed with this model when the EEPROM cells perform erase, write and read operations. The compatibility has been verified by the examples in this paper.
{"title":"A new model for EEPROM cell","authors":"Zhiliang Hong","doi":"10.1109/ICSICT.1998.785920","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785920","url":null,"abstract":"A new model is presented for an EEPROM cell using devices existing in most simulators. Transient simulation can be performed with this model when the EEPROM cells perform erase, write and read operations. The compatibility has been verified by the examples in this paper.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127399134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785819
Wang Wei, L. Xiaowei, Wang Xilian, L. Yuqiang, Fan Maojun
The main influences of KOH anisotropic etching of Si <100> wafers on etched surface flatness are investigated experimentally. In the Si membrane etching with Si/sub 3/N/sub 4/ mask, the Si/sub 3/N/sub 4/ etching and the sediments in KOH aqueous solution are found as the main influences. The effective method to improve surface quality is presented by the mechanism analysis.
{"title":"Investigation of KOH anisotropic etching of Si <100> wafers for improving etched surface quality","authors":"Wang Wei, L. Xiaowei, Wang Xilian, L. Yuqiang, Fan Maojun","doi":"10.1109/ICSICT.1998.785819","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785819","url":null,"abstract":"The main influences of KOH anisotropic etching of Si <100> wafers on etched surface flatness are investigated experimentally. In the Si membrane etching with Si/sub 3/N/sub 4/ mask, the Si/sub 3/N/sub 4/ etching and the sediments in KOH aqueous solution are found as the main influences. The effective method to improve surface quality is presented by the mechanism analysis.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"2005 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116769503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785821
A. Yin, J. White, A. Karroy, Chun Hu
Polycide/metal capacitors with high unit area capacitance and high linearity are successfully integrated into submicron CMOS device fabrication. The capacitor implementation is modular and low cost: the capacitor dielectric is deposited at low temperature and only one additional mask is needed for patterning the capacitor top plate. High voltage-capacitance linearity is obtained for the TEOS oxide capacitors of the capacitance density at 1 fF/spl mu/m/sup 2/, with the linear voltage coefficient of capacitance LVCC <5 ppm/V and the quadratic voltage coefficient of capacitance QVCC<2 ppm/V/sup 2/. For the nitride capacitors, 1.5 fF//spl mu/m/sup 2/ unit area capacitance is obtained with the LVCC <70 ppm/V and the QVCC <20 ppm/V/sup 2/.
{"title":"Integration of polycide/metal capacitors in advanced device fabrication","authors":"A. Yin, J. White, A. Karroy, Chun Hu","doi":"10.1109/ICSICT.1998.785821","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785821","url":null,"abstract":"Polycide/metal capacitors with high unit area capacitance and high linearity are successfully integrated into submicron CMOS device fabrication. The capacitor implementation is modular and low cost: the capacitor dielectric is deposited at low temperature and only one additional mask is needed for patterning the capacitor top plate. High voltage-capacitance linearity is obtained for the TEOS oxide capacitors of the capacitance density at 1 fF/spl mu/m/sup 2/, with the linear voltage coefficient of capacitance LVCC <5 ppm/V and the quadratic voltage coefficient of capacitance QVCC<2 ppm/V/sup 2/. For the nitride capacitors, 1.5 fF//spl mu/m/sup 2/ unit area capacitance is obtained with the LVCC <70 ppm/V and the QVCC <20 ppm/V/sup 2/.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128366332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786088
Ru Huang, Bing Yang, Xing Zhang, Yangyuan Wang
The comprehensive design guidelines for SOI gate controlled hybrid transistor (GCHT) are provided in this paper for the first time, especially for GCHT operating at low voltage, which is an advantageous operating region of GCHT. The investigated mechanisms in this study involve short channel effects, current driving capability, device off-characteristics and open-circuit voltage gain. The design curves for low operating voltage are presented by synthesizing the results, with tradeoffs between different parameter requirements for different effects illustrated explicitly. The allowable design region is greatly-broadened, pointing out the direction for deep submicron device development.
{"title":"Design consideration for SOI gate controlled hybrid transistor operating at low voltage","authors":"Ru Huang, Bing Yang, Xing Zhang, Yangyuan Wang","doi":"10.1109/ICSICT.1998.786088","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786088","url":null,"abstract":"The comprehensive design guidelines for SOI gate controlled hybrid transistor (GCHT) are provided in this paper for the first time, especially for GCHT operating at low voltage, which is an advantageous operating region of GCHT. The investigated mechanisms in this study involve short channel effects, current driving capability, device off-characteristics and open-circuit voltage gain. The design curves for low operating voltage are presented by synthesizing the results, with tradeoffs between different parameter requirements for different effects illustrated explicitly. The allowable design region is greatly-broadened, pointing out the direction for deep submicron device development.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"74 8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134428052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785960
Wu Jie, Guo Fang-min, Xia Guan-qun
By variation of the thickness and doping concentration of the p/sup +/ and intrinsic regions, the barrier height and asymmetry of the structure can be independently varied. A model is developed to investigate the extent to which the above factors may affect the PDBDs' dc characteristics.
{"title":"Design consideration for planar doped barrier diodes' dc characteristics","authors":"Wu Jie, Guo Fang-min, Xia Guan-qun","doi":"10.1109/ICSICT.1998.785960","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785960","url":null,"abstract":"By variation of the thickness and doping concentration of the p/sup +/ and intrinsic regions, the barrier height and asymmetry of the structure can be independently varied. A model is developed to investigate the extent to which the above factors may affect the PDBDs' dc characteristics.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134452823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785964
Hu Dexiu
Semiconductor laser amplifier (SLA) will be an important device in the fields of both of fiber-optic communication and optical information processing. In this paper the SLA's future is analyzed. Some experimental results about SLA and its application for wavelength conversion are studied.
{"title":"Semiconductor laser amplifier and applications","authors":"Hu Dexiu","doi":"10.1109/ICSICT.1998.785964","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785964","url":null,"abstract":"Semiconductor laser amplifier (SLA) will be an important device in the fields of both of fiber-optic communication and optical information processing. In this paper the SLA's future is analyzed. Some experimental results about SLA and its application for wavelength conversion are studied.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134569337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785897
Fengying Yao, Bizhou Li, Min Zhang
Fixed-point DSP implementation of the decoder and the synthesizer of a real time vocoder with 1.4 kbps bit rate has been accomplished instead of the usual realization of low bit rate vocoder in floating point DSP. Replacing floating point values with fixed-point ones and other approaches have been adopted to reach a real time solution. The implemented fixed-point decoder and synthesizer run at 11.3 MIPS on the average and occupy 1246 words of program memory, 1338 words of table ROM and 814 words of RAM in a 40 MHz TMS320C50 DSP chip. The results indicate the possibility to implement the whole vocoder with low cost fixed-point DSP.
{"title":"A fixed-point DSP implementation for a low bit rate vocoder","authors":"Fengying Yao, Bizhou Li, Min Zhang","doi":"10.1109/ICSICT.1998.785897","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785897","url":null,"abstract":"Fixed-point DSP implementation of the decoder and the synthesizer of a real time vocoder with 1.4 kbps bit rate has been accomplished instead of the usual realization of low bit rate vocoder in floating point DSP. Replacing floating point values with fixed-point ones and other approaches have been adopted to reach a real time solution. The implemented fixed-point decoder and synthesizer run at 11.3 MIPS on the average and occupy 1246 words of program memory, 1338 words of table ROM and 814 words of RAM in a 40 MHz TMS320C50 DSP chip. The results indicate the possibility to implement the whole vocoder with low cost fixed-point DSP.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133495613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786526
Chang Liu
MEMS technology can enable new circuit components. Current examples include RF signal switches, tunable capacitors and inductors, resonant filters, antennas, and relays. These components, all involving micromechanical principles, can provide enhanced performances and reconfigurability, reduced component sizes, and potentially simplified system-level design. I will discuss our DARPA-funded efforts in developing electromechanical RF switches, high-gain antennas, and new types of planar waveguides. Thermal-mechanical RF switches exhibit low on-state insertion loss and high off-state isolation compared with conventional transistor-based counterparts, while operating under IC-compatible bias conditions.
{"title":"Micro electromechanical systems (MEMS): technology and future applications in circuits","authors":"Chang Liu","doi":"10.1109/ICSICT.1998.786526","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786526","url":null,"abstract":"MEMS technology can enable new circuit components. Current examples include RF signal switches, tunable capacitors and inductors, resonant filters, antennas, and relays. These components, all involving micromechanical principles, can provide enhanced performances and reconfigurability, reduced component sizes, and potentially simplified system-level design. I will discuss our DARPA-funded efforts in developing electromechanical RF switches, high-gain antennas, and new types of planar waveguides. Thermal-mechanical RF switches exhibit low on-state insertion loss and high off-state isolation compared with conventional transistor-based counterparts, while operating under IC-compatible bias conditions.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133462698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.786540
Wang Yaqiang, Jin Zhonghe, Wang Yuelin, Ding Chun
A micromechanical resonator is proposed and realized. It consists of a single-crystal silicon beam and two P-type silicon resistors. One resistor is used to excite the vibrating beam and the other to sense vibration of the beam. The dimensions of the resonator are about 4/spl times/2.5 mm/sup 2/, the resonant frequency is about 7.8 KHz, Q factor about 190 in air and above 2500 in vacuum degree of 7.5/spl times/10/sup -4/ Pa. The theory of thermal excitation is analyzed and the characteristics of the resonator are tested. We conclude that the resonator can be applied to vacuum measurement by the means of closed-loop resonating circuit. The design and realization of the circuit are described.
{"title":"Thermally excited micromechanical vacuum resonator","authors":"Wang Yaqiang, Jin Zhonghe, Wang Yuelin, Ding Chun","doi":"10.1109/ICSICT.1998.786540","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.786540","url":null,"abstract":"A micromechanical resonator is proposed and realized. It consists of a single-crystal silicon beam and two P-type silicon resistors. One resistor is used to excite the vibrating beam and the other to sense vibration of the beam. The dimensions of the resonator are about 4/spl times/2.5 mm/sup 2/, the resonant frequency is about 7.8 KHz, Q factor about 190 in air and above 2500 in vacuum degree of 7.5/spl times/10/sup -4/ Pa. The theory of thermal excitation is analyzed and the characteristics of the resonator are tested. We conclude that the resonator can be applied to vacuum measurement by the means of closed-loop resonating circuit. The design and realization of the circuit are described.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"57 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114033935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-10-21DOI: 10.1109/ICSICT.1998.785873
Honghao Ji, Qiuxia Xu
In this paper, the Co-SALICIDE process has been investigated intensively for the application to deep sub-micron CMOS VLSI. Adopting a Co/Ti/Si structure, epitaxial growth of a single crystal CoSi/sub 2/ film on the [100] Si substrate through two-step RTA has been demonstrated in detail. The heat-reaction characteristics of the Co/Ti/Si structure for forming the single crystal CoSi/sub 2/ film have been studied. We have applied the single crystal CoSi/sub 2/ to SALICIDE process post junction fabrication to obtain a smoother interface. Focusing on the disadvantage of a large leakage current that Co-salicided diodes usually suffer, ultra-shallow junctions especially, we found the leakage current to be large and investigated several methods to reduce diode leakage. The experiments show that PAI can improve the inverse I-V characteristics remarkably. A leakage current density of a Co-salicided diode as low as 8/spl times/10/sup -8/ A/cm/sup 2/ (V=5 v) was obtained for a junction depth of 107 nm. The resistivity of the single crystal CoSi/sub 2/ film is 16.5 /spl mu//spl Omega//sub (BH)/cm.
{"title":"An investigation of single crystal Co-SALICIDE (self-aligned silicide) process for deep sub-micrometer CMOS devices","authors":"Honghao Ji, Qiuxia Xu","doi":"10.1109/ICSICT.1998.785873","DOIUrl":"https://doi.org/10.1109/ICSICT.1998.785873","url":null,"abstract":"In this paper, the Co-SALICIDE process has been investigated intensively for the application to deep sub-micron CMOS VLSI. Adopting a Co/Ti/Si structure, epitaxial growth of a single crystal CoSi/sub 2/ film on the [100] Si substrate through two-step RTA has been demonstrated in detail. The heat-reaction characteristics of the Co/Ti/Si structure for forming the single crystal CoSi/sub 2/ film have been studied. We have applied the single crystal CoSi/sub 2/ to SALICIDE process post junction fabrication to obtain a smoother interface. Focusing on the disadvantage of a large leakage current that Co-salicided diodes usually suffer, ultra-shallow junctions especially, we found the leakage current to be large and investigated several methods to reduce diode leakage. The experiments show that PAI can improve the inverse I-V characteristics remarkably. A leakage current density of a Co-salicided diode as low as 8/spl times/10/sup -8/ A/cm/sup 2/ (V=5 v) was obtained for a junction depth of 107 nm. The resistivity of the single crystal CoSi/sub 2/ film is 16.5 /spl mu//spl Omega//sub (BH)/cm.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127751268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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