Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307482
S. Voldman, M. Marceau, A. Baker, E. Adler, S. Geissler, J. Slinkman, J. Johnson, M. Paggi
A comprehensive study of design point constraints on n-well and epitaxial design for a CMOS trench DRAM/SRAM/logic process is presented. Design criteria and guidelines, derived from experimentation and process/device simulation, are based on the following considerations: trench DRAM storage node capacitance, DRAM leakage mechanisms, retention time, n-well electrical parametrics, pnp bipolar current gain, latchup, and electrostatic discharge (ESD) performance. The methodology is discussed for achieving optimum power, signal, retention time, performance, reliability and ESD performance.<>
{"title":"Retrograde well and epitaxial thickness optimization for shallow- and deep-trench collar merged isolation and node trench SPT DRAM cell and CMOS logic technology","authors":"S. Voldman, M. Marceau, A. Baker, E. Adler, S. Geissler, J. Slinkman, J. Johnson, M. Paggi","doi":"10.1109/IEDM.1992.307482","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307482","url":null,"abstract":"A comprehensive study of design point constraints on n-well and epitaxial design for a CMOS trench DRAM/SRAM/logic process is presented. Design criteria and guidelines, derived from experimentation and process/device simulation, are based on the following considerations: trench DRAM storage node capacitance, DRAM leakage mechanisms, retention time, n-well electrical parametrics, pnp bipolar current gain, latchup, and electrostatic discharge (ESD) performance. The methodology is discussed for achieving optimum power, signal, retention time, performance, reliability and ESD performance.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126842653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307464
A. Benvenuti, G. Ghione, M. Pinto, W. M. Coughran, N. Schryer
We analyzed the self-consistent thermal and electrical behavior of InP-GaInAs heterojunction bipolar transistors (HBTs) with a coupled 1D thermal-fully hydrodynamic model, discretized with an improved upwinding scheme. Taking advantage of the flexibility allowed by our software approach, the role of convective terms and thermal effects is demonstrated by comparison with previous models.<>
{"title":"Coupled thermal-fully hydrodynamic simulation of InP-based HBTs","authors":"A. Benvenuti, G. Ghione, M. Pinto, W. M. Coughran, N. Schryer","doi":"10.1109/IEDM.1992.307464","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307464","url":null,"abstract":"We analyzed the self-consistent thermal and electrical behavior of InP-GaInAs heterojunction bipolar transistors (HBTs) with a coupled 1D thermal-fully hydrodynamic model, discretized with an improved upwinding scheme. Taking advantage of the flexibility allowed by our software approach, the role of convective terms and thermal effects is demonstrated by comparison with previous models.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123244060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307383
M. Ancona
An approximate approach to quantum transport problems known as density-gradient theory is used to study geometrical and space-charge effects on field emission in planar, cylindrical and spherical geometries. It is shown that significant departures from simple field enhancement ( beta factor) arise for radii of curvature below 50AA and that for many purposes explicit inclusion of space-charge effects is unnecessary especially in non-planar geometries.<>
{"title":"Density-gradient analysis of effects of geometry on field-emitter characteristics","authors":"M. Ancona","doi":"10.1109/IEDM.1992.307383","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307383","url":null,"abstract":"An approximate approach to quantum transport problems known as density-gradient theory is used to study geometrical and space-charge effects on field emission in planar, cylindrical and spherical geometries. It is shown that significant departures from simple field enhancement ( beta factor) arise for radii of curvature below 50AA and that for many purposes explicit inclusion of space-charge effects is unnecessary especially in non-planar geometries.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"190 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123013121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307507
M. Pinto, D. Boulin, C. Rafferty, R. K. Smith, W. M. Coughran, I. Kizilyalli, M. Thoma
Results of complete 3-dimensional AC/DC characterizations of the n-p-n transistor in a submicron BiCMOS technology are presented. Accuracy and throughput acceptable for constructing compact models is achieved through the use of multidimensional process simulation, adaptive grid generation and preconditioned iterative techniques for both DC and small-signal analysis. Comparisons of 2- and 3-dimensional simulations with measurements enable assessments of the magnitude of 3-dimensional effects, thereby suggesting efficient device optimization strategies.<>
{"title":"Three-dimensional characterization of bipolar transistors in a submicron BiCMOS technology using integrated process and device simulation","authors":"M. Pinto, D. Boulin, C. Rafferty, R. K. Smith, W. M. Coughran, I. Kizilyalli, M. Thoma","doi":"10.1109/IEDM.1992.307507","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307507","url":null,"abstract":"Results of complete 3-dimensional AC/DC characterizations of the n-p-n transistor in a submicron BiCMOS technology are presented. Accuracy and throughput acceptable for constructing compact models is achieved through the use of multidimensional process simulation, adaptive grid generation and preconditioned iterative techniques for both DC and small-signal analysis. Comparisons of 2- and 3-dimensional simulations with measurements enable assessments of the magnitude of 3-dimensional effects, thereby suggesting efficient device optimization strategies.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126473053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307362
Y. Ikeda, K. Kishimoto, K. Hirose, Y. Numasawa
A new CVD technology is proposed to form a conformal SiO/sub 2/ film with superior film quality. This technology is named Tetraethylorthosilicate (TEOS) Ozone Pulse-wave Plasma Enhanced Chemical Vapor Deposition (TOP-PECVD). In the TOP-PECVD technology, TEOS-O/sub 3/ thermal film deposition and O/sub 2/+O/sub 3/ plasma film modification processes are alternately repeated in the same reaction chamber to obtain a thick and homogeneous film. The TOP-PECVD film has high conformality (Side/Top) of over 90%, which is much larger than that for a conventional TEOS-PECVD film (41%). On the other hand, it has less moisture content and smaller leakage current as compared to the conventional TEOS-PECVD film. Carbon content, measured by SIMS, is one hundredth times less than that in the TEOS-PECVD film. Delineation etching patterns show that the TOP-PECVD film has a good homogeneous quality.<>
{"title":"\"TOP-PECVD\": a new conformal plasma enhanced CVD technology using TEOS, ozone and pulse-modulated RF plasma","authors":"Y. Ikeda, K. Kishimoto, K. Hirose, Y. Numasawa","doi":"10.1109/IEDM.1992.307362","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307362","url":null,"abstract":"A new CVD technology is proposed to form a conformal SiO/sub 2/ film with superior film quality. This technology is named Tetraethylorthosilicate (TEOS) Ozone Pulse-wave Plasma Enhanced Chemical Vapor Deposition (TOP-PECVD). In the TOP-PECVD technology, TEOS-O/sub 3/ thermal film deposition and O/sub 2/+O/sub 3/ plasma film modification processes are alternately repeated in the same reaction chamber to obtain a thick and homogeneous film. The TOP-PECVD film has high conformality (Side/Top) of over 90%, which is much larger than that for a conventional TEOS-PECVD film (41%). On the other hand, it has less moisture content and smaller leakage current as compared to the conventional TEOS-PECVD film. Carbon content, measured by SIMS, is one hundredth times less than that in the TEOS-PECVD film. Delineation etching patterns show that the TOP-PECVD film has a good homogeneous quality.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116051956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this work, the removal of native oxide on monocrystalline Si and poly-Si was investigated. It was found that by reducing the concentration of the HF solution, the loss of thermal oxide and TEOS can be reduced almost to thicknesses which are equivalent to the native oxide thickness which has to be removed. To accelerate the reaction, higher temperatures can be used. In the case of poly-Si, it was found that the etching of the last monolayer of the native oxide is much slower than for monocrystalline Si. In the poly-Si case, this can be easily accelerated by the use of higher temperatures.<>
{"title":"A high-selectivity native oxide removal process for native oxide free processes","authors":"Verhaverbeke, Iacovacci, Mertens, Meuris, Heyns, Schreutelkamp, Maex, Alay, Vandervorst, de Blank, Kubota, Philipossian","doi":"10.1109/IEDM.1992.307441","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307441","url":null,"abstract":"In this work, the removal of native oxide on monocrystalline Si and poly-Si was investigated. It was found that by reducing the concentration of the HF solution, the loss of thermal oxide and TEOS can be reduced almost to thicknesses which are equivalent to the native oxide thickness which has to be removed. To accelerate the reaction, higher temperatures can be used. In the case of poly-Si, it was found that the etching of the last monolayer of the native oxide is much slower than for monocrystalline Si. In the poly-Si case, this can be easily accelerated by the use of higher temperatures.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116271541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307440
C. Werkhoven, E. Granneman, M. Hendriks, R. de Blank, S. Verhaverbeke, P. Mertens, M. Meuris, W. Vandervorst, M. Heijns, A. Philipossian
The suitability of using either a wet HF process or an integrated HF vapor process prior to clustered gate stack formation is compared. When ultra pure chemicals are used for wet chemical pre-cleaning, a systematic improvement of gate oxide integrity is noticeable in case of the integrated HF vapor etching technique. This is attributed to a more effective removal of the low quality wet chemical cleaning oxide and the more controllable initiation of the oxidation process.<>
{"title":"Wet and dry HF-last cleaning process for high-integrity gate oxides","authors":"C. Werkhoven, E. Granneman, M. Hendriks, R. de Blank, S. Verhaverbeke, P. Mertens, M. Meuris, W. Vandervorst, M. Heijns, A. Philipossian","doi":"10.1109/IEDM.1992.307440","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307440","url":null,"abstract":"The suitability of using either a wet HF process or an integrated HF vapor process prior to clustered gate stack formation is compared. When ultra pure chemicals are used for wet chemical pre-cleaning, a systematic improvement of gate oxide integrity is noticeable in case of the integrated HF vapor etching technique. This is attributed to a more effective removal of the low quality wet chemical cleaning oxide and the more controllable initiation of the oxidation process.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"27 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121011043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307384
K. R. Williams, R. Muller
Micromachined vacuum devices that employ a hot tungsten filament as a source of electromagnetic radiation and thermionically emitted electrons have been fabricated. These hot-filament devices have been characterized for use as "microlamps," vacuum diodes, and triodes. Coplanar filaments are used for the cathodes and anodes in the diodes, and also for the grids in the triodes. The filaments are typically 200- mu m long and are suspended over a cavity in the silicon substrate. The devices tested were operated in a pumped vacuum chamber.<>
{"title":"IC-processed hot-filament vacuum microdevices","authors":"K. R. Williams, R. Muller","doi":"10.1109/IEDM.1992.307384","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307384","url":null,"abstract":"Micromachined vacuum devices that employ a hot tungsten filament as a source of electromagnetic radiation and thermionically emitted electrons have been fabricated. These hot-filament devices have been characterized for use as \"microlamps,\" vacuum diodes, and triodes. Coplanar filaments are used for the cathodes and anodes in the diodes, and also for the grids in the triodes. The filaments are typically 200- mu m long and are suspended over a cavity in the silicon substrate. The devices tested were operated in a pumped vacuum chamber.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121504938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307506
G. Hurkx, H. Peek, J. Slotboom, R. A. Windgassen
The anomalous gate voltage- and dopant dependence of surface leakage currents in heavily-doped MOS gated-diode structures is described. It is shown that, by using a recombination model which includes tunnelling effects, a good quantitative description of surface leakage currents can be obtained. This resulted in a revision of the classical description of these currents. Simple design criteria to avoid excessive surface leakage currents are presented.<>
{"title":"Anomalous behaviour of surface leakage currents in heavily-doped MOS structures","authors":"G. Hurkx, H. Peek, J. Slotboom, R. A. Windgassen","doi":"10.1109/IEDM.1992.307506","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307506","url":null,"abstract":"The anomalous gate voltage- and dopant dependence of surface leakage currents in heavily-doped MOS gated-diode structures is described. It is shown that, by using a recombination model which includes tunnelling effects, a good quantitative description of surface leakage currents can be obtained. This resulted in a revision of the classical description of these currents. Simple design criteria to avoid excessive surface leakage currents are presented.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121531544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1992.307393
Y. Kusuda, N. Komaba, Y. Kuroda, S. Ohno, S. Tanaka
We propose and demonstrate a new integrated light-emitting device array with shift register as the photo-printing light source, which can drastically decreases the number of bonding-wires and simplifies the assembly of the photo-printer head. The 62.5 mu m pitch (400DPI) and 64 bits integrated array was fabricated and its good performances, which is 10 MHz as the maximum transfer rate and 0.13% as the external quantum efficiency for light emission, are reported.<>
{"title":"64-bits integrated light-emitting device array with shift register separated self-scanning light emitting device (S-SLED)","authors":"Y. Kusuda, N. Komaba, Y. Kuroda, S. Ohno, S. Tanaka","doi":"10.1109/IEDM.1992.307393","DOIUrl":"https://doi.org/10.1109/IEDM.1992.307393","url":null,"abstract":"We propose and demonstrate a new integrated light-emitting device array with shift register as the photo-printing light source, which can drastically decreases the number of bonding-wires and simplifies the assembly of the photo-printer head. The 62.5 mu m pitch (400DPI) and 64 bits integrated array was fabricated and its good performances, which is 10 MHz as the maximum transfer rate and 0.13% as the external quantum efficiency for light emission, are reported.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125223457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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