Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735181
A. Schindler, Benno Koeppl, B. Wicht
The prevention of electromagnetic emissions (EME) in bridge applications is of major importance, especially in automotive applications. Current source gate drivers are a popular approach to improve the performance in electromagnetic compatibility (EMC). Despites, their EMC performance has rarely been investigated in detail. Starting with the differences in the gate drive transients versus a conventional hard switching driver this paper presents a study regarding the EMC behavior. Different application cases are considered: Switching time, direction of load current, different load current levels. Experimental evaluation boards were prepared for both driver methods, results are provided for various cases. In order to identify the potential of current source gate drivers, the influence of the dv/dt and di/dt at bridge output were studied based on simulation. The di/dt turned out to be more important, a 5dBμV improved EMC was achieved by extending the duration of the current slope from 82ns to 92ns. The simulation setup also allowed to analyze the turn-on and turn-off transitions separately regarding EMC. Mainly due to the reverse recovery the turn-on transition gives 10dBμV worse EMC noise compared to turn-off. As an overall result, EMC improvements due to current source gate drivers in general are very case dependent.
{"title":"EMC analysis of current source gate drivers","authors":"A. Schindler, Benno Koeppl, B. Wicht","doi":"10.1109/EMCCOMPO.2013.6735181","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735181","url":null,"abstract":"The prevention of electromagnetic emissions (EME) in bridge applications is of major importance, especially in automotive applications. Current source gate drivers are a popular approach to improve the performance in electromagnetic compatibility (EMC). Despites, their EMC performance has rarely been investigated in detail. Starting with the differences in the gate drive transients versus a conventional hard switching driver this paper presents a study regarding the EMC behavior. Different application cases are considered: Switching time, direction of load current, different load current levels. Experimental evaluation boards were prepared for both driver methods, results are provided for various cases. In order to identify the potential of current source gate drivers, the influence of the dv/dt and di/dt at bridge output were studied based on simulation. The di/dt turned out to be more important, a 5dBμV improved EMC was achieved by extending the duration of the current slope from 82ns to 92ns. The simulation setup also allowed to analyze the turn-on and turn-off transitions separately regarding EMC. Mainly due to the reverse recovery the turn-on transition gives 10dBμV worse EMC noise compared to turn-off. As an overall result, EMC improvements due to current source gate drivers in general are very case dependent.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130186630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735202
S. Bendhia, A. Boyer
EMRIC project, a new research activity mixing integrated circuits electromagnetic compatibility (EMC) and integrated circuits (ICs) reliability, provides methods and guidelines to circuits and equipment designers to ensure EMC during lifetime of their applications. In order to improve the ICs electromagnetic robustness (EMR) this project studies the effect of ICs ageing on electromagnetic emission and immunity to radio frequency interferences, clarifies the link between IC degradations and related EMC drifts and develops prediction models and propose “time insensitive” EMC protection structures.
{"title":"Electro-magnetic robustness of integrated circuits: from statement to prediction","authors":"S. Bendhia, A. Boyer","doi":"10.1109/EMCCOMPO.2013.6735202","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735202","url":null,"abstract":"EMRIC project, a new research activity mixing integrated circuits electromagnetic compatibility (EMC) and integrated circuits (ICs) reliability, provides methods and guidelines to circuits and equipment designers to ensure EMC during lifetime of their applications. In order to improve the ICs electromagnetic robustness (EMR) this project studies the effect of ICs ageing on electromagnetic emission and immunity to radio frequency interferences, clarifies the link between IC degradations and related EMC drifts and develops prediction models and propose “time insensitive” EMC protection structures.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"1995 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128186749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735209
H. Pues, Ben Brike, C. Gazda, P. Teichmann, K. Stijnen, Christian Peeters, A. Durier, D. Ginste
A method to translate immunity specifications of automotive modules into equivalent requirements at integrated circuit (IC) level, using linear scattering parameter models of the ICs, is presented. A technique is described to determine S-parameters of ICs by simulations based on back-annotated analog schematics. The simulation results are compared with measurement data obtained using a specially designed test board. As an example, simulation and measurement results are given for the input stage of an automotive sensor interface. A good agreement is obtained from the lowest test frequency up to 1 GHz. Above this value, the measured results seem to be dominated by package effects.
{"title":"Translation of automotive module RF immunity test limits into equivalent IC test limits using S-parameter IC models","authors":"H. Pues, Ben Brike, C. Gazda, P. Teichmann, K. Stijnen, Christian Peeters, A. Durier, D. Ginste","doi":"10.1109/EMCCOMPO.2013.6735209","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735209","url":null,"abstract":"A method to translate immunity specifications of automotive modules into equivalent requirements at integrated circuit (IC) level, using linear scattering parameter models of the ICs, is presented. A technique is described to determine S-parameters of ICs by simulations based on back-annotated analog schematics. The simulation results are compared with measurement data obtained using a specially designed test board. As an example, simulation and measurement results are given for the input stage of an automotive sensor interface. A good agreement is obtained from the lowest test frequency up to 1 GHz. Above this value, the measured results seem to be dominated by package effects.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"154 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123502213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735180
J. Raoult, A. Blain, S. Jarrix
This paper deals with the electromagnetic susceptibility of a fully integrated voltage controlled oscillator. Injection locking and pulling is observed when a sinusoidal interference signal is injected on the device. To improve the immunity of the circuit we propose a procedure based on an optimization of the value of some circuit features. This work is done in relation with the optimization of the functional performances.
{"title":"An optimizing technique to lower both phase noise and susceptibility of a voltage controlled oscillator","authors":"J. Raoult, A. Blain, S. Jarrix","doi":"10.1109/EMCCOMPO.2013.6735180","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735180","url":null,"abstract":"This paper deals with the electromagnetic susceptibility of a fully integrated voltage controlled oscillator. Injection locking and pulling is observed when a sinusoidal interference signal is injected on the device. To improve the immunity of the circuit we propose a procedure based on an optimization of the value of some circuit features. This work is done in relation with the optimization of the functional performances.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127414754","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735162
T. Kinoshita, Shoichi Hara, Eiji Takahashi, K. Uriu
There is a large difference between the waveforms of high speed digital signals measured on a printed circuit board and those at the receiving terminals of LSI chips. In order to ensure that the high speed digital signal is correctly transferred, one of the major issues is how to estimate the waveform at the receiving terminal, where the waveform cannot be directly measured. Therefore, we have developed a new technique for estimating the waveform at the receiving terminal from the waveform measured at an accessible test point, based on the input impedance and transmission characteristics of the traces. By comparing the estimated waveform and the measured waveform in a Blu-ray Disc recorder system, it was confirmed that it is possible to estimate the waveform with high accuracy. Furthermore, it was confirmed that the estimated waveform has good correlation with the timing margin for correct data transfer.
{"title":"A technique for estimating signal waveforms at inaccessible points in high speed digital circuits","authors":"T. Kinoshita, Shoichi Hara, Eiji Takahashi, K. Uriu","doi":"10.1109/EMCCOMPO.2013.6735162","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735162","url":null,"abstract":"There is a large difference between the waveforms of high speed digital signals measured on a printed circuit board and those at the receiving terminals of LSI chips. In order to ensure that the high speed digital signal is correctly transferred, one of the major issues is how to estimate the waveform at the receiving terminal, where the waveform cannot be directly measured. Therefore, we have developed a new technique for estimating the waveform at the receiving terminal from the waveform measured at an accessible test point, based on the input impedance and transmission characteristics of the traces. By comparing the estimated waveform and the measured waveform in a Blu-ray Disc recorder system, it was confirmed that it is possible to estimate the waveform with high accuracy. Furthermore, it was confirmed that the estimated waveform has good correlation with the timing margin for correct data transfer.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127461267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735168
A. Nakamura, Masaaki Maeda, T. Matsushima, O. Wada
Substrate noise coupling from digital circuits causes degradation of performance of analog circuits on the same LSI chip. Generally large area on the chip is necessary to reduce the substrate coupling. In this paper, a proposed method eliminates the substrate coupling by extension of the impedance balance control technique which was proposed by the authors. The impedance balance condition on the LSI chip is satisfied by tunable resistances inserted into the substrate contacts. Even if the substrate coupling between two circuits is low (for example, 70 Ω,) the substrate noise coupling was reduced enough on the condition of impedance balance.
{"title":"Substrate noise reduction based on impedance balance using tunable resistances","authors":"A. Nakamura, Masaaki Maeda, T. Matsushima, O. Wada","doi":"10.1109/EMCCOMPO.2013.6735168","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735168","url":null,"abstract":"Substrate noise coupling from digital circuits causes degradation of performance of analog circuits on the same LSI chip. Generally large area on the chip is necessary to reduce the substrate coupling. In this paper, a proposed method eliminates the substrate coupling by extension of the impedance balance control technique which was proposed by the authors. The impedance balance condition on the LSI chip is satisfied by tunable resistances inserted into the substrate contacts. Even if the substrate coupling between two circuits is low (for example, 70 Ω,) the substrate noise coupling was reduced enough on the condition of impedance balance.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"641 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132856254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735206
K. Yoshikawa, Yuji Harada, N. Miura, Noriaki Takeda, Yoshiyuki Saito, M. Nagata
Direct RF power injection on a power delivery network causes timing variations of inverter chains. The amount of period jitter in an inverter chain is strongly dominated by the frequency and amplitude of sinusoidal voltage variations on its internal power supply nodes. The conduction and conversion characteristics of the RF power from an external point of injection to the sinusoidal voltage variation on the node within a chip are modeled with a chip-package-board integrated network. The period jitter is calculated in response to the sinusoidal waveform with the voltage-dependent delay characteristics of an inverter stage. The external RF power is therefore analytically related with the period jitter of an inverter chain. Comparisons are made between the calculation and measurements for a 65 nm CMOS prototype chip featuring on-chip voltage waveform monitoring functions.
{"title":"Immunity evaluation of inverter chains against RF power on power delivery network","authors":"K. Yoshikawa, Yuji Harada, N. Miura, Noriaki Takeda, Yoshiyuki Saito, M. Nagata","doi":"10.1109/EMCCOMPO.2013.6735206","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735206","url":null,"abstract":"Direct RF power injection on a power delivery network causes timing variations of inverter chains. The amount of period jitter in an inverter chain is strongly dominated by the frequency and amplitude of sinusoidal voltage variations on its internal power supply nodes. The conduction and conversion characteristics of the RF power from an external point of injection to the sinusoidal voltage variation on the node within a chip are modeled with a chip-package-board integrated network. The period jitter is calculated in response to the sinusoidal waveform with the voltage-dependent delay characteristics of an inverter stage. The external RF power is therefore analytically related with the period jitter of an inverter chain. Comparisons are made between the calculation and measurements for a 65 nm CMOS prototype chip featuring on-chip voltage waveform monitoring functions.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"411 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133418939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735207
Bumhee Bae, Sunkyu Kong, Jonghoon J. Kim, Sukjin Kim, Joungho Kim
There are multiple electrical devices on automotive system, which are control devices, communication devices, and digital devices. Each electrical device can generate magnetic field, one of the critical radiated electro-magnetic interference (EMI) elements. The operating frequency of each device is different and it means that the bandwidth of magnetic field is wide. Therefore, the strong magnetic fields can degrade the performance of diverse semiconductor systems in automotive applications, but it is not well discussed yet, even though the malfunction of electrical devices on automotive system is related to safe issues. So, we focus on strong magnetic field effects of semiconductor system. Among strong magnetic field source, we targeted wireless power transfer (WPT) system, which is spotlighted and promising technology for automotive and mobile charging system and significant magnetic field source. Furthermore, we choose analog-to-digital converter (ADC), sensitive to external noise and critical system involved in control devices related to the safety issues of automobile, as a targeted semiconductor system. In this paper, we discuss the magnetic coupling path and describe how to estimate the magnetic field effects on ADC with WPT. To estimate and analyze the targeted effects on ADC, we designed the ADC using a 0.13um CMOS process and WPT system using printed circuit board (PCB). Consequently, the magnetic field couples to ADC system, and there are three methods to estimate performance degradation of ADC by magnetic field effects, one is modeling, another is simulation, and the other is measurement.
{"title":"Magnetic field coupling on analog-to-digital converter from wireless power transfer system in automotive environment","authors":"Bumhee Bae, Sunkyu Kong, Jonghoon J. Kim, Sukjin Kim, Joungho Kim","doi":"10.1109/EMCCOMPO.2013.6735207","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735207","url":null,"abstract":"There are multiple electrical devices on automotive system, which are control devices, communication devices, and digital devices. Each electrical device can generate magnetic field, one of the critical radiated electro-magnetic interference (EMI) elements. The operating frequency of each device is different and it means that the bandwidth of magnetic field is wide. Therefore, the strong magnetic fields can degrade the performance of diverse semiconductor systems in automotive applications, but it is not well discussed yet, even though the malfunction of electrical devices on automotive system is related to safe issues. So, we focus on strong magnetic field effects of semiconductor system. Among strong magnetic field source, we targeted wireless power transfer (WPT) system, which is spotlighted and promising technology for automotive and mobile charging system and significant magnetic field source. Furthermore, we choose analog-to-digital converter (ADC), sensitive to external noise and critical system involved in control devices related to the safety issues of automobile, as a targeted semiconductor system. In this paper, we discuss the magnetic coupling path and describe how to estimate the magnetic field effects on ADC with WPT. To estimate and analyze the targeted effects on ADC, we designed the ADC using a 0.13um CMOS process and WPT system using printed circuit board (PCB). Consequently, the magnetic field couples to ADC system, and there are three methods to estimate performance degradation of ADC by magnetic field effects, one is modeling, another is simulation, and the other is measurement.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"41 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122341312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735182
Philipp Schroeter, S. Jahn, F. Klotz, Fabio Ballarin, F. Gini, M. Piselli
This paper introduces a low dropout (LDO) voltage regulator with an integrated current monitor, which sets a new performance benchmark in terms of RF immunity. Compared to classic topologies the proposed circuit succeeds in a very high robustness against RF disturbances which are superimposed into the regulator's battery voltage (VS) pin and output (OUT) pin. The proposed circuit was designed using a HV-BiCMOS technology for automotive applications. Circuit theory is explained in detail and the proposed approach is confirmed by RF immunity measurements.
{"title":"EMI resisting LDO voltage regulator with integrated current monitor","authors":"Philipp Schroeter, S. Jahn, F. Klotz, Fabio Ballarin, F. Gini, M. Piselli","doi":"10.1109/EMCCOMPO.2013.6735182","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735182","url":null,"abstract":"This paper introduces a low dropout (LDO) voltage regulator with an integrated current monitor, which sets a new performance benchmark in terms of RF immunity. Compared to classic topologies the proposed circuit succeeds in a very high robustness against RF disturbances which are superimposed into the regulator's battery voltage (VS) pin and output (OUT) pin. The proposed circuit was designed using a HV-BiCMOS technology for automotive applications. Circuit theory is explained in detail and the proposed approach is confirmed by RF immunity measurements.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126887467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735191
A. Durier, C. Marot, O. Crépel
DC/DC Boost Converters are commonly used in the electronics industry to provide a raised voltage to a specific function. These converters are constituted by a basic commutation cell (Inductor-MOS transistor-diode-capacitor) managed by an integrated circuit realizing voltage and current control typically running between 100 and 500 kHz. This control's frequency creates high conducted Electromagnetic noise which could cause troubles on the supply network. We propose to use a SPICE modeling to estimate the conducted noise on supply network during CISPR 25 CE measurements. Then, we will intend to build an EBEM-CE model of the converter from these measurements.
{"title":"Using the EM simulation tools to predict the Conducted Emissions level of a DC/DC boost converter: Introducing EBEM-CE model","authors":"A. Durier, C. Marot, O. Crépel","doi":"10.1109/EMCCOMPO.2013.6735191","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735191","url":null,"abstract":"DC/DC Boost Converters are commonly used in the electronics industry to provide a raised voltage to a specific function. These converters are constituted by a basic commutation cell (Inductor-MOS transistor-diode-capacitor) managed by an integrated circuit realizing voltage and current control typically running between 100 and 500 kHz. This control's frequency creates high conducted Electromagnetic noise which could cause troubles on the supply network. We propose to use a SPICE modeling to estimate the conducted noise on supply network during CISPR 25 CE measurements. Then, we will intend to build an EBEM-CE model of the converter from these measurements.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130017669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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