Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735164
E. Sicard, Jianfei Wu, Jiancheng Li
In this paper, the signal integrity (SI) and Electromagnetic Compatibility (EMC) performance of a microcontroller and memory are simulated in 2D and 3D assembly versions. Three types of configurations are investigated: conventional 2D routing on printed-circuit-board, stacked dies with wire bonding and stacked dies with Through-Silicon-Via (TSV). The study addresses signal integrity of the memory bus and the conducted emission of the microcontroller. An equivalent bus model is presented for order reduction and improved simulation efficiency. The benefits of 3D integration are highlighted, in terms of improved eye diagram and one decade reduction in parasitic emission.
{"title":"Signal integrity and EMC performance enhancement using 3D integrated circuits - A case study","authors":"E. Sicard, Jianfei Wu, Jiancheng Li","doi":"10.1109/EMCCOMPO.2013.6735164","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735164","url":null,"abstract":"In this paper, the signal integrity (SI) and Electromagnetic Compatibility (EMC) performance of a microcontroller and memory are simulated in 2D and 3D assembly versions. Three types of configurations are investigated: conventional 2D routing on printed-circuit-board, stacked dies with wire bonding and stacked dies with Through-Silicon-Via (TSV). The study addresses signal integrity of the memory bus and the conducted emission of the microcontroller. An equivalent bus model is presented for order reduction and improved simulation efficiency. The benefits of 3D integration are highlighted, in terms of improved eye diagram and one decade reduction in parasitic emission.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114366619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735200
T. Steinecke, M. Unger, Stanislav Scheier, S. Frei, Josip Bačmaga, A. Barić
Although microcontrollers are generally well separated from ESD events happening on a fully equipped and mounted electronic control unit, special configurations expose some microcontrollers to these system-ESD events. In the BISS IC EMC Test Specification [1], several system-level disturbance tests are referenced. One of them is the unpowered system-ESD test according to the international standard ISO 10506 [2]. Automotive companies request that microcontrollers and other ICs shall withstand e.g. 6 kV system-ESD stress applied to IC-pins either directly or via discrete protection components. This paper describes the experience made with a 65 nm CMOS 32-bit microcontroller including an external ESD protection filter when exposed to normative system-ESD pulses. Although not expected, discrete SMD protection capacitors degraded or even showed short-circuits after being exposed to several ESD events.
虽然微控制器通常与发生在完整装备和安装的电子控制单元上的ESD事件分离得很好，但特殊配置会使一些微控制器暴露在这些系统ESD事件中。在bis IC EMC测试规范[1]中，引用了几个系统级干扰测试。其中一种是根据国际标准ISO 10506[2]进行的无电系统esd测试。汽车公司要求微控制器和其他ic能够承受直接或通过分立保护元件施加在ic引脚上的6 kV系统esd应力。本文介绍了65纳米CMOS 32位微控制器在暴露于标准系统ESD脉冲时的经验，该微控制器包含一个外部ESD保护滤波器。虽然没有预料到，但离散SMD保护电容器在暴露于几个ESD事件后会退化甚至出现短路。
{"title":"System-ESD validation of a microcontroller with external RC-filter","authors":"T. Steinecke, M. Unger, Stanislav Scheier, S. Frei, Josip Bačmaga, A. Barić","doi":"10.1109/EMCCOMPO.2013.6735200","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735200","url":null,"abstract":"Although microcontrollers are generally well separated from ESD events happening on a fully equipped and mounted electronic control unit, special configurations expose some microcontrollers to these system-ESD events. In the BISS IC EMC Test Specification [1], several system-level disturbance tests are referenced. One of them is the unpowered system-ESD test according to the international standard ISO 10506 [2]. Automotive companies request that microcontrollers and other ICs shall withstand e.g. 6 kV system-ESD stress applied to IC-pins either directly or via discrete protection components. This paper describes the experience made with a 65 nm CMOS 32-bit microcontroller including an external ESD protection filter when exposed to normative system-ESD pulses. Although not expected, discrete SMD protection capacitors degraded or even showed short-circuits after being exposed to several ESD events.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116506914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735176
L. Guibert, P. Millot, X. Ferrières, E. Sicard
In this paper, we are interested in measuring the level of immunity of the radiated mode of an electronic system. The behavior of this system has been studied in a Mode Stirrer Reverberating Chamber (MSRC). Nowadays, many equipment manufacturers use the MSRC as a measurement facility to describe their electronic systems in the field of EMC. In the first part, we present the use of the MSRC for measuring EMC susceptibility. Then we present the electronic system under test (DUT) and the method allows us to characterize the functional electronic behavior. In a second part, we present a novel method that allows on the one hand measurement the level of immunity and on the other hand derivation of a model of the level of immunity of the electronic system studied.
{"title":"Study of radiated immunity of an electronic system in a reverberating chamber","authors":"L. Guibert, P. Millot, X. Ferrières, E. Sicard","doi":"10.1109/EMCCOMPO.2013.6735176","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735176","url":null,"abstract":"In this paper, we are interested in measuring the level of immunity of the radiated mode of an electronic system. The behavior of this system has been studied in a Mode Stirrer Reverberating Chamber (MSRC). Nowadays, many equipment manufacturers use the MSRC as a measurement facility to describe their electronic systems in the field of EMC. In the first part, we present the use of the MSRC for measuring EMC susceptibility. Then we present the electronic system under test (DUT) and the method allows us to characterize the functional electronic behavior. In a second part, we present a novel method that allows on the one hand measurement the level of immunity and on the other hand derivation of a model of the level of immunity of the electronic system studied.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"77 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134426875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735197
T. Steinecke
Various approaches exist to build simulation models for the electromagnetic emission (EME) of digital integrated circuits [1-6]. However, several drawbacks constrain their configuration and usage. A new modelling approach is described in this paper. It is based on the main EME-relevant parameters of digital circuits, i.e. dynamic power and clock rates. This information should be even available before the IC design phase starts. With this approach, the models can be created without any additional information about module size, functional patterns or embedded decoupling capacitors. Thus it can be used to perform design studies wrt. clock rate selection, clock modulation and impact of dynamic power consumption. The modelling and simulation software can even handle very complex ICs like high-end 32-bit microcontrollers. The program is named EMISoC which stands for “EMI simulation of systems-on-chip”. It has been validated for existing 65 nm CMOS designs and is currently used for emission estimations of future 40 nm microcontrollers for automotive applications. This paper describes the EMISoC modelling approach, features and limitations.
{"title":"Microcontroller emission simulation based on power consumption and clock system","authors":"T. Steinecke","doi":"10.1109/EMCCOMPO.2013.6735197","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735197","url":null,"abstract":"Various approaches exist to build simulation models for the electromagnetic emission (EME) of digital integrated circuits [1-6]. However, several drawbacks constrain their configuration and usage. A new modelling approach is described in this paper. It is based on the main EME-relevant parameters of digital circuits, i.e. dynamic power and clock rates. This information should be even available before the IC design phase starts. With this approach, the models can be created without any additional information about module size, functional patterns or embedded decoupling capacitors. Thus it can be used to perform design studies wrt. clock rate selection, clock modulation and impact of dynamic power consumption. The modelling and simulation software can even handle very complex ICs like high-end 32-bit microcontrollers. The program is named EMISoC which stands for “EMI simulation of systems-on-chip”. It has been validated for existing 65 nm CMOS designs and is currently used for emission estimations of future 40 nm microcontrollers for automotive applications. This paper describes the EMISoC modelling approach, features and limitations.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123992005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735205
Akitaka Murata, Shuji Agatsuma, D. Ikoma, K. Ichikawa, T. Tsuda, M. Nagata, K. Yoshikawa, Y. Araga, Yuji Harada
In this paper, the susceptibility of a CMOS bandgap voltage reference (BGR) to external noise was investigated using an on-chip waveform monitor circuit in conjunction with circuit simulations. A Direct RF Power Injection method was employed for the immunity test of the BGR. Also, we evaluated the performance of the on-chip waveform monitor and analyze the BGR immunity using the on-chip monitor. As the results, we have clarified the mechanism of the BGR malfunction. The output voltage drop of the BGR was caused by the offset of operational amplifier in BGR.
{"title":"Noise analysis using on-chip waveform monitor in bandgap voltage references","authors":"Akitaka Murata, Shuji Agatsuma, D. Ikoma, K. Ichikawa, T. Tsuda, M. Nagata, K. Yoshikawa, Y. Araga, Yuji Harada","doi":"10.1109/EMCCOMPO.2013.6735205","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735205","url":null,"abstract":"In this paper, the susceptibility of a CMOS bandgap voltage reference (BGR) to external noise was investigated using an on-chip waveform monitor circuit in conjunction with circuit simulations. A Direct RF Power Injection method was employed for the immunity test of the BGR. Also, we evaluated the performance of the on-chip waveform monitor and analyze the BGR immunity using the on-chip monitor. As the results, we have clarified the mechanism of the BGR malfunction. The output voltage drop of the BGR was caused by the offset of operational amplifier in BGR.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115722343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735201
B. Vrignon, P. Caunegre, J. Shepherd, Jianfei Wu
Immunity of analog circuit blocks is becoming a major design risk. This paper presents an automated methodology to simulate the susceptibility of a circuit during the design phase. More specifically, we propose a CAD tool which determines the fail/pass criteria of a signal under direct power injection (DPI). This contribution describes the function of the tool which is validated by a LDO regulator.
{"title":"Automatic verification of EMC immunity by simulation","authors":"B. Vrignon, P. Caunegre, J. Shepherd, Jianfei Wu","doi":"10.1109/EMCCOMPO.2013.6735201","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735201","url":null,"abstract":"Immunity of analog circuit blocks is becoming a major design risk. This paper presents an automated methodology to simulate the susceptibility of a circuit during the design phase. More specifically, we propose a CAD tool which determines the fail/pass criteria of a signal under direct power injection (DPI). This contribution describes the function of the tool which is validated by a LDO regulator.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"198200 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132642476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735172
S. Hairoud, T. Dubois, A. Tetelin, G. Duchamp
This paper presents an application of the ICIM-CI model to the prediction of the susceptibility of ICs (Integrated Circuits) to environmental disturbances in avionic boards. The method is illustrated by the obsolescence study of three commercial operational amplifiers (Op-Amps) showing quasi-identical electrical characteristics and pin-to-pin compatibility, through the comparison of their respective conducted immunities. The model is developed in VHDL-AMS language, and the simulation results are validated through comparison with Direct Power Injection measurements.
{"title":"Conducted immunity of three Op-Amps using the DPI measurement technique and VHDL-AMS modeling","authors":"S. Hairoud, T. Dubois, A. Tetelin, G. Duchamp","doi":"10.1109/EMCCOMPO.2013.6735172","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735172","url":null,"abstract":"This paper presents an application of the ICIM-CI model to the prediction of the susceptibility of ICs (Integrated Circuits) to environmental disturbances in avionic boards. The method is illustrated by the obsolescence study of three commercial operational amplifiers (Op-Amps) showing quasi-identical electrical characteristics and pin-to-pin compatibility, through the comparison of their respective conducted immunities. The model is developed in VHDL-AMS language, and the simulation results are validated through comparison with Direct Power Injection measurements.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127037436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735167
R. Gillon, N. Bako, A. Barić
The differential and common-mode signals across the TEM-cell ports are known to be correlated with magnetic and electric dipoles respectively. Historically, the absence of phase information in the measurements complicated the identification procedure for radiating moments. Using a phase-calibrated scope, this paper demonstrates a broadband and effective method for the extraction of radiating moments.
{"title":"Broadband detection of radiating moments using the TEM-cell and a phase-calibrated oscilloscope","authors":"R. Gillon, N. Bako, A. Barić","doi":"10.1109/EMCCOMPO.2013.6735167","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735167","url":null,"abstract":"The differential and common-mode signals across the TEM-cell ports are known to be correlated with magnetic and electric dipoles respectively. Historically, the absence of phase information in the measurements complicated the identification procedure for radiating moments. Using a phase-calibrated scope, this paper demonstrates a broadband and effective method for the extraction of radiating moments.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122936350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735203
Hermann Nzalli, W. Wilkening, R. Jansen
The Direct Power Injection (DPI) standard, widely used for the susceptibility analysis of integrated circuits (IC), specifies an ideal 50Ω-environment for the investigations. This constant load assumption does not fully cover latter stages or the IC final operating environment, where ICs are subjected to various load impedances, especially at pins which are connected to wiring harnesses. We present variable-load DPI measurements and large-signal simulations for new circuit blocks, namely a simplified high-side driver and an ESD structure. The results extend the applicability of small-signal simplification methods beyond a low-side driver formerly reported by the same authors.
{"title":"EMC immunity of integrated smart power transistors in a non-50Ω environment","authors":"Hermann Nzalli, W. Wilkening, R. Jansen","doi":"10.1109/EMCCOMPO.2013.6735203","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735203","url":null,"abstract":"The Direct Power Injection (DPI) standard, widely used for the susceptibility analysis of integrated circuits (IC), specifies an ideal 50Ω-environment for the investigations. This constant load assumption does not fully cover latter stages or the IC final operating environment, where ICs are subjected to various load impedances, especially at pins which are connected to wiring harnesses. We present variable-load DPI measurements and large-signal simulations for new circuit blocks, namely a simplified high-side driver and an ESD structure. The results extend the applicability of small-signal simplification methods beyond a low-side driver formerly reported by the same authors.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114523645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/EMCCOMPO.2013.6735185
B. Deutschmann
Spread spectrum clock generation (SSCG) techniques are widely used in digital systems as the digital clock signals are considered as one of the major sources for conducted and radiated electromagnetic emission. Although spread spectrum techniques can nowadays be found in many clocked digital system, they are rarely found in clock signals for automotive power systems such as power switches or bridges. In this paper the ability of using SSCG techniques for automotive charge pump applications is investigated. It is shown how this technique can be used to reduce the electromagnetic emission that is caused by the high frequency switching activity of charge pumps. Additionally the assets and drawbacks when using this technique are explained. Based on conducted electromagnetic emission measurements of a charge pump EMC test chip it is shown how typical spread spectrum parameters like frequency deviation, modulation frequency and modulation signal can be optimized in order to maximize the electromagnetic emission reduction in certain frequency ranges.
{"title":"Spread spectrum clocking for emission reduction of charge pump applications","authors":"B. Deutschmann","doi":"10.1109/EMCCOMPO.2013.6735185","DOIUrl":"https://doi.org/10.1109/EMCCOMPO.2013.6735185","url":null,"abstract":"Spread spectrum clock generation (SSCG) techniques are widely used in digital systems as the digital clock signals are considered as one of the major sources for conducted and radiated electromagnetic emission. Although spread spectrum techniques can nowadays be found in many clocked digital system, they are rarely found in clock signals for automotive power systems such as power switches or bridges. In this paper the ability of using SSCG techniques for automotive charge pump applications is investigated. It is shown how this technique can be used to reduce the electromagnetic emission that is caused by the high frequency switching activity of charge pumps. Additionally the assets and drawbacks when using this technique are explained. Based on conducted electromagnetic emission measurements of a charge pump EMC test chip it is shown how typical spread spectrum parameters like frequency deviation, modulation frequency and modulation signal can be optimized in order to maximize the electromagnetic emission reduction in certain frequency ranges.","PeriodicalId":302757,"journal":{"name":"2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115188050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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