Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636994
M. Biedenbender, R. Lai, J. Lee, S. Chen, K. Tan, P. Liu, A. Freudenthal, D. Streit, B. Allen, H. Wang
We have developed a W-band HEMT MMIC process which has demonstrated reproducible high performance for both low noise and power amplifier designs. This paper presents the details of the fabrication process as well as device and circuit results from 69 wafers. Three-stage LNAs have demonstrated noise figure as low as 4.4 dB with gains as high as 27 dB from 92 to 96 GHz. The LNA RF lot yield was as high as 78%. The same process has demonstrated power amplifiers with output power of 19 dBm at 94 GHz, with RF yield of 37%.
{"title":"A 0.1 /spl mu/m W-band HEMT production process for high yield and high performance low noise and power MMICs","authors":"M. Biedenbender, R. Lai, J. Lee, S. Chen, K. Tan, P. Liu, A. Freudenthal, D. Streit, B. Allen, H. Wang","doi":"10.1109/GAAS.1994.636994","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636994","url":null,"abstract":"We have developed a W-band HEMT MMIC process which has demonstrated reproducible high performance for both low noise and power amplifier designs. This paper presents the details of the fabrication process as well as device and circuit results from 69 wafers. Three-stage LNAs have demonstrated noise figure as low as 4.4 dB with gains as high as 27 dB from 92 to 96 GHz. The LNA RF lot yield was as high as 78%. The same process has demonstrated power amplifiers with output power of 19 dBm at 94 GHz, with RF yield of 37%.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"183 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133682165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636939
J. Sarkissian, M. Camiade, P. Savary, A. Suárez, R. Quéré, J. Obregon
Monolithic technologies on GaAs allow us to build complex non-linear circuits at very high frequencies. However accurate predictions of circuit performances can be obtained only if non-linear CAD tools are available. A new method has been proposed allowing to overcome the difficulties encountered with commercial CAD software packages when we want to simulate synchronized circuits. For the first time a 60/30 GHz MMIC analog frequency divider has been designed and processed with a 0.25/spl mu/m HEMT process at the THOMSON-CSF foundry. The results obtained are very close to the predicted performances and allow us to think that broadband analog frequency dividers may now be designed at higher frequencies.
{"title":"A 60 GHz HEMT-MMIC analog frequency divider by two","authors":"J. Sarkissian, M. Camiade, P. Savary, A. Suárez, R. Quéré, J. Obregon","doi":"10.1109/GAAS.1994.636939","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636939","url":null,"abstract":"Monolithic technologies on GaAs allow us to build complex non-linear circuits at very high frequencies. However accurate predictions of circuit performances can be obtained only if non-linear CAD tools are available. A new method has been proposed allowing to overcome the difficulties encountered with commercial CAD software packages when we want to simulate synchronized circuits. For the first time a 60/30 GHz MMIC analog frequency divider has been designed and processed with a 0.25/spl mu/m HEMT process at the THOMSON-CSF foundry. The results obtained are very close to the predicted performances and allow us to think that broadband analog frequency dividers may now be designed at higher frequencies.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127944113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636971
J. Sauerer, F. Oehler, G. Rohmer, U. Schlag
Analog to Digital Converters (ADCs) are the key components at the border between the analog and digital world. They put the most stringent requirements on technology in terms of speed, integration density and matching. The impact of different types of system applications on the ADCs' key performance data will be described. Different ADC architectures for a wide range of resolution and sampling rates will be presented as well as their performance limiting constraints. A few examples of implementation in GaAs technologies are shown to derive the technological requirements necessary for being a good candidate for ADCs.
{"title":"GaAs for ADCs: system needs and device requirements","authors":"J. Sauerer, F. Oehler, G. Rohmer, U. Schlag","doi":"10.1109/GAAS.1994.636971","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636971","url":null,"abstract":"Analog to Digital Converters (ADCs) are the key components at the border between the analog and digital world. They put the most stringent requirements on technology in terms of speed, integration density and matching. The impact of different types of system applications on the ADCs' key performance data will be described. Different ADC architectures for a wide range of resolution and sampling rates will be presented as well as their performance limiting constraints. A few examples of implementation in GaAs technologies are shown to derive the technological requirements necessary for being a good candidate for ADCs.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"197 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124415043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636956
L. M. Burns
Emerging applications for portable wireless voice and data communications systems are requiring increased data rates and functionality. Meeting cost and performance goals requires careful attention to system level design and partitioning such that appropriate technologies are employed in cost-effective solutions. New circuit designs and techniques are required to meet size, power, and regulatory restrictions. This provides an exciting opportunity for GaAs, silicon and other technologies. This paper will present several system level architectures for present and proposed radio-based communication systems. The paper will address requirements driving the technologies and appropriate applications of GaAs and silicon integrated circuit technologies.
{"title":"Applications for GaAs and silicon ICs in next generation wireless communication systems","authors":"L. M. Burns","doi":"10.1109/GAAS.1994.636956","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636956","url":null,"abstract":"Emerging applications for portable wireless voice and data communications systems are requiring increased data rates and functionality. Meeting cost and performance goals requires careful attention to system level design and partitioning such that appropriate technologies are employed in cost-effective solutions. New circuit designs and techniques are required to meet size, power, and regulatory restrictions. This provides an exciting opportunity for GaAs, silicon and other technologies. This paper will present several system level architectures for present and proposed radio-based communication systems. The paper will address requirements driving the technologies and appropriate applications of GaAs and silicon integrated circuit technologies.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126464226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636980
Y. Tkachenko, Y. Lan, D. Whitefield, C. Wei, J.C.M. Hwang, T. Harris, R. Grober, D. Hwang, L. Aucoin, S. Shanfield
Hot-electron trapping in the SiN passivation was found to be a cause for gradual degradation during RF operation of metal-semiconductor field-effect transistors. The time dependence and threshold energy for trap formation was determined by dc and electroluminescence tests. The spatial distribution of trapped electrons was directly observed by a novel high-voltage electron-beam-induced-current imaging technique. Argument was also made for trapping in the SiN instead of at the GaAs/SiN interface.
{"title":"Hot-electron-induced degradation of metal-semiconductor field-effect transistors","authors":"Y. Tkachenko, Y. Lan, D. Whitefield, C. Wei, J.C.M. Hwang, T. Harris, R. Grober, D. Hwang, L. Aucoin, S. Shanfield","doi":"10.1109/GAAS.1994.636980","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636980","url":null,"abstract":"Hot-electron trapping in the SiN passivation was found to be a cause for gradual degradation during RF operation of metal-semiconductor field-effect transistors. The time dependence and threshold energy for trap formation was determined by dc and electroluminescence tests. The spatial distribution of trapped electrons was directly observed by a novel high-voltage electron-beam-induced-current imaging technique. Argument was also made for trapping in the SiN instead of at the GaAs/SiN interface.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126548707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636977
W. Hu, E.P. Parks, T. Yu, P. Chao, A. Swanson
Degradation of PHEMTs by hydrogen was verified by DC life tests in the hermetic packages and in the forming gases containing different hydrogen concentrations. We have found that a hydrogen partial pressure in the order of 2 torr will cause Ids change by 20% in about 800 hours at 125/spl deg/C and about 300 hours at 150/spl deg/C. The signature of hydrogen degradation is a sudden and significant drain current degradation followed by some recovery. It appeared that the degradation is both temperature and H/sub 2/ partial pressure dependent. Failure analysis indicates that the degradation is localized under the gate and that the major failure mechanism is due to the effective gate voltage being modified negatively by the atomic hydrogen.
{"title":"Reliability of GaAs PHEMT under hydrogen containing atmosphere","authors":"W. Hu, E.P. Parks, T. Yu, P. Chao, A. Swanson","doi":"10.1109/GAAS.1994.636977","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636977","url":null,"abstract":"Degradation of PHEMTs by hydrogen was verified by DC life tests in the hermetic packages and in the forming gases containing different hydrogen concentrations. We have found that a hydrogen partial pressure in the order of 2 torr will cause Ids change by 20% in about 800 hours at 125/spl deg/C and about 300 hours at 150/spl deg/C. The signature of hydrogen degradation is a sudden and significant drain current degradation followed by some recovery. It appeared that the degradation is both temperature and H/sub 2/ partial pressure dependent. Failure analysis indicates that the degradation is localized under the gate and that the major failure mechanism is due to the effective gate voltage being modified negatively by the atomic hydrogen.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126678597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-01DOI: 10.1109/GAAS.1994.636967
K. Lear
Market consideration motivate optoelectronic integrated circuits for highly parallel intrasystem optical buses. Surface normal device technology is well suited for these applications. System examples highlight device technology issues.
{"title":"Technologies for highly parallel optoelectronic integrated circuits","authors":"K. Lear","doi":"10.1109/GAAS.1994.636967","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636967","url":null,"abstract":"Market consideration motivate optoelectronic integrated circuits for highly parallel intrasystem optical buses. Surface normal device technology is well suited for these applications. System examples highlight device technology issues.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"130 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133538875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-09-01DOI: 10.1109/GAAS.1994.636920
A. Baca, J. Zolper, M. Sherwin, P. Robertson, R. Shul, A. J. Howard, D. Rieger, J. Klem
The first circuit results for a new GaAs complementary logic technology are presented. The technology allows for independently optimizable p- and nchannel transistors with junction gates. Excellent loaded gate delays of 179 ps at 1.2 V and 319 ps at 0.8 V have been demonstrated at low power supply voltages. A power-delay product of 8.9 fJ was obtained at 0.8 V.
{"title":"Complementary GaAs junction-gated heterostructure field effect transistor technology","authors":"A. Baca, J. Zolper, M. Sherwin, P. Robertson, R. Shul, A. J. Howard, D. Rieger, J. Klem","doi":"10.1109/GAAS.1994.636920","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636920","url":null,"abstract":"The first circuit results for a new GaAs complementary logic technology are presented. The technology allows for independently optimizable p- and nchannel transistors with junction gates. Excellent loaded gate delays of 179 ps at 1.2 V and 319 ps at 0.8 V have been demonstrated at low power supply voltages. A power-delay product of 8.9 fJ was obtained at 0.8 V.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131563723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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