Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636931
K. Chang, H. Wang, G. Dow, M. Biedenbender, T. Chen, D. Lo, B. Allen
This paper reports the first W-band monolithic single sideband FMCW transceiver with direct digital synthesizer modulation. This heterodyne transceiver improves the system sensitivity over the previously reported homodyne approach. The complete transceiver has better than 12-dB suppression of the image sideband with a nominal LO drive of 9 dBm and is estimated to exhibit a 11-dB noise figure for IF as low as 1 MHz. This MMIC chip was fabricated using TRW production line process and is suitable for automotive radar applications.
{"title":"W-band monolithic single sideband transceiver for automotive radar applications","authors":"K. Chang, H. Wang, G. Dow, M. Biedenbender, T. Chen, D. Lo, B. Allen","doi":"10.1109/GAAS.1994.636931","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636931","url":null,"abstract":"This paper reports the first W-band monolithic single sideband FMCW transceiver with direct digital synthesizer modulation. This heterodyne transceiver improves the system sensitivity over the previously reported homodyne approach. The complete transceiver has better than 12-dB suppression of the image sideband with a nominal LO drive of 9 dBm and is estimated to exhibit a 11-dB noise figure for IF as low as 1 MHz. This MMIC chip was fabricated using TRW production line process and is suitable for automotive radar applications.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"57 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126389718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636906
H. Goronkin, S. Tehrani, J. Shen, G. Kramer, R. Tsui
Barriers to traditional scaling in silicon technology, primarily gate tunneling leakage current and drain-induced barrier lowering, will begin to emerge with the 1 Gb DRAM. Further scaling will involve performance fall-offs as critical dimensions are relaxed in order to reduce leakage currents. Compound semiconductor HFETs will suffer similar scaling penalties. Thin film SOI can extend silicon scaling by two or three generations. However, by the year 2000, a new technology will be necessary to continue the performance trend. That technology will likely utilize quantum effects to increase the functionality of individual electronic devices. The barriers to scaling MOSFETs and HFETs as well as examples of worldwide progress in developing quantum-based technology for future ULSI applications operating at room temperature are discussed.
{"title":"Progress in quantum functional devices to overcome barriers to ULSI scaling","authors":"H. Goronkin, S. Tehrani, J. Shen, G. Kramer, R. Tsui","doi":"10.1109/GAAS.1994.636906","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636906","url":null,"abstract":"Barriers to traditional scaling in silicon technology, primarily gate tunneling leakage current and drain-induced barrier lowering, will begin to emerge with the 1 Gb DRAM. Further scaling will involve performance fall-offs as critical dimensions are relaxed in order to reduce leakage currents. Compound semiconductor HFETs will suffer similar scaling penalties. Thin film SOI can extend silicon scaling by two or three generations. However, by the year 2000, a new technology will be necessary to continue the performance trend. That technology will likely utilize quantum effects to increase the functionality of individual electronic devices. The barriers to scaling MOSFETs and HFETs as well as examples of worldwide progress in developing quantum-based technology for future ULSI applications operating at room temperature are discussed.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"2154 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130031672","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636908
J.M.C. Storkl, D. Harame, B. Meyerson
Summary form only given. Reviews the short but successful history of SiGe HBTs, from the first functionality demonstration in 1987 to the performance of a 1 GHz, 12-bit DAC in 1993. Availability of 60 GHz Fmax bipolar devices in a fully integrated 0.5/0.25 um BiCMOS process, allows high performance mixed signal applications to be implemented in Si technology, achieving unmatched performance and functionality. The intrinsic performance of SiGe transistors has been extended to 115 GHz fT with an Early voltage of 110 V, demonstrating the potential for microwave analog applications.
{"title":"GaAs performance in Si technology: SiGe HBTs for mixed analog-digital applications","authors":"J.M.C. Storkl, D. Harame, B. Meyerson","doi":"10.1109/GAAS.1994.636908","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636908","url":null,"abstract":"Summary form only given. Reviews the short but successful history of SiGe HBTs, from the first functionality demonstration in 1987 to the performance of a 1 GHz, 12-bit DAC in 1993. Availability of 60 GHz Fmax bipolar devices in a fully integrated 0.5/0.25 um BiCMOS process, allows high performance mixed signal applications to be implemented in Si technology, achieving unmatched performance and functionality. The intrinsic performance of SiGe transistors has been extended to 115 GHz fT with an Early voltage of 110 V, demonstrating the potential for microwave analog applications.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124877419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636936
Shunji Kimura, Yuhki Ima, Y. Umeda, T. Enoki
This paper reports an InAlAs/InGaAs HEMT distributed baseband amplifier IC using a new loss compensation technique for the drain artificial line. The amplifier has a gain of 16 dB with a DC-to-47-GHz bandwidth. The Gain BandWidth Product (GBWF) is about 300 GHz, which is the highest among all reported single-stage distributed amplifier ICs. It also has a flat gain from DC and operates as a baseband amplifier without any off-chip components.
{"title":"A 16-dB DC-to-50-GHz InAlAs/InGaAs HEMT distributed baseband amplifier using a new loss compensation technique","authors":"Shunji Kimura, Yuhki Ima, Y. Umeda, T. Enoki","doi":"10.1109/GAAS.1994.636936","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636936","url":null,"abstract":"This paper reports an InAlAs/InGaAs HEMT distributed baseband amplifier IC using a new loss compensation technique for the drain artificial line. The amplifier has a gain of 16 dB with a DC-to-47-GHz bandwidth. The Gain BandWidth Product (GBWF) is about 300 GHz, which is the highest among all reported single-stage distributed amplifier ICs. It also has a flat gain from DC and operates as a baseband amplifier without any off-chip components.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126567491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636987
J. Komiak, L.W. Yang
The design and performance of Heterojunction Bipolar Transistor MMIC power amplifiers that have demonstrated two-tone CW 1.6 watt and 5 watt power levels, with 35% power-added efficiency, and low intermodulation distortion (29 dBc at 5 dB back-off from 2 dB gain compression), are described. This is the first reported linearity performance on HBT MMIC amplifiers with characteristics comparable to the best reported results for discrete hybrid MESFET, PHEMT, and HBT amplifiers.
{"title":"Highly linear efficient HBT MMIC power amplifiers","authors":"J. Komiak, L.W. Yang","doi":"10.1109/GAAS.1994.636987","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636987","url":null,"abstract":"The design and performance of Heterojunction Bipolar Transistor MMIC power amplifiers that have demonstrated two-tone CW 1.6 watt and 5 watt power levels, with 35% power-added efficiency, and low intermodulation distortion (29 dBc at 5 dB back-off from 2 dB gain compression), are described. This is the first reported linearity performance on HBT MMIC amplifiers with characteristics comparable to the best reported results for discrete hybrid MESFET, PHEMT, and HBT amplifiers.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132852772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636993
L. Studebaker
The number of options for performing sub-0.2 um GaAs FET gate lithography has expanded recently to include shaped-beam e-beam systems, prototype X-ray steppers and optical steppers using phase-shift mask (PSM) technology. An overview of the alternatives is presented which may aid in selection of the "best" technology option for a given application.
{"title":"Sub-0.2 micron gate lithography using E-beam, X-ray and optical technologies-an overview","authors":"L. Studebaker","doi":"10.1109/GAAS.1994.636993","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636993","url":null,"abstract":"The number of options for performing sub-0.2 um GaAs FET gate lithography has expanded recently to include shaped-beam e-beam systems, prototype X-ray steppers and optical steppers using phase-shift mask (PSM) technology. An overview of the alternatives is presented which may aid in selection of the \"best\" technology option for a given application.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121352849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636986
R.S. Brozovich, D. Helms, L.W. Yang, J. Komiak
A Martin Marietta Laboratory heterojunction bipolar transistor, which was fabricated using a base-emitter realigned process to reduce surface recombination, has been load pulled to demonstrate that it is simultaneously highly linear and efficient. Achieving a breakthrough in highly linear C-band communications power amplification, the HBT demonstrated a linearity of 30 dB C/I, typically required by communications systems, with 61% power added efficiency at 6 GHz. When tuned for maximum efficiency it achieved 72% P.A.E.
Martin Marietta实验室的一种异质结双极晶体管，采用基极-发射极重新排列工艺来减少表面复合，已被负载拉出，以证明它同时具有高度线性和高效率。在高线性C波段通信功率放大方面取得了突破，HBT展示了30 dB C/I的线性度，这是通信系统通常需要的，在6 GHz时功率增加效率为61%。当调整到最高效率时，它达到了72%的P.A.E.
{"title":"A highly-linear highly efficient HBT for communications circuits","authors":"R.S. Brozovich, D. Helms, L.W. Yang, J. Komiak","doi":"10.1109/GAAS.1994.636986","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636986","url":null,"abstract":"A Martin Marietta Laboratory heterojunction bipolar transistor, which was fabricated using a base-emitter realigned process to reduce surface recombination, has been load pulled to demonstrate that it is simultaneously highly linear and efficient. Achieving a breakthrough in highly linear C-band communications power amplification, the HBT demonstrated a linearity of 30 dB C/I, typically required by communications systems, with 61% power added efficiency at 6 GHz. When tuned for maximum efficiency it achieved 72% P.A.E.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115604312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636960
T. Sowlati, C. Salama, J. Sitch, G. Rabjohn, D. Smith
In this paper a class E power amplifier for mobile communications is presented. The advantages of class E over class B and class C power amplifiers in a low voltage design is discussed. A fully integrated class E power amplifier operating at 835 MHz is designed, fabricated and tested. The circuit is implemented in a self-aligned-gate, depletion mode GaAs MESFET process. The amplifier delivers 24 dBm power to the load with a power added efficiency greater than 50% at a supply voltage of 2.5 V. The power dissipated in the integrated matching networks is 15 times the power dissipated in the transistors.
{"title":"Low voltage, high efficiency class E GaAs power amplifiers for mobile communications","authors":"T. Sowlati, C. Salama, J. Sitch, G. Rabjohn, D. Smith","doi":"10.1109/GAAS.1994.636960","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636960","url":null,"abstract":"In this paper a class E power amplifier for mobile communications is presented. The advantages of class E over class B and class C power amplifiers in a low voltage design is discussed. A fully integrated class E power amplifier operating at 835 MHz is designed, fabricated and tested. The circuit is implemented in a self-aligned-gate, depletion mode GaAs MESFET process. The amplifier delivers 24 dBm power to the load with a power added efficiency greater than 50% at a supply voltage of 2.5 V. The power dissipated in the integrated matching networks is 15 times the power dissipated in the transistors.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123467499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636917
M. Fujii, T. Maeda, Y. Ohno, M. Tokushima, M. Ishikawa, M. Fukaishi, H. Hida
SCFL D-FFs with supply voltage as low as 1.3 V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 /spl mu/m AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.
设计并制造了电源电压低至1.3 V的SCFL d - ff。通过优化电源跟随器的逻辑摆幅和电压漂移来降低电源电压。d - ff采用0.25 /spl μ m AlGaAs/InGaAs hjfet，工作速度高达10 Gbps，功耗低至19 mW。
{"title":"An ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage","authors":"M. Fujii, T. Maeda, Y. Ohno, M. Tokushima, M. Ishikawa, M. Fukaishi, H. Hida","doi":"10.1109/GAAS.1994.636917","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636917","url":null,"abstract":"SCFL D-FFs with supply voltage as low as 1.3 V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 /spl mu/m AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123453342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636957
S. Yoshida, Kazunari Satoh, T. Miya, T. Umemoto, H. Hirayama, Katsunori Miyagaki, J. Leong
GaAs converter IC's for C-band DBS receivers were developed on 1.1/spl times/1.6 mm/sup 2/ chip using a 0.5 /spl mu/m MESFET process. This converter IC includes four(4) functional blocks; i.e. low noise amplifier(LNA), mixer(MIXER), oscillator(OSC) and IF amplifier(IFA). This converter IC has 2.7 dB noise figure and 43 dB conversion gain, and shows a tight gain distribution.
{"title":"GaAs converter IC's for C-band DBS receivers","authors":"S. Yoshida, Kazunari Satoh, T. Miya, T. Umemoto, H. Hirayama, Katsunori Miyagaki, J. Leong","doi":"10.1109/GAAS.1994.636957","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636957","url":null,"abstract":"GaAs converter IC's for C-band DBS receivers were developed on 1.1/spl times/1.6 mm/sup 2/ chip using a 0.5 /spl mu/m MESFET process. This converter IC includes four(4) functional blocks; i.e. low noise amplifier(LNA), mixer(MIXER), oscillator(OSC) and IF amplifier(IFA). This converter IC has 2.7 dB noise figure and 43 dB conversion gain, and shows a tight gain distribution.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123578362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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