Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636963
Y. Matsuoka, E. Sano
We developed IC-oriented high-performance AlGaAs/GaAs heterostructure bipolar transistors (HBTs). The parasitic effects of the HBTs are reduced by a self-aligned process technology characterized by a technique for making a base-metal-overlaid (BMO) structure, and the electron transit time in the HBTs is decreased by the novel collector structure of a "ballistic collection transistors with a launcher (LBCT)". The BMO-LBCT with a relatively thin collector had a cutoff frequency f/sub T/ of 171 GHz. By modifying collector thickness and using Pt-Ti-Pt-Au as the base ohmic metal, the maximum oscillation frequency f/sub max/ reached 148 GHz with a 114 GHz f/sub T/. Moreover, an MOCVD-grown highly-carbon-doped structure had an f/sub max/ of 192 GHz while still having an f/sub T/ more than 100 GHz. Using BMO-LBCTs, we successfully fabricated high-speed ICs: a 2:1 multiplexer with retiming D-type flip-flops that operates error-free at 19 Gbit/s, selector IC that operates at 40 Gbit/s, a divided-by-four dynamic frequency divider that functions up to 50 GHz, and a broadband preamplifier with a high gain of 16.8 dB and 3-dB-down bandwidth of 40 GHz.
{"title":"High-speed AlGaAs/GaAs HBTs and their applications to 40-Gbit/s-class ICs","authors":"Y. Matsuoka, E. Sano","doi":"10.1109/GAAS.1994.636963","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636963","url":null,"abstract":"We developed IC-oriented high-performance AlGaAs/GaAs heterostructure bipolar transistors (HBTs). The parasitic effects of the HBTs are reduced by a self-aligned process technology characterized by a technique for making a base-metal-overlaid (BMO) structure, and the electron transit time in the HBTs is decreased by the novel collector structure of a \"ballistic collection transistors with a launcher (LBCT)\". The BMO-LBCT with a relatively thin collector had a cutoff frequency f/sub T/ of 171 GHz. By modifying collector thickness and using Pt-Ti-Pt-Au as the base ohmic metal, the maximum oscillation frequency f/sub max/ reached 148 GHz with a 114 GHz f/sub T/. Moreover, an MOCVD-grown highly-carbon-doped structure had an f/sub max/ of 192 GHz while still having an f/sub T/ more than 100 GHz. Using BMO-LBCTs, we successfully fabricated high-speed ICs: a 2:1 multiplexer with retiming D-type flip-flops that operates error-free at 19 Gbit/s, selector IC that operates at 40 Gbit/s, a divided-by-four dynamic frequency divider that functions up to 50 GHz, and a broadband preamplifier with a high gain of 16.8 dB and 3-dB-down bandwidth of 40 GHz.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115160256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636930
P. Hills
Transport in the UK and most other European countries, during the latter half of this century, has been dominated by the growth of private car ownership. All the attendant problems of congestion, pollution and accidents are conspiring to undermine the huge personal and social benefits that individuals and households derive from car ownership and use. Nor has this process run its full course; the UK Department of Transport in its National Road Traffic Forecasts (NRTF) foresee the possibility of the total annual vehicle-kms more than doubling between now and the year 2030, before some kind of "saturation" in car-use might be reached. The extent to which these forecasts are reflecting the powerful economic forces that determine future traffic demand or are themselves driven by current transport policy is the subject of much debate. More radical policies, such as tolling inter-urban motorways, congestion-pricing and traffic-calming in urban areas and encouraging the spread of tele-commuting could modify and reshape future travel-demands substantially, with significant implications for daily life. Throughout this transport "informatics" revolution, the Transport Operations Research Group (TORG) at the University of Newcastle upon Tyne has played a leading role. In particular, TORG has acted as the prime contractor in a 16-partner European project called ADEPT (Automatic Debiting and Electronic Payment for Transport), financed by the EC DRIVE programme. This is described and plans for future research outlined.
{"title":"Developments in transport telematics in Europe. The case of automatic debiting at speed","authors":"P. Hills","doi":"10.1109/GAAS.1994.636930","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636930","url":null,"abstract":"Transport in the UK and most other European countries, during the latter half of this century, has been dominated by the growth of private car ownership. All the attendant problems of congestion, pollution and accidents are conspiring to undermine the huge personal and social benefits that individuals and households derive from car ownership and use. Nor has this process run its full course; the UK Department of Transport in its National Road Traffic Forecasts (NRTF) foresee the possibility of the total annual vehicle-kms more than doubling between now and the year 2030, before some kind of \"saturation\" in car-use might be reached. The extent to which these forecasts are reflecting the powerful economic forces that determine future traffic demand or are themselves driven by current transport policy is the subject of much debate. More radical policies, such as tolling inter-urban motorways, congestion-pricing and traffic-calming in urban areas and encouraging the spread of tele-commuting could modify and reshape future travel-demands substantially, with significant implications for daily life. Throughout this transport \"informatics\" revolution, the Transport Operations Research Group (TORG) at the University of Newcastle upon Tyne has played a leading role. In particular, TORG has acted as the prime contractor in a 16-partner European project called ADEPT (Automatic Debiting and Electronic Payment for Transport), financed by the EC DRIVE programme. This is described and plans for future research outlined.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116354248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636976
K. Poulton, K. Knudsen, J. Corcoran, K. C. Wang, R. Nubling, R. Pierson, M. Chang, P. Asbeck, R. Huang
A GaAs-AlGaAs Heterojunction Bipolar Transistor (HBT) process was developed to meet the speed, gain and yield requirements for Analog to Digital Converters (ADCs). A 6-bit, 4 GSa/s (4 giga-samples per second) ADC was designed and fabricated in this process. The standard HBT used has an emitter area of 1.4/spl times/3.0 /spl mu/m; it has current gain of over 70 at I/sub c/=1 mA and f/sub T/ and f/sub MAX/ of over 50 GHz at I/sub c/=4 mA. The process also includes Schottky diodes, thin-film NiCr resistors, MIM capacitors and three levels of metal interconnect. The ADC uses an analog folding architecture to reduce transistor count and power well below that of a straight 6-bit flash ADC. It includes an on-chip track-and-hold (T/H) circuit and Gray-encoded digital outputs for best immunity to dynamic errors. The ADC's measured differential nonlinearity is less than /spl plusmn/0.5 LSB and its integral nonlinearity is less than /spl plusmn/0.8 LSB. It has a resolution bandwidth (the frequency at which effective bits has dropped by 0.5 bits) of 2.4 GHz at 3 GSa/s and 1.8 GHz at 4 GSa/s, higher than any ADC published to date. The chip operates at up to 6.5 GSa/s, but linearity at that clock rate is much worse.
{"title":"A 6-bit, 4 GSa/s ADC fabricated in a GaAs HBT process","authors":"K. Poulton, K. Knudsen, J. Corcoran, K. C. Wang, R. Nubling, R. Pierson, M. Chang, P. Asbeck, R. Huang","doi":"10.1109/GAAS.1994.636976","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636976","url":null,"abstract":"A GaAs-AlGaAs Heterojunction Bipolar Transistor (HBT) process was developed to meet the speed, gain and yield requirements for Analog to Digital Converters (ADCs). A 6-bit, 4 GSa/s (4 giga-samples per second) ADC was designed and fabricated in this process. The standard HBT used has an emitter area of 1.4/spl times/3.0 /spl mu/m; it has current gain of over 70 at I/sub c/=1 mA and f/sub T/ and f/sub MAX/ of over 50 GHz at I/sub c/=4 mA. The process also includes Schottky diodes, thin-film NiCr resistors, MIM capacitors and three levels of metal interconnect. The ADC uses an analog folding architecture to reduce transistor count and power well below that of a straight 6-bit flash ADC. It includes an on-chip track-and-hold (T/H) circuit and Gray-encoded digital outputs for best immunity to dynamic errors. The ADC's measured differential nonlinearity is less than /spl plusmn/0.5 LSB and its integral nonlinearity is less than /spl plusmn/0.8 LSB. It has a resolution bandwidth (the frequency at which effective bits has dropped by 0.5 bits) of 2.4 GHz at 3 GSa/s and 1.8 GHz at 4 GSa/s, higher than any ADC published to date. The chip operates at up to 6.5 GSa/s, but linearity at that clock rate is much worse.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127900302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636962
T. Quach, J. Staudinger
A low cost commercial, high performance two stage GaAs MESFET power amplifier has been developed for the 2.4 GHz Industrial, Scientific, and Medical (ISM) frequency band targeting portable wireless LAN applications. The amplifier is housed in a low cost plastic surface mount package, making it well suited for insertion into low profile PCM/CIA formats. Measured performance has demonstrated 24 dBm output power with greater than 65% power added efficiency when operated in gain compression with a 5 volt supply. Harmonic rejection greater than 18 dBc and 30 dBc is achieved on 2nd and 3rd order harmonics, respectively. On chip bias and power level control circuitry allows adjusting the output power level over a 20 dBc range with a single analog control voltage. Stringent cost goals are achieved by limiting chip size, choosing inexpensive plastic packaging, and by selecting an appropriate amplifier topology which places some components off chip.
{"title":"A high efficiency commercial GaAs MESFET power amplifier for PCM/CIA applications at 2.45 GHz","authors":"T. Quach, J. Staudinger","doi":"10.1109/GAAS.1994.636962","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636962","url":null,"abstract":"A low cost commercial, high performance two stage GaAs MESFET power amplifier has been developed for the 2.4 GHz Industrial, Scientific, and Medical (ISM) frequency band targeting portable wireless LAN applications. The amplifier is housed in a low cost plastic surface mount package, making it well suited for insertion into low profile PCM/CIA formats. Measured performance has demonstrated 24 dBm output power with greater than 65% power added efficiency when operated in gain compression with a 5 volt supply. Harmonic rejection greater than 18 dBc and 30 dBc is achieved on 2nd and 3rd order harmonics, respectively. On chip bias and power level control circuitry allows adjusting the output power level over a 20 dBc range with a single analog control voltage. Stringent cost goals are achieved by limiting chip size, choosing inexpensive plastic packaging, and by selecting an appropriate amplifier topology which places some components off chip.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"195 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132663990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636982
K. Kunihiro, Y. Ohno
A large-signal HJFET model is developed for deep-trap induced drain-current transient behaviors based on two-dimensional device simulations. In the model, electron capture and emission processes for deep traps are replaced by the currents flowing through a diode and a resistor, which are physically deduced from SRH statistics. The model accurately describes the bias and time dependent nonlinear-characteristics of trapping effects. The influence of the trapping effects on RF switching is also discussed.
{"title":"An equivalent circuit model for deep-trap induced drain-current transient behaviors in HJFETs","authors":"K. Kunihiro, Y. Ohno","doi":"10.1109/GAAS.1994.636982","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636982","url":null,"abstract":"A large-signal HJFET model is developed for deep-trap induced drain-current transient behaviors based on two-dimensional device simulations. In the model, electron capture and emission processes for deep traps are replaced by the currents flowing through a diode and a resistor, which are physically deduced from SRH statistics. The model accurately describes the bias and time dependent nonlinear-characteristics of trapping effects. The influence of the trapping effects on RF switching is also discussed.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132437675","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636935
Huei Wang, R. Lai, M. Biedenbender, G. Dow, B. Allen
A monolithic W-band push-pull two-stage power amplifier has been developed using 0.1 pm AlGaAs-InGaAs-GaAs pseudomorphic T-gate power HEMT technology. This novel design utilizes the push-pull scheme to take the advantage of a virtual ground in a push-pull HEMT device pair which eliminates the via hole inductance, and improves the power amplifier performance at millimeter-wave frequency. The measurement results show that a small signal gain of 12 dB, an output power of 19.4 dBm, and a power added efficiency of 13.3% have been achieved at 90 GHz, and presents state-of-the-art performance for a monolithic power amplifiers at this frequency. To our knowledge, this is the first reported monolithic push-pull amplifier at millimeter-wave frequencies.
{"title":"A novel W-band monolithic push-pull power amplifier","authors":"Huei Wang, R. Lai, M. Biedenbender, G. Dow, B. Allen","doi":"10.1109/GAAS.1994.636935","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636935","url":null,"abstract":"A monolithic W-band push-pull two-stage power amplifier has been developed using 0.1 pm AlGaAs-InGaAs-GaAs pseudomorphic T-gate power HEMT technology. This novel design utilizes the push-pull scheme to take the advantage of a virtual ground in a push-pull HEMT device pair which eliminates the via hole inductance, and improves the power amplifier performance at millimeter-wave frequency. The measurement results show that a small signal gain of 12 dB, an output power of 19.4 dBm, and a power added efficiency of 13.3% have been achieved at 90 GHz, and presents state-of-the-art performance for a monolithic power amplifiers at this frequency. To our knowledge, this is the first reported monolithic push-pull amplifier at millimeter-wave frequencies.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114143520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636964
Y. Kuriyama, T. Sugiyama, S. Hongo, J. Akagi, K. Tsuda, N. Iizuka, M. Obara
We report a master-slave D-type flip-flop (D-FF) circuit implemented with AlGaAs/GaAs HBTs. The operation of this IC was confirmed up to 40 GHz, which is the highest speed in flip-flop circuits including static dividers.
{"title":"A 40 GHz D-type flip-flop using AlGaAs/GaAs HBTs","authors":"Y. Kuriyama, T. Sugiyama, S. Hongo, J. Akagi, K. Tsuda, N. Iizuka, M. Obara","doi":"10.1109/GAAS.1994.636964","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636964","url":null,"abstract":"We report a master-slave D-type flip-flop (D-FF) circuit implemented with AlGaAs/GaAs HBTs. The operation of this IC was confirmed up to 40 GHz, which is the highest speed in flip-flop circuits including static dividers.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114788055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636968
Y. Yamauchi, K. Nagata, T. Makimura, O. Nakajima, H. Ito, T. Ishibashi
We have developed a high-output-voltage monolithically integrated driver circuit for an external optical modulator using InGaP/GaAs HBTs with a collector breakdown voltage, BVceo, of 14 V. The driver circuit consists of an input buffer stage, two differential gain stages, an emitter-follower prefinal stage, and a final differential stage. The circuit operates stably with output signal voltage of 5.5 V at up to 12 Gb/s with a single-phase ECL-level input signal. Error-free operation is confirmed from the NRZ 2/sup 23/-1 PN pattern obtained at 10 Gb/s.
{"title":"10 Gb/s monolithic optical modulator driver with high output voltage of 5 V using InGaP/GaAs HBTs","authors":"Y. Yamauchi, K. Nagata, T. Makimura, O. Nakajima, H. Ito, T. Ishibashi","doi":"10.1109/GAAS.1994.636968","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636968","url":null,"abstract":"We have developed a high-output-voltage monolithically integrated driver circuit for an external optical modulator using InGaP/GaAs HBTs with a collector breakdown voltage, BVceo, of 14 V. The driver circuit consists of an input buffer stage, two differential gain stages, an emitter-follower prefinal stage, and a final differential stage. The circuit operates stably with output signal voltage of 5.5 V at up to 12 Gb/s with a single-phase ECL-level input signal. Error-free operation is confirmed from the NRZ 2/sup 23/-1 PN pattern obtained at 10 Gb/s.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"165 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115423034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636989
K. Kobayashi, A. Oki
A direct-coupled low noise amplifier with less than 2.5 dB noise figure up to 4.3 GHz has been demonstrated using 2 /spl mu/m emitter-width GaAs HBTs. A noise figure of 2.2-2.5 dB and a nominal gain of 33 dB has been achieved with a 4.3 GHz 3-dB bandwidth. A low power consumption version obtained a noise figure of 3.0-3.1 dB, a gain of 24 dB, and a bandwidth of 4.5 GHz while consuming only 64 mW of dc power through a 5 volt supply. The HBT amplifier chips are miniature in size, 0.27/spl times/0.3 mm/sup 2/, and can yield over 25000 die per 3-inch GaAs wafer at a cost well under $1 per die, making them suitable for high volume low cost commercial applications. These amplifiers benchmark the lowest noise figures reported for an HBT amplifier and are comparable to commercially available state-of-the-art silicon bipolar LNAs, but with more than four times the frequency bandwidth performance.
{"title":"Sub-2.5 dB noise figure GaAs HBT direct-coupled LNAs for high volume commercial applications to 6 GHz","authors":"K. Kobayashi, A. Oki","doi":"10.1109/GAAS.1994.636989","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636989","url":null,"abstract":"A direct-coupled low noise amplifier with less than 2.5 dB noise figure up to 4.3 GHz has been demonstrated using 2 /spl mu/m emitter-width GaAs HBTs. A noise figure of 2.2-2.5 dB and a nominal gain of 33 dB has been achieved with a 4.3 GHz 3-dB bandwidth. A low power consumption version obtained a noise figure of 3.0-3.1 dB, a gain of 24 dB, and a bandwidth of 4.5 GHz while consuming only 64 mW of dc power through a 5 volt supply. The HBT amplifier chips are miniature in size, 0.27/spl times/0.3 mm/sup 2/, and can yield over 25000 die per 3-inch GaAs wafer at a cost well under $1 per die, making them suitable for high volume low cost commercial applications. These amplifiers benchmark the lowest noise figures reported for an HBT amplifier and are comparable to commercially available state-of-the-art silicon bipolar LNAs, but with more than four times the frequency bandwidth performance.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131094902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-10-16DOI: 10.1109/GAAS.1994.636952
Y. Notani, Y. Nakajima, Y. Ohta, Y. Mitsui, M. Nakayama, S. Murakami, S. Orisaka, O. Ishihara, S. Mitsui
A novel packaging technology using a multi-layer Tape Automated Bonding (TAB) tape was developed for a GaAs multi-chip module to be employed in radio units of mobile telephones. The microwave properties of the multi-layer TAB tape were first evaluated using a ring resonator and a through-line. Then, the TAB tape was applied to a 900 MHz-band high power amplifier. It consists of two MMIC chips and an output matching circuit formed on the TAB tape. The amplifier module delivered a saturated output power of 31.6 dBm with a power added efficiency of 54.9% at 933 MHz with a supply voltage Vdd of 3.3 V. These results suggest that the TAB tape assembly has a high potentiality for realizing a thin and light weight RF unit in mobile communication terminals with low cost.
{"title":"GaAs multi-chip power amplifier module using a multi-layer TAB tape","authors":"Y. Notani, Y. Nakajima, Y. Ohta, Y. Mitsui, M. Nakayama, S. Murakami, S. Orisaka, O. Ishihara, S. Mitsui","doi":"10.1109/GAAS.1994.636952","DOIUrl":"https://doi.org/10.1109/GAAS.1994.636952","url":null,"abstract":"A novel packaging technology using a multi-layer Tape Automated Bonding (TAB) tape was developed for a GaAs multi-chip module to be employed in radio units of mobile telephones. The microwave properties of the multi-layer TAB tape were first evaluated using a ring resonator and a through-line. Then, the TAB tape was applied to a 900 MHz-band high power amplifier. It consists of two MMIC chips and an output matching circuit formed on the TAB tape. The amplifier module delivered a saturated output power of 31.6 dBm with a power added efficiency of 54.9% at 933 MHz with a supply voltage Vdd of 3.3 V. These results suggest that the TAB tape assembly has a high potentiality for realizing a thin and light weight RF unit in mobile communication terminals with low cost.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125226672","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}