Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399709
Yu-Ting Jui, D. Sadowski, K. Kaler, M. Mintchev
Monitoring bolus transit in the esophagus has been pivotal for the diagnosis of achalasia, diffuse spasm, motor abnormalities associated with systemic disorders, and gastro-esophageal reflux disease. Despite recent advances in X-ray imaging and the introduction of multichannel intraluminal impedancometry, these studies remain moderately invasive. Barium radiography subjects the patient to X-ray radiation, while the new technique of impedance monitoring employs catheters introduced either transnasally or transorally. Rapid developments in microelectronics, micro-electromechanical systems (MEMS) and wireless radio-frequency (RF) transmission created the possibility of suggesting a conceptually different and completely noninvasive technique for esophageal bolus transit testing. In the present study, the concept of the ESO-Pill/spl trade/ is introduced, a noninvasive swallowable "smart" microelectronic capsule, which can monitor in real time its acceleration, velocity of propagation, position, and the contractile force that pushes it as it passes through the esophagus. The capabilities and the limitations of the ESO-Pill/spl trade/ are discussed in the context of the radically different type of measurements that such device could offer, while every attempt is made to associate these measurements with the presently available bolus transit monitoring standards in esophageal testing.
{"title":"The ESO-Pill/spl trade/: a non-invasive MEMS capsule for bolus transit monitoring in the esophagus","authors":"Yu-Ting Jui, D. Sadowski, K. Kaler, M. Mintchev","doi":"10.1109/ICECS.2004.1399709","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399709","url":null,"abstract":"Monitoring bolus transit in the esophagus has been pivotal for the diagnosis of achalasia, diffuse spasm, motor abnormalities associated with systemic disorders, and gastro-esophageal reflux disease. Despite recent advances in X-ray imaging and the introduction of multichannel intraluminal impedancometry, these studies remain moderately invasive. Barium radiography subjects the patient to X-ray radiation, while the new technique of impedance monitoring employs catheters introduced either transnasally or transorally. Rapid developments in microelectronics, micro-electromechanical systems (MEMS) and wireless radio-frequency (RF) transmission created the possibility of suggesting a conceptually different and completely noninvasive technique for esophageal bolus transit testing. In the present study, the concept of the ESO-Pill/spl trade/ is introduced, a noninvasive swallowable \"smart\" microelectronic capsule, which can monitor in real time its acceleration, velocity of propagation, position, and the contractile force that pushes it as it passes through the esophagus. The capabilities and the limitations of the ESO-Pill/spl trade/ are discussed in the context of the radically different type of measurements that such device could offer, while every attempt is made to associate these measurements with the presently available bolus transit monitoring standards in esophageal testing.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73166522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399742
Yonina C. Eldar, T. G. Dvorkind
We consider non-ideal sampling and reconstruction schemes in which the sampling and reconstruction spaces as well as the input signal can be arbitrary. To obtain a good reconstruction of the signal in the reconstruction space, from arbitrary samples, we suggest processing the samples prior to reconstruction with a linear transformation that is designed to minimize the worst-case squared-norm error between the reconstructed signal, and the best possible (but usually unattainable) approximation of the signal in the reconstruction space. We show both theoretically and through a simulation that if the input signal does not lie in the reconstruction space, then this method can outperform the consistent reconstruction method previously proposed for this problem.
{"title":"Minimax sampling with arbitrary spaces [signal sampling and reconstruction]","authors":"Yonina C. Eldar, T. G. Dvorkind","doi":"10.1109/ICECS.2004.1399742","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399742","url":null,"abstract":"We consider non-ideal sampling and reconstruction schemes in which the sampling and reconstruction spaces as well as the input signal can be arbitrary. To obtain a good reconstruction of the signal in the reconstruction space, from arbitrary samples, we suggest processing the samples prior to reconstruction with a linear transformation that is designed to minimize the worst-case squared-norm error between the reconstructed signal, and the best possible (but usually unattainable) approximation of the signal in the reconstruction space. We show both theoretically and through a simulation that if the input signal does not lie in the reconstruction space, then this method can outperform the consistent reconstruction method previously proposed for this problem.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76933739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399744
H. Michail, A. Kakarountas, A. Milidonis, C. Goutis
In this paper, an efficient implementation, in terms of performance, of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function is presented. This mechanism is used for message authentication in combination with a shared secret key. The proposed hardware implementation can be synthesized easily for a variety of FPGA and ASIC technologies. Simulation results, using commercial tools, verified the efficiency of the HMAC implementation in terms of performance and throughput. Special care has been taken so that the proposed implementation does not introduce extra design complexity; while in-parallel functionality was kept to the required levels.
{"title":"Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function","authors":"H. Michail, A. Kakarountas, A. Milidonis, C. Goutis","doi":"10.1109/ICECS.2004.1399744","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399744","url":null,"abstract":"In this paper, an efficient implementation, in terms of performance, of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function is presented. This mechanism is used for message authentication in combination with a shared secret key. The proposed hardware implementation can be synthesized easily for a variety of FPGA and ASIC technologies. Simulation results, using commercial tools, verified the efficiency of the HMAC implementation in terms of performance and throughput. Special care has been taken so that the proposed implementation does not introduce extra design complexity; while in-parallel functionality was kept to the required levels.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83982021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399702
Q. Al-Zoubi, A. Al-Smadi
The hybrid equivalent circuit continues to be very popular in the analysis of small-signal AC response of the BJT amplifier. The manufacturers continue to specify the h-parameter for a particular operating region on the specification sheets. However, specification sheets cannot provide parameters for an equivalent circuit at every possible operating point. Hence, the parameters defined at an operating point may or may not reflect the actual operating conditions of the amplifier. This paper addresses a method for determining the h-parameter using a single compact graph.
{"title":"A compact method for obtaining the hybrid parameters of the BJT amplifier","authors":"Q. Al-Zoubi, A. Al-Smadi","doi":"10.1109/ICECS.2004.1399702","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399702","url":null,"abstract":"The hybrid equivalent circuit continues to be very popular in the analysis of small-signal AC response of the BJT amplifier. The manufacturers continue to specify the h-parameter for a particular operating region on the specification sheets. However, specification sheets cannot provide parameters for an equivalent circuit at every possible operating point. Hence, the parameters defined at an operating point may or may not reflect the actual operating conditions of the amplifier. This paper addresses a method for determining the h-parameter using a single compact graph.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82759659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399633
O. El-Gharniti, E. Kerhervé, J. Bégueret, P. Jarry
We present a compact and scalable model for on-chip transformers fabricated in silicon IC technology. The model is driven from the layout and the process technology specifications. It is suitable for design optimization and circuit simulation. EM-simulation is used to validate the model. The proposed model shows excellent agreement with EM-simulation over a large frequency range (1-15 GHz).
{"title":"Modeling of integrated monolithic transformers for silicon RF IC","authors":"O. El-Gharniti, E. Kerhervé, J. Bégueret, P. Jarry","doi":"10.1109/ICECS.2004.1399633","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399633","url":null,"abstract":"We present a compact and scalable model for on-chip transformers fabricated in silicon IC technology. The model is driven from the layout and the process technology specifications. It is suitable for design optimization and circuit simulation. EM-simulation is used to validate the model. The proposed model shows excellent agreement with EM-simulation over a large frequency range (1-15 GHz).","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88894590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399728
S. Poriazis
The behavior of the 1:10 phased demultiplexer (PDMUX10) circuit is analyzed. The circuit demultiplexes the input clock signal into ten phased output signals by streaming sets of twenty clock phases. A phase difference equal to the half period of the clock is maintained between consecutive output transitions. The VHDL description of the PDMUX10 cell is given and the simulation and synthesis results are generated. A 2-level tree-like structure is built by applying the phased outputs of the PDMUX10 cell into the corresponding clock inputs of ten cell replicas that extend the circuit behavior. An EXOR10 gate is attached to the PDMUX10 cell output ports and aggregates all the phases that the phased clock signals are carrying while preserving their phase associations.
{"title":"The 1:10 phased demultiplexer circuit","authors":"S. Poriazis","doi":"10.1109/ICECS.2004.1399728","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399728","url":null,"abstract":"The behavior of the 1:10 phased demultiplexer (PDMUX10) circuit is analyzed. The circuit demultiplexes the input clock signal into ten phased output signals by streaming sets of twenty clock phases. A phase difference equal to the half period of the clock is maintained between consecutive output transitions. The VHDL description of the PDMUX10 cell is given and the simulation and synthesis results are generated. A 2-level tree-like structure is built by applying the phased outputs of the PDMUX10 cell into the corresponding clock inputs of ten cell replicas that extend the circuit behavior. An EXOR10 gate is attached to the PDMUX10 cell output ports and aggregates all the phases that the phased clock signals are carrying while preserving their phase associations.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79354548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399694
S. Yoshitomi
In this paper, parameter extraction methodology of the inductor (L) fabricated on silicon is presented. Firstly, formula for parameter extraction of the target equivalent circuit is proposed. Because of its simplicity and physically-based background, all the model parameters can be extracted without any optimization procedure. By the verification of S-parameter and RF-noise with the equivalent circuit solved by the proposed formula, its modeling capability has been proven up to 20 GHz. Further investigation on model parameters' geometrical dependency was made, and clear layout dependencies have been shown based on the proposed methodology.
{"title":"Analysis and simulation of spiral inductor fabricated on silicon substrate","authors":"S. Yoshitomi","doi":"10.1109/ICECS.2004.1399694","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399694","url":null,"abstract":"In this paper, parameter extraction methodology of the inductor (L) fabricated on silicon is presented. Firstly, formula for parameter extraction of the target equivalent circuit is proposed. Because of its simplicity and physically-based background, all the model parameters can be extracted without any optimization procedure. By the verification of S-parameter and RF-noise with the equivalent circuit solved by the proposed formula, its modeling capability has been proven up to 20 GHz. Further investigation on model parameters' geometrical dependency was made, and clear layout dependencies have been shown based on the proposed methodology.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79605745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399672
L. Mor, E. Bubis, K. Hemmes, P. Schechner
Room temperature measurements performed in an alkaline fuel cell (AFC) using glucose as fuel at different concentrations are reported. The open circuit voltage, as a function of initial glucose concentration, polarization curves and power density, as function of current density, were measured. It was found that the reported electrical properties have maximum values at an initial glucose concentration of around 0.89 M. This behavior is attributed to second order reactions that compete with the electrochemical oxidation of the glucose.
{"title":"Performance of a glucose AFC","authors":"L. Mor, E. Bubis, K. Hemmes, P. Schechner","doi":"10.1109/ICECS.2004.1399672","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399672","url":null,"abstract":"Room temperature measurements performed in an alkaline fuel cell (AFC) using glucose as fuel at different concentrations are reported. The open circuit voltage, as a function of initial glucose concentration, polarization curves and power density, as function of current density, were measured. It was found that the reported electrical properties have maximum values at an initial glucose concentration of around 0.89 M. This behavior is attributed to second order reactions that compete with the electrochemical oxidation of the glucose.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87222789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399747
N. Sklavos, G. Selimis, O. Koufopavlou
The evolution of a cipher has no practical impact if it has only a theoretical background. Every encryption algorithm should exploit as much as possible the conditions of the specific system without omitting the physical, area and timing limitations. The smart card environment lacks system resources, but commercial and economic transactions via smart cards demand the use of certificated and secure cryptographic methods. This fact requires new ways of designing architectures for secure and reliable smart card systems. A crypto-processor architecture and its VLSI implementation for smart card bulk encryption is proposed. The proposed architecture achieves 30% area resource reduction and has a throughput value much greater than smart card standards specify.
{"title":"Bulk encryption crypto-processor for smart cards: design and implementation","authors":"N. Sklavos, G. Selimis, O. Koufopavlou","doi":"10.1109/ICECS.2004.1399747","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399747","url":null,"abstract":"The evolution of a cipher has no practical impact if it has only a theoretical background. Every encryption algorithm should exploit as much as possible the conditions of the specific system without omitting the physical, area and timing limitations. The smart card environment lacks system resources, but commercial and economic transactions via smart cards demand the use of certificated and secure cryptographic methods. This fact requires new ways of designing architectures for secure and reliable smart card systems. A crypto-processor architecture and its VLSI implementation for smart card bulk encryption is proposed. The proposed architecture achieves 30% area resource reduction and has a throughput value much greater than smart card standards specify.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87294035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-12-13DOI: 10.1109/ICECS.2004.1399693
E. Shauly, R. Ghez, Y. Komem
This work deals with the simulation of two-dimensional impurity diffusion in CMOS silicon devices. The reverse modeling method was used to determine the diffusion coefficient (D/sub I/), surface recombination rate of defects (K/sub I/) and the characteristics of the injecting source. Analysis showed similarity between D/sub I/ in the 2D system compared with the value obtained from non-patterned samples. The results for D/sub I/ and K/sub I/ are very well described by the Arrhenius expressions. D/sub I/ was found to be related to the substrate type e.g. EPI or CZ. The values of K/sub I/ related to the interface type, oxidizing or nonoxidizing (SiO/sub 2/ or Si/sub 3/N/sub 4/).
{"title":"Experimental extraction of point defects parameters needed for 2-D process modeling using reverse modeling","authors":"E. Shauly, R. Ghez, Y. Komem","doi":"10.1109/ICECS.2004.1399693","DOIUrl":"https://doi.org/10.1109/ICECS.2004.1399693","url":null,"abstract":"This work deals with the simulation of two-dimensional impurity diffusion in CMOS silicon devices. The reverse modeling method was used to determine the diffusion coefficient (D/sub I/), surface recombination rate of defects (K/sub I/) and the characteristics of the injecting source. Analysis showed similarity between D/sub I/ in the 2D system compared with the value obtained from non-patterned samples. The results for D/sub I/ and K/sub I/ are very well described by the Arrhenius expressions. D/sub I/ was found to be related to the substrate type e.g. EPI or CZ. The values of K/sub I/ related to the interface type, oxidizing or nonoxidizing (SiO/sub 2/ or Si/sub 3/N/sub 4/).","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89804749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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