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A low-power analog spike detector for extracellular neural recordings 用于细胞外神经记录的低功率模拟尖峰检测器
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399675
C.L. Rogers, J. Harris
This paper discusses a low-power spike detection circuit, which reduces bandwidth from neural recordings by only outputting a short pulse at each neural spike time. Communication bandwidth is dramatically reduced to the number of spikes. The principal idea is to use two low pass filters, one with a higher cutoff frequency to remove high frequency noise and the other with a lower cutoff frequency to create a local average. When the difference between the signal and the local average rises above a threshold, a spike is detected. The circuit uses subthreshold CMOS to keep the power consumption low enough for integration of many channels in an implanted device. This spike detection method shows promising results towards a robust and unsupervised algorithm that is lower power and more compact than existing spike detection methods.
本文讨论了一种低功率尖峰检测电路,该电路通过在每个神经尖峰时间只输出一个短脉冲来减少神经记录的带宽。通信带宽急剧减少到峰值的数量。主要思想是使用两个低通滤波器,一个具有较高的截止频率来去除高频噪声,另一个具有较低的截止频率来产生局部平均值。当信号与局部平均值之间的差值超过阈值时,检测到尖峰。该电路使用亚阈值CMOS来保持功耗足够低,以便在植入设备中集成多个通道。与现有的尖峰检测方法相比,该方法具有较低的功耗和更紧凑的鲁棒性和无监督算法。
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引用次数: 21
SOC modeling methodology for architectural exploration and software development 用于架构探索和软件开发的SOC建模方法
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399698
Michal Silbermintz, Amir Sahar, Itay Peled, M. Anschel, Emil Watralov, H. Miller, E. Weisberger
The paper introduces a system-on-chip (SOC) modeling methodology that enables the use of a single model for multiple purposes throughout a project's life cycle, starting from the architectural definition phase, continuing with the microarchitectural optimization and ending with the software development and optimization phase. These different purposes are served by enabling multiple approaches for modeling applications, providing capabilities for configuring and refining the hardware model and reaching a high accuracy level while maintaining a good simulation speed.
本文介绍了一种片上系统(SOC)建模方法,该方法允许在项目的整个生命周期中使用单一模型用于多种目的,从架构定义阶段开始,继续进行微架构优化,并以软件开发和优化阶段结束。这些不同的目的是通过支持多种方法来建模应用程序,提供配置和改进硬件模型的功能,并在保持良好的仿真速度的同时达到高精度。
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引用次数: 5
ISFET CMOS compatible design and encapsulation challenges ISFET CMOS兼容设计和封装挑战
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399736
L. Sudakov-Boreysha, A. Morgenshtein, U. Dinnar, Y. Nemirovsky
This work presents the main challenges in ISFET encapsulation. It analyzes SU8 drawbacks as an encapsulant and presents a novel flip-chip bonding packaging concept.
这项工作提出了ISFET封装的主要挑战。分析了SU8作为封装剂的缺点,提出了一种新的倒装芯片键合封装概念。
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引用次数: 8
Fuzzy decision diagram realization by analog CMOS summing amplifiers 用模拟CMOS和放大器实现模糊决策图
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399674
V. Varshavsky, I. Levin, V. Marakhovsky, A. Ruderman, N. Kravchenko
The functional completeness of a summing amplifier with saturation in an arbitrary value multi-valued logic, proven in previous works, gives a theoretical background for analog implementation of fuzzy devices. Practical design techniques for multi-valued analog fuzzy controllers still have to be developed. Compared with the traditional approach, analog CMOS fuzzy controller implementation has the advantages of higher speed, lower power consumption, smaller die area and more. This paper introduces some special design techniques and provides design examples for an industrial fuzzy controller implementation confirmed by SPICE simulations.
在以往的工作中证明了任意值多值逻辑中饱和求和放大器的功能完备性,为模糊器件的模拟实现提供了理论背景。多值模拟模糊控制器的实用设计技术仍有待开发。与传统方法相比,模拟CMOS模糊控制器的实现具有速度更快、功耗更低、芯片面积更小等优点。本文介绍了一些特殊的设计技术,并给出了通过SPICE仿真验证的工业模糊控制器的设计实例。
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引用次数: 4
A jitter insensitive continuous-time /spl Sigma//spl Delta/ modulator using transmission lines 使用传输线的抖动不敏感连续时间/spl Sigma//spl Delta调制器
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399626
L. Hernández, P. Rombouts, E. Prefasi, S. Patón, Mario Garcia, C. Lopez
This work presents a prototype low pass continuous time sigma delta modulator which uses transmission lines in its loop filter rather than capacitive integrators. As has been shown in prior theoretical work, such a structure allows us to desensitize the modulator against clock jitter and excess loop delay. The prototype single-bit modulator was designed for an oversampling ratio of 128. Clocked at 53.7 MHz it achieves a peak SNR of 67 dB. In an experiment with an excessive clock jitter of 1% of the clock period, the SNDR is degraded by only 5dB compared to the case without jitter. This is 15dB better than an equivalent modulator with capacitive integrators.
本工作提出了一个原型低通连续时间σ δ调制器,它在环路滤波器中使用传输线而不是电容积分器。正如在先前的理论工作中所显示的那样,这种结构允许我们对时钟抖动和过量环路延迟的调制器进行脱敏。原型单比特调制器设计的过采样比为128。时钟频率为53.7 MHz,峰值信噪比为67 dB。在时钟周期1%的过度时钟抖动的实验中,与没有抖动的情况相比,SNDR仅下降了5dB。这比具有电容积分器的等效调制器好15dB。
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引用次数: 6
Practical performance of planar spiral inductors 平面螺旋电感的实用性能
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399724
A. Telli, S. Demir, M. Askar
Inductors are essential elements for RF design. For RFIC design, bondwires, planar solenoidal and planar spiral inductors are available. Due to some limitations of bondwires and planar solenoidal inductors, planar spiral inductors are the most popular ones. Designers try to get accurate lumped element models for planar spiral inductors in order to be able to simulate the circuit performance correctly before the integrated circuit is manufactured. Planar spiral inductor measurement methods are discussed, and the comparison between lumped element model simulation results and experimental measurement results are given. The results of this study show that it is possible to model planar spiral inductors with lumped element circuit models, parameters of which can be calculated by basic, but accurate, expressions.
电感器是射频设计中必不可少的元件。对于RFIC设计,可以使用结合线、平面螺线管和平面螺旋电感。由于键合线和平面螺线管电感的局限性,平面螺旋电感是最受欢迎的一种。为了能够在集成电路制造之前正确地模拟电路的性能,设计人员试图得到精确的平面螺旋电感的集总元件模型。讨论了平面螺旋电感的测量方法,并将集总元模型仿真结果与实验测量结果进行了比较。研究结果表明,用集总元件电路模型来模拟平面螺旋电感是可行的,其参数可以用基本而准确的表达式来计算。
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引用次数: 12
Nanorobotic challenges in biomedical applications, design and control 纳米机器人在生物医学应用、设计和控制中的挑战
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399714
A. Cavalcanti, Lior Rosen, L. Kretly, M. Rosenfeld, S. Einav
Ongoing developments in molecular fabrication, computation, sensors and motors will enable the manufacturing of nanorobots - nanoscale biomolecular machine systems. The present work constitutes a novel simulation approach, intended to be a platform for the design and research of nanorobot control. The simulation approach involves a combined and multi-scale view of the scenario. Fluid dynamics numerical simulation is used to construct the nanorobotic environment, and an additional simulation models nanorobot sensing, control and behavior. We discuss some of the most promising possibilities for nanorobotics applications in biomedical problems, paying a special attention to a stenosed coronary artery case.
分子制造、计算、传感器和马达的持续发展将使纳米机器人——纳米级生物分子机器系统的制造成为可能。目前的工作构成了一种新的仿真方法,旨在为纳米机器人控制的设计和研究提供一个平台。模拟方法涉及场景的组合和多尺度视图。采用流体力学数值模拟方法构建纳米机器人环境,并对纳米机器人的感知、控制和行为进行仿真。我们讨论了纳米机器人在生物医学问题中应用的一些最有希望的可能性,特别关注冠状动脉狭窄的情况。
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引用次数: 29
Analysis of linear system response to wide band signals with applications to filters 应用于滤波器的线性系统对宽带信号的响应分析
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399613
A. Yahalom, Y. Pinhasi
The growing demand for broadband wireless communication links and the lack of wide frequency bands within the conventional spectrum causes us to seek bandwidth in the higher microwave and millimeter-wave spectrum at extremely high frequencies (EHF) above 30 GHz. One of the principal challenges in realizing modern wireless communication links in the EHF band are phenomena occurring during electromagnetic wave propagation through the atmosphere and in the linear systems of the receiver. A space-frequency approach for analyzing wireless communication channels operating in the EHF band is presented. The signal analysis is studied in the frequency domain, enabling consideration of ultra wide band modulated signals. The theory is employed for the analysis of a communication channel operating at EHF that utilizes pulse amplitude modulated signals.
由于对宽带无线通信链路的需求日益增长,而常规频谱中缺乏宽频带,因此我们在30 GHz以上的极高频(EHF)中寻求更高的微波和毫米波频谱的带宽。在超高频波段实现现代无线通信链路的主要挑战之一是电磁波在大气中传播和在接收机线性系统中发生的现象。提出了一种分析超高频无线通信信道的空频方法。信号分析是在频域进行的,可以考虑超宽带调制信号。该理论被用于分析在EHF工作的利用脉冲调幅信号的通信信道。
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引用次数: 0
Design of a differential chaotic Colpitts oscillator 差分混沌柯氏振荡器的设计
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399677
O. Tsakiridis, E. Zervas, D. Syvridis, M. Tsilis, T. Stonham
A differential bipolar chaotic Colpitts oscillator is presented. Compared to the classical Colpitts oscillator, the differential chaos Colpitts oscillator (DCCO) produces anti-phase dual output chaotic carriers and the circuit is insensitive to any extra parasitic components. Pspice simulations performed up to 1 GHz, demonstrate the effectiveness of DCCO.
提出了一种差分双极混沌Colpitts振荡器。与经典的Colpitts振荡器相比,差分混沌Colpitts振荡器(DCCO)产生反相双输出混沌载流子,并且电路对任何额外的寄生元件不敏感。在1ghz频率下进行了Pspice仿真,验证了DCCO的有效性。
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引用次数: 7
Implementation of the Berlekamp-Massey algorithm using a DSP 使用DSP实现Berlekamp-Massey算法
Q3 Arts and Humanities Pub Date : 2004-12-13 DOI: 10.1109/ICECS.2004.1399692
S. Greenberg, Nir Feldblum, Gal Melamed
Reed-Solomon (RS) codes are error-correcting codes used in many of today's communication systems. RS encoding and decoding are typically implemented using dedicated hardware elements used in ADSL modems and digital TV. In this paper we propose using software in lieu of a hardware-based RS de-coder. This is accomplished using the Berlekamp-Massey algorithm, implemented on a programmable DSP. This software-based RS decoder using Berlekamp-Massey is implemented on Motorola's MSC8101 StarCore DSP. In order to evaluate the algorithm we use the following criteria: computation cost; cycle count, critical paths in the decoding scheme, and error location in the codeword. Furthermore, we examine the effect of changing the RS code's k, t parameters and its primitive polynomial in real-time implementation. The Berlekamp-Massey algorithm operates over finite field arithmetic, whose steps, as applied on the StarCore DSP, are discussed in detail and specifically evaluated using the assembly code for the syndrome search. We conclude that the Berlekamp-Massey algorithm, used for RS decoding, should be implemented using long codewords.
里德-所罗门码(RS)是当今许多通信系统中使用的纠错码。RS编码和解码通常使用ADSL调制解调器和数字电视中使用的专用硬件元件来实现。在本文中,我们建议使用软件来代替基于硬件的RS解码器。这是通过在可编程DSP上实现的Berlekamp-Massey算法来完成的。这个基于软件的RS解码器采用Berlekamp-Massey,在摩托罗拉MSC8101 StarCore DSP上实现。为了评估算法,我们使用以下标准:计算成本;循环计数,解码方案中的关键路径,码字中的错误位置。此外,我们还研究了改变RS码的k、t参数及其原始多项式在实时实现中的影响。Berlekamp-Massey算法在有限域算法上运行,其步骤在StarCore DSP上的应用被详细讨论,并使用汇编代码对综合征搜索进行了具体评估。我们得出结论,用于RS解码的Berlekamp-Massey算法应该使用长码字来实现。
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引用次数: 4
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Giornale di Storia Costituzionale
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