Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583742
M. Isberg, P. Jonsson, F. Masszi, F. Vojdani, H. Bleichner, M. Rosling, E. Nordlander
This paper discusses the importance of reliable physical models/parameters used in drift-diffusion device simulation of power devices. Simple devices, diodes, and considerably more complicated structures, Gate Turn-Off thyristors (GTO:s) have been investigated. Using both electrical and optical measurement techniques, comparisons have been made between measured data and simulated results. A proposal is made for new Auger recombination parameter values and for the temperature dependence of the Shockley-Read-Hall lifetime in the temperature range of 300-450 K.
{"title":"Experimentally verified, temperature dependent physical models/parameters for power device simulation","authors":"M. Isberg, P. Jonsson, F. Masszi, F. Vojdani, H. Bleichner, M. Rosling, E. Nordlander","doi":"10.1109/ISPSD.1994.583742","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583742","url":null,"abstract":"This paper discusses the importance of reliable physical models/parameters used in drift-diffusion device simulation of power devices. Simple devices, diodes, and considerably more complicated structures, Gate Turn-Off thyristors (GTO:s) have been investigated. Using both electrical and optical measurement techniques, comparisons have been made between measured data and simulated results. A proposal is made for new Auger recombination parameter values and for the temperature dependence of the Shockley-Read-Hall lifetime in the temperature range of 300-450 K.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131121367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583693
A. Porst
IGBTs and MCTs are power devices, which in addition to the well established thyristors and GTOs, also have a utility in high voltage applications. The static characteristics, such as blocking voltage and forward voltage drop, do not demonstrate basic physical limitations. The resulting power dissipation must be handled in such a way that certain temperature limits are not exceeded. Physically imposed limits may however become restrictive during switching, if at high current densities the time dependent dynamic blocking capability of the device can not meet the requirements imposed by the load. The interaction between the switch and freewheeling diode in hard switching modes, such as those found in chopper and converter designs, is important but not considered in publications. It is shown that in such a situation the diode may prove to be the weakest element. A safe operating area can often only be defined if the switching characteristics of the switch sufficiently reduce the requirements placed on the diode. This is relatively simple to achieve in the case of an IGBT although with a higher power dissipation in the transistor. The switching characteristics of a MCT are not readily modified and as a result a reduction in stress on the diode is only possible by means of a snubber circuit.
{"title":"Ultimate limits of an IGBT (MCT) for high voltage applications in conjunction with a diode","authors":"A. Porst","doi":"10.1109/ISPSD.1994.583693","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583693","url":null,"abstract":"IGBTs and MCTs are power devices, which in addition to the well established thyristors and GTOs, also have a utility in high voltage applications. The static characteristics, such as blocking voltage and forward voltage drop, do not demonstrate basic physical limitations. The resulting power dissipation must be handled in such a way that certain temperature limits are not exceeded. Physically imposed limits may however become restrictive during switching, if at high current densities the time dependent dynamic blocking capability of the device can not meet the requirements imposed by the load. The interaction between the switch and freewheeling diode in hard switching modes, such as those found in chopper and converter designs, is important but not considered in publications. It is shown that in such a situation the diode may prove to be the weakest element. A safe operating area can often only be defined if the switching characteristics of the switch sufficiently reduce the requirements placed on the diode. This is relatively simple to achieve in the case of an IGBT although with a higher power dissipation in the transistor. The switching characteristics of a MCT are not readily modified and as a result a reduction in stress on the diode is only possible by means of a snubber circuit.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125230342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583669
R. Constapel, J. Korec
The forward blocking characteristics of lateral power devices on SOI-substrate are analyzed using two-dimensional numerical device simulation and compared with measurements of LIGBT and LDMOS devices. The critical influence of different emitter structures on the leakage current and breakdown voltage of the LIGBT are discussed in detail. Sketching the trade-off between forward blocking and on-state voltage drop, it will be shown, that a LIGBT with convenient shorted anode can have a similar blocking characteristic compared to the LDMOS without sacrificing its superior on-state behaviour, even at temperatures up to 225/spl deg/C.
{"title":"Forward blocking characteristics of SOI power devices at high temperatures","authors":"R. Constapel, J. Korec","doi":"10.1109/ISPSD.1994.583669","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583669","url":null,"abstract":"The forward blocking characteristics of lateral power devices on SOI-substrate are analyzed using two-dimensional numerical device simulation and compared with measurements of LIGBT and LDMOS devices. The critical influence of different emitter structures on the leakage current and breakdown voltage of the LIGBT are discussed in detail. Sketching the trade-off between forward blocking and on-state voltage drop, it will be shown, that a LIGBT with convenient shorted anode can have a similar blocking characteristic compared to the LDMOS without sacrificing its superior on-state behaviour, even at temperatures up to 225/spl deg/C.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115670270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583694
T. Laska, A. Porst, H. Brunner, W. Kiffe
A new 1200 V-IGBT chip is presented which has an optimized planar cell structure for lowest on-state voltage, but that nevertheless guarantees a very high degree of ruggedness. The key point for these features is a new self aligned process concept with a double implanted submicron emitter structure, which will be the basis also for a lower voltage IGBT (600 V) as well as for high voltage IGBTs (1600 V and higher).
{"title":"A low loss/highly rugged IGBT-generation based on a self aligned process with double implanted n/n/sup +/-emitter","authors":"T. Laska, A. Porst, H. Brunner, W. Kiffe","doi":"10.1109/ISPSD.1994.583694","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583694","url":null,"abstract":"A new 1200 V-IGBT chip is presented which has an optimized planar cell structure for lowest on-state voltage, but that nevertheless guarantees a very high degree of ruggedness. The key point for these features is a new self aligned process concept with a double implanted submicron emitter structure, which will be the basis also for a lower voltage IGBT (600 V) as well as for high voltage IGBTs (1600 V and higher).","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126122543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583789
R. Zambrano, G. Cacciola, S. Leonardi
A new edge structure for 2 KVolt Power IC operation is introduced which features low concentration rings defined on two epilayers to increase the final junction depth. Computer simulations performed to assess the structure viability have been followed by experiments varying the implant dose. Breakdown voltages up to 2000 and 1200 Volts have been measured on UHV and VHV wafers for a wide range of implanted doses demonstrating good process latitude. Production devices featuring the new structure have been fabricated, preliminary results on an off-line SMPS are presented.
{"title":"A new edge structure for 2 KVolt power IC operation","authors":"R. Zambrano, G. Cacciola, S. Leonardi","doi":"10.1109/ISPSD.1994.583789","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583789","url":null,"abstract":"A new edge structure for 2 KVolt Power IC operation is introduced which features low concentration rings defined on two epilayers to increase the final junction depth. Computer simulations performed to assess the structure viability have been followed by experiments varying the implant dose. Breakdown voltages up to 2000 and 1200 Volts have been measured on UHV and VHV wafers for a wide range of implanted doses demonstrating good process latitude. Production devices featuring the new structure have been fabricated, preliminary results on an off-line SMPS are presented.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127734711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583620
H. Kabza, H. Schulze, Y. Gerstenmaier, P. Voss, J. Schmid, F. Pfirsch, K. Platzoder
DC stress tests on high power semiconductor devices at nominal device ratings yielded unexpected device failures. Without prior indication the devices were destroyed spontaneously anywhere in the bulk. The failure rate depends exponentially on the applied voltage. By transferring the test setup into a salt mine 130 m below ground we were able to prove that cosmic radiation is the cause for these failures. So far the only means to reduce the failure rate is to reduce the maximum field within the device by appropriate design.
{"title":"Cosmic radiation as a cause for power device failure and possible countermeasures","authors":"H. Kabza, H. Schulze, Y. Gerstenmaier, P. Voss, J. Schmid, F. Pfirsch, K. Platzoder","doi":"10.1109/ISPSD.1994.583620","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583620","url":null,"abstract":"DC stress tests on high power semiconductor devices at nominal device ratings yielded unexpected device failures. Without prior indication the devices were destroyed spontaneously anywhere in the bulk. The failure rate depends exponentially on the applied voltage. By transferring the test setup into a salt mine 130 m below ground we were able to prove that cosmic radiation is the cause for these failures. So far the only means to reduce the failure rate is to reduce the maximum field within the device by appropriate design.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133981078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583738
Y.C. Gerstenmaief
This paper presents a study on the variation of carrier lifetime with temperature, mainly in GTO-thyristors, and its consequences on measured and simulated device behaviour (gate trigger current). A theoretical analysis is given in order to explain the results qualitatively. From the observed temperature dependence of the gate trigger current the appropriate /spl tau/(T)-law is inferred. In the region of 25/spl deg/C to 125/spl deg/C a strictly linear increase of /spl tau/ is found.
{"title":"A study on the variation of carrier lifetime with temperature in bipolar silicon devices and its influence on device operation","authors":"Y.C. Gerstenmaief","doi":"10.1109/ISPSD.1994.583738","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583738","url":null,"abstract":"This paper presents a study on the variation of carrier lifetime with temperature, mainly in GTO-thyristors, and its consequences on measured and simulated device behaviour (gate trigger current). A theoretical analysis is given in order to explain the results qualitatively. From the observed temperature dependence of the gate trigger current the appropriate /spl tau/(T)-law is inferred. In the region of 25/spl deg/C to 125/spl deg/C a strictly linear increase of /spl tau/ is found.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125055630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583746
A. Laporte, G. Sarrabayrouse, L. Lescouzères, A. Peyrelavigne, M. Benamara, A. Rocher, A. Claverie
We have studied the influence of the flatness and the relative misorientation of two contacting wafers on the Spreading Resistance profiles obtained in the interfacial region after direct bonding. Both parameters are shown to have a significant influence on the electrical properties of the structure. Plan-view Transmission Electron Microscopy examination of the interfaces suggests that this influence may take its origin from dislocation-related electrically active defects.
{"title":"Influence of the mechanical conditions on the electrical and structural properties of the interface between directly bonded silicon wafers","authors":"A. Laporte, G. Sarrabayrouse, L. Lescouzères, A. Peyrelavigne, M. Benamara, A. Rocher, A. Claverie","doi":"10.1109/ISPSD.1994.583746","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583746","url":null,"abstract":"We have studied the influence of the flatness and the relative misorientation of two contacting wafers on the Spreading Resistance profiles obtained in the interfacial region after direct bonding. Both parameters are shown to have a significant influence on the electrical properties of the structure. Plan-view Transmission Electron Microscopy examination of the interfaces suggests that this influence may take its origin from dislocation-related electrically active defects.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115964385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583797
S. Wong, N. Majid
A 500 V pre-regulator power IC is presented that is capable of supplying 20 V to 150 V into a variety of loads including televisions and DC motors. The chip measures 13.5 sq.mm., and uses a lateral IGBT (LIGBT) structure as a 10 A power switch. The control consists of novel current-mode sensing circuits that allow low-power, high-voltage sensing without using off-chip voltage dividers, The resulting circuit utilizes few components and demonstrates the feasibility for low EMI meeting FCC requirements.
{"title":"A single-chip pre-regulator circuit using LIGBT and current mode sensing","authors":"S. Wong, N. Majid","doi":"10.1109/ISPSD.1994.583797","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583797","url":null,"abstract":"A 500 V pre-regulator power IC is presented that is capable of supplying 20 V to 150 V into a variety of loads including televisions and DC motors. The chip measures 13.5 sq.mm., and uses a lateral IGBT (LIGBT) structure as a 10 A power switch. The control consists of novel current-mode sensing circuits that allow low-power, high-voltage sensing without using off-chip voltage dividers, The resulting circuit utilizes few components and demonstrates the feasibility for low EMI meeting FCC requirements.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125819600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-31DOI: 10.1109/ISPSD.1994.583757
M. Corsi, F. Fattori
With the increased levels of sophistication now being seen in modern cars, many auto manufacturers are investigating means by which they can reduce the complexity of the wiring harness in the average car. In order to achieve this they are developing interface standards to survive in the harsh automotive environment. In this paper we will talk about the design of an interface chip conforming to the VAN standard.
{"title":"High voltage automotive interface design, in a VLSI compatible BiCmos technology","authors":"M. Corsi, F. Fattori","doi":"10.1109/ISPSD.1994.583757","DOIUrl":"https://doi.org/10.1109/ISPSD.1994.583757","url":null,"abstract":"With the increased levels of sophistication now being seen in modern cars, many auto manufacturers are investigating means by which they can reduce the complexity of the wiring harness in the average car. In order to achieve this they are developing interface standards to survive in the harsh automotive environment. In this paper we will talk about the design of an interface chip conforming to the VAN standard.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122285720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：