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28th Annual Proceedings on Reliability Physics Symposium最新文献

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Hot-carrier reliability of bipolar transistors 双极晶体管的热载流子可靠性
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66081
D. Burnett, C. Hu
A study of bipolar degradation over a range of stress and measurement conditions is presented. It is shown that the excess base current, Delta I/sub B/, varies in a power-law manner with J/sub C/, I/sub R/, and t. The I/sub R/ dependence results from a significant nonlocal effect in electron temperature that occurs at the periphery of the emitter due to the narrow depletion width. A quasistatic model of the degradation, suitable for SPICE circuit simulation, is presented and used to simulate the degradation of a BiCMOS inverter and differential pair circuit. The simulation of an advanced BiCMOS process indicates a degradation in the low-to-high propagation delay of 7% and 300 K and 3% at 110 K after 10 years of operation with C/sub L/=2 pf and V/sub CC/=5.5 V. For emitter-coupled pair circuits, the base current degradation can create a voltage drop across the base resistance, resulting in an additional offset voltage component. With the modeling methodology presented, one can predict the effect of varying the emitter-extrinsic-base junction doping profile on circuit reliability.<>
双极退化的研究范围内的应力和测量条件提出。结果表明,过量基极电流δ I/sub B/随J/sub C/、I/sub R/和t呈幂律变化。I/sub R/依赖关系源于发射极外围由于耗尽宽度窄而产生的电子温度的显著非局域效应。提出了一种适合SPICE电路仿真的准静态退化模型,并应用该模型对BiCMOS逆变器和差动对电路的退化进行了仿真。在C/sub L/=2 pf, V/sub CC/=5.5 V的条件下,运行10年后,在300 K和110 K时,低到高的传输延迟分别下降了7%和3%。对于发射器耦合对电路,基极电流衰减可以在基极电阻上产生电压降,从而产生额外的失调电压分量。利用所提出的建模方法,可以预测改变发射极-外基结掺杂分布对电路可靠性的影响。
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引用次数: 20
Charge loss associated with program disturb stresses in EPROMs eprom中与程序干扰应力有关的电荷损失
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66079
T. Miller, S. Illyés, D. Baglee
Program disturb or V/sub t/ shifts due to bit line stress for EPROMs continues to be a major reliability issue among semiconductor manufacturers, but very little information exists on these mechanisms. It is shown that program disturb is a defect mechanism, and the effects of voltage and temperature are studied. The impact on programming and extended read cycles is also evaluated.<>
由于eprom的位线应力引起的程序干扰或V/sub /移位仍然是半导体制造商的主要可靠性问题,但关于这些机制的信息很少。结果表明程序干扰是一种缺陷机制,并研究了电压和温度对程序干扰的影响。对编程和延长读周期的影响也进行了评估
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引用次数: 5
Effect of mold compound components on moisture-induced degradation of gold-aluminium bonds in epoxy encapsulated devices 模具复合组分对环氧封装器件中金铝键湿致降解的影响
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66095
A. Gallo
Degradation of the intermetallic region of the gold wire-aluminium bonding pad interface of several types of IC devices in plastic packages is accelerated by moisture at relatively low temperatures (121-135 degrees C), leading to near-complete loss of strength after 300-400 h of autoclave testing. Measurement of bonding strength as a function of steam-autoclave time in a designed experiment shows that one common component of semiconductor molding compounds (Sb/sub 2/O/sub 3/) is the overriding factor in causing ball-lift. In support of this conclusion, a variety of brominated flame retardants, including those that claimed to be more stable to Br release, were tested in similar formulations and all were found to give ball-bond degradation, to about the same degree, when Sb/sub 2/O/sub 3/ was present. Cross sections of the bonds that show the Sb/sub 2/O/sub 3/-induced degradation and elemental analysis of the pulled ball-bonds suggest that the degradative reaction starts at the interface of the gold-rich intermetallic and the gold ball. Antimony trioxide appears to be associated with the Al portion of the Au-Al ball-bond intermetallics, and to be participating in the reactions or affecting the reactivity of Al in a high-moisture environment. These results contrast with several previous reports that Sb/sub 2/O/sub 3/ improves wire bond reliability in a dry environment.<>
在相对较低的温度下(121-135℃),湿气会加速塑料封装中几种IC器件的金线-铝键合垫界面金属间区域的降解,导致在高压灭菌器测试300-400小时后强度几乎完全丧失。在一个设计的实验中,测量了键合强度与蒸汽蒸压时间的关系,结果表明,半导体成型化合物的一个共同成分(Sb/sub 2/O/sub 3/)是引起球升的主要因素。为了支持这一结论,对各种溴化阻燃剂,包括那些声称对Br释放更稳定的阻燃剂,在类似的配方中进行了测试,发现当存在Sb/sub 2/O/sub 3/时,所有的溴化阻燃剂都有大约相同程度的球键降解。由Sb/sub - 2/O/sub - 3 -诱导的键的横截面和对拉球键的元素分析表明,降解反应始于富金金属间化合物与金球的界面。三氧化二锑似乎与Au-Al球键金属间化合物的Al部分有关,并且在高湿度环境下参与反应或影响Al的反应活性。这些结果与之前的一些报道形成了对比,即Sb/sub 2/O/sub 3/可以提高干燥环境下的丝键可靠性。
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引用次数: 24
Carbon doping effects on hot electron trapping 碳掺杂对热电子俘获的影响
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66102
H. Haddad, L. Forbes, P. Burke, W. Richling
The injection of hot electrons in submicrometer MOS devices constitutes a serious limitation on the application and reliability of these devices. It is shown that carbon doping can significantly reduce or delay this ageing process and the shifts of threshold voltages of MOS transistors with time. Carbon doping has been achieved by both using carbon-doped substrates and by ion implantation of carbon.<>
在亚微米MOS器件中,热电子的注入严重限制了器件的应用和可靠性。结果表明,碳掺杂可以显著减缓或延缓这一老化过程和MOS晶体管阈值电压随时间的变化。碳掺杂可以通过碳掺杂衬底和碳离子注入两种方法来实现。
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引用次数: 2
A newly developed model for stress induced slit-like voiding 新建立的应力诱导裂隙状空化模型
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66086
H. Kaneko, M. Hasunuma, A. Sawabe, T. Kawanoue, Y. Kohanawa, S. Komatsu, M. Miyauchi
Thermodynamic analysis of stress-induced voiding has indicated that a slit-like void is the origin of metal line open failures. Wedge-shaped voids nucleate initially at specific grain boundaries where
应力诱导空化的热力学分析表明,裂隙型空化是金属线开口破坏的根源。楔形孔洞最初在特定晶界处成核
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引用次数: 14
The electrical resistance ratio (RR) as a thin film metal monitor 电阻比(RR)作为金属薄膜监视器
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66073
W. Baerg, K. Wu, P. Davies, G. Dao, D. Fraser
Data that demonstrate the usefulness of RR, the electrical resistance ratio between 298 K and 77 K, for monitoring the equality of Al-Si metal films are presented. A correlation between RR, electromigration median-time-to-fail (MTTF), and median-grain-radius (MGR) of the metal is shown, using examples of N/sub 2/ and H/sub 2/O contaminated films.<>
本文给出的数据表明,电阻率(RR)在298k和77k之间的电阻比对于监测铝硅金属薄膜的均匀性是有用的。以N/sub 2/和H/sub 2/O污染薄膜为例,给出了金属的RR、电迁移中失效时间(MTTF)和中晶粒半径(MGR)之间的相关性
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引用次数: 7
Relation between thehot carrier lifetime of transistors and CMOS SRAM products 晶体管热载流子寿命与CMOS SRAM产品的关系
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66083
J. van der Pol, J. Koomen
The hot-carrier degradation of static RAMs is discussed. During the stress, an increase of the access times, the minimum operating voltage, and the write times is observed. The latter two can be directly related, even quantitatively, to the degradation of the access transistor of the memory cell. Comparison of product and transistor lifetimes show that their voltage dependence is the same, but that the product lifetime is significantly (about a factor 50) larger. The discrepancy is caused by the small sensitivity of the SRAM to transistor degradation, and by duty cycle effects It is concluded that the product lifetime is severely underestimated if it is straightforwardly derived from static transistor lifetime data only. The true product lifetime should be obtained from stressing the product.<>
讨论了静态ram的热载流子退化问题。在应力期间,可以观察到访问次数、最小工作电压和写次数的增加。后两者可以直接相关,甚至定量地,到存储器单元的存取晶体管的退化。产品寿命和晶体管寿命的比较表明,它们的电压依赖性是相同的,但产品寿命明显(约50倍)大。这种差异是由于SRAM对晶体管退化的敏感性小,以及占空比效应造成的。结论是,如果仅从静态晶体管寿命数据直接推导出产品寿命,则严重低估了产品寿命。真正的产品寿命应该从对产品的受力中得到。
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引用次数: 29
An improved probe sharpening technique (microelectronics failure analysis) 一种改进的探针锐化技术(微电子失效分析)
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66064
M. Kimball
An electrochemical probe-sharpening technique with useful microelectronics applications is discussed. This technique was originally designed for scanning tunneling microscope tips. Probe tips produced by the technique are both sharp and strong. In addition, the tip radius is easily set by monitoring current flow during the etch, making it possible to automate the procedure. A circuit for this purpose is given.<>
讨论了一种具有微电子应用价值的电化学探针锐化技术。这项技术最初是为扫描隧道显微镜尖端而设计的。该技术生产的探针尖端既锋利又坚固。此外,通过监测蚀刻过程中的电流,可以很容易地设置尖端半径,从而使该过程自动化。文中给出了用于此目的的电路。
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引用次数: 0
Temperature-cycling acceleration factors for aluminium metallization failure in VLSI applications VLSI应用中铝金属化失效的温度循环加速因子
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66096
C. Dunn, J. McPherson
Low-cycle fatigue data for four common aluminium failure mechanisms in VLSI applications are presented; fractured intermetallic bond failure, chip-out bond failure, shear-stress-induced metal movement and passivation cracking and tensile-stress-induced metal notching and voiding (stress migration). Except for the tensile-stress-induced notching and voiding, uniform acceleration exists when commonly used accelerated temperature cycling ranges are compared: 0 degrees C/125 degrees C, -40 degrees C/85 degrees C, -40 degrees C/140 degrees C, and -65 degrees C/150 degrees C. Tensile-stress induced metal notching and voiding is not uniformly accelerated by temperature cycling; it is accelerated more effectively by simple elevated temperature storage. A temperature-cycling acceleration factor model, based on the Coffin-Manson law, is presented. The problem of using only the temperature cycling range when calculating the acceleration factor is highlighted.<>
给出了VLSI应用中四种常见铝失效机制的低周疲劳数据;断裂的金属间键破坏,脱落的键破坏,剪切应力引起的金属移动和钝化,开裂和拉伸应力引起的金属缺口和空洞(应力迁移)。除拉应力致缺口和落穴外,在常用的加速温度循环范围内:0℃/125℃、-40℃/85℃、-40℃/140℃、-65℃/150℃,均存在均匀加速。温度循环对拉应力致缺口和落穴的加速不均匀;通过简单的高温储存可以更有效地加速。提出了基于Coffin-Manson定律的温度循环加速度因子模型。在计算加速因子时,只使用温度循环范围的问题被突出。
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引用次数: 39
Reliability study of thin inter-poly dielectrics for non-volatile memory application 非易失性存储器用薄聚间介电体的可靠性研究
Pub Date : 1990-03-27 DOI: 10.1109/RELPHY.1990.66076
S. Mori, Y. Kaneko, N. Arai, Y. Ohshima, H. Araki, K. Narita, E. Sakagami, K. Yoshikawa
The key factors which dominate the leakage current in poly-oxide are reviewed, and intrinsic limitations in thinner poly-oxide to device application are investigated. The ON (oxide-nitride-oxide) structure that overcomes poly-oxide thinning limitations is described. This stacked film exhibits superior electric field strength due to the inherent electron trapping-assisted self-limiting process. UV erase characteristics for EPROM cells with the ONO structure are considered. The scaling-down of the ONO interpoly dielectric, taking into consideration memory cell charge retention capability, is discussed.<>
综述了影响聚氧化物泄漏电流的关键因素,并研究了薄聚氧化物在器件应用中的固有局限性。描述了克服多氧化物稀释限制的ON(氧化物-氮化物-氧化物)结构。由于固有的电子捕获辅助自限制过程,这种堆叠薄膜表现出优越的电场强度。考虑了具有ONO结构的EPROM细胞的紫外擦除特性。在考虑存储单元电荷保持能力的情况下,讨论了ONO内插介质的缩小问题。
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引用次数: 21
期刊
28th Annual Proceedings on Reliability Physics Symposium
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