Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795402
Ayana Mizutani, S. Takamatsu, T. Itoh, Zymelka Maria, Takeshi Kobayashi
An ultrathin Si MEMS piezoresistive strain sensor was used to fabricate a glove-shaped wearable device that can be used in VR and surgical assistance. In this paper, we proposed a mounting structure that reduces strain concentration at the connection between the sensor and the wiring. The proposed mounting structure was able to withstand strains of up to 66.9%. With this structure, we succeeded in measuring the bending motion of fingers with the constructed wearable device.
{"title":"Glove-shaped wearable device using flexible MEMS sensor","authors":"Ayana Mizutani, S. Takamatsu, T. Itoh, Zymelka Maria, Takeshi Kobayashi","doi":"10.23919/ICEP55381.2022.9795402","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795402","url":null,"abstract":"An ultrathin Si MEMS piezoresistive strain sensor was used to fabricate a glove-shaped wearable device that can be used in VR and surgical assistance. In this paper, we proposed a mounting structure that reduces strain concentration at the connection between the sensor and the wiring. The proposed mounting structure was able to withstand strains of up to 66.9%. With this structure, we succeeded in measuring the bending motion of fingers with the constructed wearable device.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"4 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132089304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795426
Kodai Murabe, N. Unno, K. Yuki, Koichi Suzuki
A compact cooling device, which can remove a high heat flux, is needed for next-generation electronics, such as power semiconductors. Boiling heat transfer (BHT) is a promising cooling technology because the heat transfer coefficient of BHT is much higher than that of conventional single-phase flow cooling. On the other hand, boiling characteristics using a compact vessel must be investigated to downsize the cooling devices using BHT. In this study, subcooled boiling characteristics are investigated using a liquid chamber. In particular, the control method of liquid subcooling in the liquid chamber was experimentally examined. As a result, the experimental result suggests that the liquid subcooling should be kept at high to remove a high heat flux using microbubble emission boiling even when a liquid chamber was operated at low pressure with water.
{"title":"Subcooled boiling in a liquid chamber for high heat flux cooling","authors":"Kodai Murabe, N. Unno, K. Yuki, Koichi Suzuki","doi":"10.23919/ICEP55381.2022.9795426","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795426","url":null,"abstract":"A compact cooling device, which can remove a high heat flux, is needed for next-generation electronics, such as power semiconductors. Boiling heat transfer (BHT) is a promising cooling technology because the heat transfer coefficient of BHT is much higher than that of conventional single-phase flow cooling. On the other hand, boiling characteristics using a compact vessel must be investigated to downsize the cooling devices using BHT. In this study, subcooled boiling characteristics are investigated using a liquid chamber. In particular, the control method of liquid subcooling in the liquid chamber was experimentally examined. As a result, the experimental result suggests that the liquid subcooling should be kept at high to remove a high heat flux using microbubble emission boiling even when a liquid chamber was operated at low pressure with water.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114293759","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795465
Rakesh Kumar, F. Ke, Dustin England, Angie Summers, L. Young
This new development solves growing issues of halogen-free reliability and corrosion protection of next-generation, flexible and highly-dense electronics in harsh environments through an ultra-thin, completely halogen free vapor-phase coating, and also as a substrate for flexible electronics. To meet the industry’s current and future requirements worldwide, this presentation introduces a new halogen-free Parylene, ParyFree, to the electronics industry and shares the characterization and qualification results of ParyFree Parylene conformal coating for the protection, reliability and robust performance of all types of electronics. Testing on the new coating includes IPX water resistance, 85/85 exposure, corrosion resistance and qualification per IPC-CC-830B.
{"title":"A New Halogen-Free Vapor Phase Coating for High Reliability & Protection of Electronics in Corrosive and Other Harsh Environments","authors":"Rakesh Kumar, F. Ke, Dustin England, Angie Summers, L. Young","doi":"10.23919/ICEP55381.2022.9795465","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795465","url":null,"abstract":"This new development solves growing issues of halogen-free reliability and corrosion protection of next-generation, flexible and highly-dense electronics in harsh environments through an ultra-thin, completely halogen free vapor-phase coating, and also as a substrate for flexible electronics. To meet the industry’s current and future requirements worldwide, this presentation introduces a new halogen-free Parylene, ParyFree, to the electronics industry and shares the characterization and qualification results of ParyFree Parylene conformal coating for the protection, reliability and robust performance of all types of electronics. Testing on the new coating includes IPX water resistance, 85/85 exposure, corrosion resistance and qualification per IPC-CC-830B.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127420373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795470
T. Araki, Kou-Tan Li, Naoko Kurihira, Yuko Kasai, D. Suzuki, Satsuki Yasui, Y. Kawano, T. Sekitani
Flexible hybrid electronics (FHE) has the potential to realize flexible and light large-area electronics by integrating the benefits of traditional semiconductor processing. In addition, printable electronics is expected to lead to resource and energy savings. In this study, we have developed stretchable printed circuit boards, with excellent ductility, on which light-emitting diodes (LEDs) and light sensors were mounted to fabricate sheet-type arrays. The technology developed herein for light-sensing systems based on light sources and detectors is expected to be used as a nondestructive method to inspect objects with arbitrary surfaces.
{"title":"Stretchable Printed Circuit Board for Wireless Light-Sensing System","authors":"T. Araki, Kou-Tan Li, Naoko Kurihira, Yuko Kasai, D. Suzuki, Satsuki Yasui, Y. Kawano, T. Sekitani","doi":"10.23919/ICEP55381.2022.9795470","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795470","url":null,"abstract":"Flexible hybrid electronics (FHE) has the potential to realize flexible and light large-area electronics by integrating the benefits of traditional semiconductor processing. In addition, printable electronics is expected to lead to resource and energy savings. In this study, we have developed stretchable printed circuit boards, with excellent ductility, on which light-emitting diodes (LEDs) and light sensors were mounted to fabricate sheet-type arrays. The technology developed herein for light-sensing systems based on light sources and detectors is expected to be used as a nondestructive method to inspect objects with arbitrary surfaces.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126904918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795453
F. Kato, S. Sato, H. Hozoji, M. Ikegawa, A. Sakai, K. Watanabe, S. Harada, H. Sato
In this paper, thermal impedance (Zth) of power modules which is assembled with a silicon carbide Schottky barrier diode (SiC-SBD) and metal oxide semiconductor field effect transistor (SiC-MOSFET) was measured and compared. SiC-MOSFETs had gate pads that accounted for 6% of the die size. SiC-MOSFETs had up to 55% higher thermal impedance and 13% higher steady-state thermal resistance compared to SiC-SBDs. Although the gate pad occupies only a small area in the device chip, it was found to have a significant difference on the thermal impedance of SiC power modules, especially in the short time region.
{"title":"Effect of Gate Pad Layout on Thermal Impedance of SiC-MOSFET","authors":"F. Kato, S. Sato, H. Hozoji, M. Ikegawa, A. Sakai, K. Watanabe, S. Harada, H. Sato","doi":"10.23919/ICEP55381.2022.9795453","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795453","url":null,"abstract":"In this paper, thermal impedance (Zth) of power modules which is assembled with a silicon carbide Schottky barrier diode (SiC-SBD) and metal oxide semiconductor field effect transistor (SiC-MOSFET) was measured and compared. SiC-MOSFETs had gate pads that accounted for 6% of the die size. SiC-MOSFETs had up to 55% higher thermal impedance and 13% higher steady-state thermal resistance compared to SiC-SBDs. Although the gate pad occupies only a small area in the device chip, it was found to have a significant difference on the thermal impedance of SiC power modules, especially in the short time region.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126911497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795627
T. Iwasaki
A materials-informatics technology for designing stable and strong interfaces has been developed by use of advanced molecular simulation that can calculate the delamination energy as the adhesion strength. Because biobased materials such as a plant-derived resin (polyamide 11) and DNAs are eco-friendly materials with carbon neutrality, these materials are considered as semiconductor package substrates and insulating materials. So, the developed informatics technology is applied to the interfaces between polyamide 11 and ceramics used as fillers. At the first stage, the lattice constants were selected as the important, dominant ceramic parameters from four ceramic parameters (the shortside and long-side lattice constants, surface energy density, and cohesive energy) by using sensitivity analysis based on the orthogonal array with the delamination-energy data calculated from advanced molecular simulation. At the second stage, the adhesion strength (delamination energy) is expressed as a function of the important ceramic parameters (i.e., the short-side and long-side lattice constants) by using a response-surface method (Kriging method). At the third stage, by solving the maximum-value problem of the function, it was found that the strongest interface was obtained when the lattice misfits between ceramics and polyamide 11 were zero. By using yttria-doped zirconia as a ceramic material, the strongest interface between polyamide 11 and ceramics was obtained because the coherent interface with no lattice misfit was obtained.
{"title":"Materials Informatics Technology for Using Bio-based Materials","authors":"T. Iwasaki","doi":"10.23919/ICEP55381.2022.9795627","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795627","url":null,"abstract":"A materials-informatics technology for designing stable and strong interfaces has been developed by use of advanced molecular simulation that can calculate the delamination energy as the adhesion strength. Because biobased materials such as a plant-derived resin (polyamide 11) and DNAs are eco-friendly materials with carbon neutrality, these materials are considered as semiconductor package substrates and insulating materials. So, the developed informatics technology is applied to the interfaces between polyamide 11 and ceramics used as fillers. At the first stage, the lattice constants were selected as the important, dominant ceramic parameters from four ceramic parameters (the shortside and long-side lattice constants, surface energy density, and cohesive energy) by using sensitivity analysis based on the orthogonal array with the delamination-energy data calculated from advanced molecular simulation. At the second stage, the adhesion strength (delamination energy) is expressed as a function of the important ceramic parameters (i.e., the short-side and long-side lattice constants) by using a response-surface method (Kriging method). At the third stage, by solving the maximum-value problem of the function, it was found that the strongest interface was obtained when the lattice misfits between ceramics and polyamide 11 were zero. By using yttria-doped zirconia as a ceramic material, the strongest interface between polyamide 11 and ceramics was obtained because the coherent interface with no lattice misfit was obtained.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115591989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795501
K. Okamoto, K. Okamoto, K. Morishita, A. Okuno
The bipolar transistor was invented in 1948 by W. Shockley at Bell Laboratories in the United States. Since then, the transistor has advanced along with the progress of integrated circuit technology, leading to today's advanced information society. Surprisingly, however, the bipolar transistor itself has not shown any significant technological progress. In this paper, we introduce the recently invented "Distar", a revolutionary transistor consisting of only LED and Si solar cell.
{"title":"Development of Photoelectric Conversion Transistor Consisting of High-power LED and Si Solar Cell","authors":"K. Okamoto, K. Okamoto, K. Morishita, A. Okuno","doi":"10.23919/ICEP55381.2022.9795501","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795501","url":null,"abstract":"The bipolar transistor was invented in 1948 by W. Shockley at Bell Laboratories in the United States. Since then, the transistor has advanced along with the progress of integrated circuit technology, leading to today's advanced information society. Surprisingly, however, the bipolar transistor itself has not shown any significant technological progress. In this paper, we introduce the recently invented \"Distar\", a revolutionary transistor consisting of only LED and Si solar cell.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115594782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795524
Y. Chao, Chi-Chieh Li, C. Chung
In this study, uniaxial electrospinning was used to prepare silicon-based oxide fluorescent nanofibers. Polyvinylpyrrolidone was mixed with alcohol and dimethylformamide, and tetraethoxysilane was used as the silicon source to prepare the precursor. Finally, yttrium nitrate, calcium nitrate, and europium nitrate are added to the solution for electrospinning,Use scanning electron microscope to investigate the surface morphology of nanofibers; thermogravimetric analyzer to measure weight loss at different temperatures and water drop angle tester to test hydrophilic and hydrophobic properties. After observing the surface morphology of the nanofibers with a scanning electron microscope, the average diameter of the as-spun fibers was 143 nm and the average diameter of the fibers after calcined at 600 °C was 147 nm.
{"title":"A Study of Silicon-based Oxide Fluorescent Nanofibers by Electrospinning","authors":"Y. Chao, Chi-Chieh Li, C. Chung","doi":"10.23919/ICEP55381.2022.9795524","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795524","url":null,"abstract":"In this study, uniaxial electrospinning was used to prepare silicon-based oxide fluorescent nanofibers. Polyvinylpyrrolidone was mixed with alcohol and dimethylformamide, and tetraethoxysilane was used as the silicon source to prepare the precursor. Finally, yttrium nitrate, calcium nitrate, and europium nitrate are added to the solution for electrospinning,Use scanning electron microscope to investigate the surface morphology of nanofibers; thermogravimetric analyzer to measure weight loss at different temperatures and water drop angle tester to test hydrophilic and hydrophobic properties. After observing the surface morphology of the nanofibers with a scanning electron microscope, the average diameter of the as-spun fibers was 143 nm and the average diameter of the fibers after calcined at 600 °C was 147 nm.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125405745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795431
W. Teng, J. Lee, Hsin-Ming Tseng, Liang-Yih Hung, Don Son Jiang, Yu-Po Wang
This study explored the impact of additives on the application of underfill in large-size fan-out multichip module packages. The experimental results of a high-temperature storage test demonstrated that the selected underfill developed cracks. Optical microscope examination of a cross section of the cracks revealed an oxidation layer. Through addition of an anti-oxidation agent to the underfill, both forming of the oxidation layer and cracking in the underfill resulting from thermal oxidation were prevented. By contrast, when an underfill without an added flexibilizer was used in the large-size fan-out multichip module package and subjected to a temperature cycling test, cracks were observed in the chip corners, which had formed because of excessive stress in the package. When both the antioxidant and flexibilizer were added to the underfill, the generation of thermal oxidation–induced and stress-induced cracks in the package was prevented.
{"title":"Stress and Reliability Challenges of Underfills in Large-Size Fan-Out Multichip Module Packages","authors":"W. Teng, J. Lee, Hsin-Ming Tseng, Liang-Yih Hung, Don Son Jiang, Yu-Po Wang","doi":"10.23919/ICEP55381.2022.9795431","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795431","url":null,"abstract":"This study explored the impact of additives on the application of underfill in large-size fan-out multichip module packages. The experimental results of a high-temperature storage test demonstrated that the selected underfill developed cracks. Optical microscope examination of a cross section of the cracks revealed an oxidation layer. Through addition of an anti-oxidation agent to the underfill, both forming of the oxidation layer and cracking in the underfill resulting from thermal oxidation were prevented. By contrast, when an underfill without an added flexibilizer was used in the large-size fan-out multichip module package and subjected to a temperature cycling test, cracks were observed in the chip corners, which had formed because of excessive stress in the package. When both the antioxidant and flexibilizer were added to the underfill, the generation of thermal oxidation–induced and stress-induced cracks in the package was prevented.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121657060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-11DOI: 10.23919/ICEP55381.2022.9795621
H. H. Liao, K. Chiang
This study focuses on the more efficient packaging reliability prediction by considering cluster analysis and regression algorithm simultaneously. The Wafer Level Chip Scale Packaging (WLCSP) experiencing Accelerated Thermal Cycling Test (ACTC) is observed. After confirming what the failure situation is, database with various dimensions is built through validated finite element models. Next, machine learning technique is introduced. One of algorithms, Polynomial Regression(PR), is selected to predict the reliabilities of different packaging because of its accuracy and advantage in calculation time. Moreover, that combining K-Means analysis obtains optimal result is the goal.
{"title":"Research on Polynomial Regression Machine Learning Model with K-Means Algorithm for Predicting Advanced Packaging Reliability","authors":"H. H. Liao, K. Chiang","doi":"10.23919/ICEP55381.2022.9795621","DOIUrl":"https://doi.org/10.23919/ICEP55381.2022.9795621","url":null,"abstract":"This study focuses on the more efficient packaging reliability prediction by considering cluster analysis and regression algorithm simultaneously. The Wafer Level Chip Scale Packaging (WLCSP) experiencing Accelerated Thermal Cycling Test (ACTC) is observed. After confirming what the failure situation is, database with various dimensions is built through validated finite element models. Next, machine learning technique is introduced. One of algorithms, Polynomial Regression(PR), is selected to predict the reliabilities of different packaging because of its accuracy and advantage in calculation time. Moreover, that combining K-Means analysis obtains optimal result is the goal.","PeriodicalId":413776,"journal":{"name":"2022 International Conference on Electronics Packaging (ICEP)","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134045478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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