Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377874
K. Okada
This paper presents a hot-carrier injection (HCI) healing technique with a 60GHz wireless transceiver in 65nm CMOS. The transceiver is capable of 16QAM wireless communication with a data rate of 7Gb/s. The damaged output power can be recovered to 7.8dBm by the proposed HCI-healing technique, and an 81-year lifetime is achieved.
{"title":"A 60GHz CMOS transceiver considering HCI reliability","authors":"K. Okada","doi":"10.1109/RFIT.2015.7377874","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377874","url":null,"abstract":"This paper presents a hot-carrier injection (HCI) healing technique with a 60GHz wireless transceiver in 65nm CMOS. The transceiver is capable of 16QAM wireless communication with a data rate of 7Gb/s. The damaged output power can be recovered to 7.8dBm by the proposed HCI-healing technique, and an 81-year lifetime is achieved.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124115073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377919
H. Kanaya
This paper presents a high-efficient 0.18μm CMOS class-E power amplifier (PA) for 5GHz wireless transmitter applications using constant envelope modulation scheme. The proposed class-E PA employs injection-locking technique to reduce required input power. This PA was placed on the lead frame and molded in the packaging for transmitter application. In our design, bonding wires are optimized by using EM simulation. And the coplanar waveguide structure in the RF port was composed of bonding wires. Our PA module is composed of PA in package, PCB, DC cable and SMA connectors. This PA module has a measured PAE = 41.0 %.
{"title":"5GHz-band CMOS class-E power amplifier module considering wire bonding","authors":"H. Kanaya","doi":"10.1109/RFIT.2015.7377919","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377919","url":null,"abstract":"This paper presents a high-efficient 0.18μm CMOS class-E power amplifier (PA) for 5GHz wireless transmitter applications using constant envelope modulation scheme. The proposed class-E PA employs injection-locking technique to reduce required input power. This PA was placed on the lead frame and molded in the packaging for transmitter application. In our design, bonding wires are optimized by using EM simulation. And the coplanar waveguide structure in the RF port was composed of bonding wires. Our PA module is composed of PA in package, PCB, DC cable and SMA connectors. This PA module has a measured PAE = 41.0 %.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132680079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377914
K. Ishida, R. Shabanpour, T. Meister, B. K. Boroujeni, C. Carta, F. Ellinger, L. Petti, N. Munzenrieder, G. Salvatore, G. Troster
This paper presents an AM receiver implemented in a flexible a-IGZO TFT technology. The circuit consists of a four-stage cascode amplifier at the RF input, a detector based on a source follower, and a common-source circuit for the baseband amplification. The measured conversion gain is very flat against frequency and exceeds 15 dB for carrier frequencies ranging from 2 to 20 MHz, which covers a relevant portion of the shortwave radio band. The 3 dB-bandwidth of the baseband signal ranges from 400 Hz to 10 kHz: this is comparable to the so-called voice band and is suitable to low-rate data communications. Additionally, the AM receiver is tested in combination with two textile antennas. The flexible a-IGZO receiver successfully detected the baseband signal through the textile antennas, demonstrating for the first time wireless transmission for this class of technologies.
{"title":"20 MHz carrier frequency AM receiver in flexible a-IGZO TFT technology with textile antennas","authors":"K. Ishida, R. Shabanpour, T. Meister, B. K. Boroujeni, C. Carta, F. Ellinger, L. Petti, N. Munzenrieder, G. Salvatore, G. Troster","doi":"10.1109/RFIT.2015.7377914","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377914","url":null,"abstract":"This paper presents an AM receiver implemented in a flexible a-IGZO TFT technology. The circuit consists of a four-stage cascode amplifier at the RF input, a detector based on a source follower, and a common-source circuit for the baseband amplification. The measured conversion gain is very flat against frequency and exceeds 15 dB for carrier frequencies ranging from 2 to 20 MHz, which covers a relevant portion of the shortwave radio band. The 3 dB-bandwidth of the baseband signal ranges from 400 Hz to 10 kHz: this is comparable to the so-called voice band and is suitable to low-rate data communications. Additionally, the AM receiver is tested in combination with two textile antennas. The flexible a-IGZO receiver successfully detected the baseband signal through the textile antennas, demonstrating for the first time wireless transmission for this class of technologies.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1969 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128034974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377868
I. Akita
To implement a true wirelessly connected brain-machine interface (BMI) system, we have to consider two main aspects: circuit design and device fabrication. The circuit should be designed so as to implement many functionalities including neural recording/stimulation and wireless connection with ultralow-power operation. The fabricated devices are passive elements such as a nano/micro electrode array and RF antenna devices with good biocompatibility. These aspects should be not be considered independently, but be done together from the viewpoint of the device assembly. This paper introduces a method to develop fully implantable devices with high-performance Si CMOS LSIs and many functionalities by employing flexible device technology.
{"title":"Development of low-power analog/RF mixed-signal circuits with flexible thin film devices for wireless BMI systems","authors":"I. Akita","doi":"10.1109/RFIT.2015.7377868","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377868","url":null,"abstract":"To implement a true wirelessly connected brain-machine interface (BMI) system, we have to consider two main aspects: circuit design and device fabrication. The circuit should be designed so as to implement many functionalities including neural recording/stimulation and wireless connection with ultralow-power operation. The fabricated devices are passive elements such as a nano/micro electrode array and RF antenna devices with good biocompatibility. These aspects should be not be considered independently, but be done together from the viewpoint of the device assembly. This paper introduces a method to develop fully implantable devices with high-performance Si CMOS LSIs and many functionalities by employing flexible device technology.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129163394","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377901
K. Katayama, S. Amakawa, K. Takano, M. Fujishima
An injection-locked frequency divider (ILFD) is utilized to divide the frequency of a voltage-controlled oscillator (VCO). We propose an ILFD that can be directly connected to a VCO by minimizing the input capacitance of the input nodes. The capacitance is reduced by limiting the number of MOSFETs connected to the injection nodes. We fabricated a 54 GHz divide-by-4 ILFD using 65 nm CMOS technology whose core area is 60 × 90 μm2. By limiting the number of driven MOSFETs and reducing the parasitic capacitance, a locking range of 430 MHz is achieved at a -20 dBm input. The power consumption is 21 mW with a 1.2 V supply and the phase noise is -120 dBc/Hz at a 1 MHz offset.
{"title":"Parasitic conscious 54 GHz divide-by-4 injection-locked frequency divider","authors":"K. Katayama, S. Amakawa, K. Takano, M. Fujishima","doi":"10.1109/RFIT.2015.7377901","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377901","url":null,"abstract":"An injection-locked frequency divider (ILFD) is utilized to divide the frequency of a voltage-controlled oscillator (VCO). We propose an ILFD that can be directly connected to a VCO by minimizing the input capacitance of the input nodes. The capacitance is reduced by limiting the number of MOSFETs connected to the injection nodes. We fabricated a 54 GHz divide-by-4 ILFD using 65 nm CMOS technology whose core area is 60 × 90 μm2. By limiting the number of driven MOSFETs and reducing the parasitic capacitance, a locking range of 430 MHz is achieved at a -20 dBm input. The power consumption is 21 mW with a 1.2 V supply and the phase noise is -120 dBc/Hz at a 1 MHz offset.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122776367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
An ET-PA used for battery supplied Front-End Module (FEM) is fabricated with IBM 0.18μm silicon-on-insulator (SOI) CMOS process. The 2-stages single-end SOI CMOS PA employs stacked-FET along with optimal bias and cancelling capacitance variation linearization method. Harmonic short at the output is used for improved linearity and stability. The supply modulator employs hybrid topology for linearity and efficiency trade-off. In measurement, the LTE signal mask is met without using a digital pre-distortion technique. For 20MHz 16QAM long-term evolution (LTE) signal at 2.3GHz carrier, the ET-PA module achieves a power-added efficiency of 30% with an error vector magnitude of 3.4% and an adjacent channel leakage ratio of 30dBc at an average output power of 26dBm.
{"title":"A power amplifier with envelope tracking used for cellular front-end module based on 0.18μm SOI CMOS process","authors":"Yanbin Xiao, Chunqi Yao, Yu Liu, Zhiqiang Li, Haiying Zhang","doi":"10.1109/RFIT.2015.7377920","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377920","url":null,"abstract":"An ET-PA used for battery supplied Front-End Module (FEM) is fabricated with IBM 0.18μm silicon-on-insulator (SOI) CMOS process. The 2-stages single-end SOI CMOS PA employs stacked-FET along with optimal bias and cancelling capacitance variation linearization method. Harmonic short at the output is used for improved linearity and stability. The supply modulator employs hybrid topology for linearity and efficiency trade-off. In measurement, the LTE signal mask is met without using a digital pre-distortion technique. For 20MHz 16QAM long-term evolution (LTE) signal at 2.3GHz carrier, the ET-PA module achieves a power-added efficiency of 30% with an error vector magnitude of 3.4% and an adjacent channel leakage ratio of 30dBc at an average output power of 26dBm.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131297537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377949
Takahiro Tsushima, H. Takeuchi, M. Kimishima
This paper describes a 10 MHz-6 GHz high power high linearity 35 dB digital step attenuator monolithic microwave integrated circuit (MMIC) for radio frequency automated test equipment (RF ATE) systems. The digital step attenuator MMIC is fabricated using a novel Schottky gallium nitride high electron mobility transistor (GaN HEMT) process that is characterized in very low gate leakage current with tantalum oxy nitride (TaON) passivation technology. Owing to the characteristic of the developed GaN HEMT, circuit topologies for improving large signal performance in wideband from lower frequency can be employed, and the MMIC shows input 1 dB compression point (IP1dB) of more than +40 dBm and input 3rd order intercept point (IIP3) of more than +55 dBm.
{"title":"A 10 MHz-6 GHz high power high linearity 35 dB digital step attenuator MMIC using GaN HEMTs with TaON passivation","authors":"Takahiro Tsushima, H. Takeuchi, M. Kimishima","doi":"10.1109/RFIT.2015.7377949","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377949","url":null,"abstract":"This paper describes a 10 MHz-6 GHz high power high linearity 35 dB digital step attenuator monolithic microwave integrated circuit (MMIC) for radio frequency automated test equipment (RF ATE) systems. The digital step attenuator MMIC is fabricated using a novel Schottky gallium nitride high electron mobility transistor (GaN HEMT) process that is characterized in very low gate leakage current with tantalum oxy nitride (TaON) passivation technology. Owing to the characteristic of the developed GaN HEMT, circuit topologies for improving large signal performance in wideband from lower frequency can be employed, and the MMIC shows input 1 dB compression point (IP1dB) of more than +40 dBm and input 3rd order intercept point (IIP3) of more than +55 dBm.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124925913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377906
Takeo Owada, M. Motoyoshi, S. Kameda, N. Suematsu, T. Takagi, K. Tsubouchi
Recently, RFIC flip-chip mounting technique is very important to make small size and high frequency transceivers like mobile phones. The conventional flip-chip mounting uses Au stud bump bonding (SBB) and requires complicated process which includes forming and leveling of the bumps. In order to simplify the RFIC flip-chip process, we introduce a fiber type anisotropic conductive film (ACF) adhesive. This flip-chip mounting process does not require the SBB process and is suitable for transceiver system RFIC's having large number I/O pins. The interconnection between the RFIC and the substrate is confirmed by the 3D-CT images. The RF performance of the interconnection is measured and analyzed. The measured return loss of this interconnection is more than 10dB below 4.2GHz.
{"title":"RFIC flip-chip interconnection using a fiber type anisotropic conductive film","authors":"Takeo Owada, M. Motoyoshi, S. Kameda, N. Suematsu, T. Takagi, K. Tsubouchi","doi":"10.1109/RFIT.2015.7377906","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377906","url":null,"abstract":"Recently, RFIC flip-chip mounting technique is very important to make small size and high frequency transceivers like mobile phones. The conventional flip-chip mounting uses Au stud bump bonding (SBB) and requires complicated process which includes forming and leveling of the bumps. In order to simplify the RFIC flip-chip process, we introduce a fiber type anisotropic conductive film (ACF) adhesive. This flip-chip mounting process does not require the SBB process and is suitable for transceiver system RFIC's having large number I/O pins. The interconnection between the RFIC and the substrate is confirmed by the 3D-CT images. The RF performance of the interconnection is measured and analyzed. The measured return loss of this interconnection is more than 10dB below 4.2GHz.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124257640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377889
Yuan Liang, Hao Yu, Wenjuan Zhang, F. Lin
A low-loss, high isolation and high extinction-ratio (ER) modulator is proposed in this paper at sub-THz in CMOS. The modulator manifests itself as a modified split ring resonator (SRR) whose magnetic resonance frequency can be modulated by high speed data. Such a magnetic metamaterial achieves a significant reduction of radiation loss with high extinction ratio at sub-THz by stacking two SRR unit-cells with opposite placement. The insertion loss is improved due to a much compact size. Simulation results shows that the proposed modulator can effectively modulate 25Gbps data, achieving 5dB insertion loss at on-state while 28dB isolation at off-state corresponding to 23dB extinction ratio at 140GHz with only an silicon area of 40μm×67μm. The introduced SRR modulator has shown great potential for future on-chip sub-THz communication.
{"title":"CMOS sub-THz on-chip modulator by stacked split ring resonator with high-extinction ratio","authors":"Yuan Liang, Hao Yu, Wenjuan Zhang, F. Lin","doi":"10.1109/RFIT.2015.7377889","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377889","url":null,"abstract":"A low-loss, high isolation and high extinction-ratio (ER) modulator is proposed in this paper at sub-THz in CMOS. The modulator manifests itself as a modified split ring resonator (SRR) whose magnetic resonance frequency can be modulated by high speed data. Such a magnetic metamaterial achieves a significant reduction of radiation loss with high extinction ratio at sub-THz by stacking two SRR unit-cells with opposite placement. The insertion loss is improved due to a much compact size. Simulation results shows that the proposed modulator can effectively modulate 25Gbps data, achieving 5dB insertion loss at on-state while 28dB isolation at off-state corresponding to 23dB extinction ratio at 140GHz with only an silicon area of 40μm×67μm. The introduced SRR modulator has shown great potential for future on-chip sub-THz communication.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121155955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377943
Yong Huang, N. Shinohara, T. Mitani
Impedance matching is a common issue in wireless power transfer system. This paper focuses a novel viewpoint on DC-DC converter for resistance conversion in rectifying circuit. We give a theoretical analysis on the input/output resistance relation and voltage relation of three topologies DC-DC converters both in continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The input resistance of buck-boost converter in DCM is independent of the input voltage and load resistance. We succeed in applying this buck-boost converter in microwave power transfer system for impedance matching.
{"title":"Theoretical analysis on DC-DC converter for impedance matching of a rectifying circuit in wireless power transfer","authors":"Yong Huang, N. Shinohara, T. Mitani","doi":"10.1109/RFIT.2015.7377943","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377943","url":null,"abstract":"Impedance matching is a common issue in wireless power transfer system. This paper focuses a novel viewpoint on DC-DC converter for resistance conversion in rectifying circuit. We give a theoretical analysis on the input/output resistance relation and voltage relation of three topologies DC-DC converters both in continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The input resistance of buck-boost converter in DCM is independent of the input voltage and load resistance. We succeed in applying this buck-boost converter in microwave power transfer system for impedance matching.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122178588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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