Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377931
N. Xu, Sitao Lv, W. Rhee, Zhihua Wang
This paper describes a frequency and phase-locked loop (F/PLL) based two-point modulator architecture for FMCW generation. A semi-digital ΔΣ PLL without a linear TDC is designed to form a nested-loop DCO with a constant gain in the F/PLL. A frequency error caused by a time-varying phase offset in the analog control path with a long modulation period can be mitigated by the loop gain of the frequency-locked loop (FLL). A prototype two-point modulator implemented in 0.18μm CMOS achieves frequency accuracy of <;100kHzrms for >10ms modulation period, showing that the proposed F/PLL can be a useful module for accurate detection and high velocity resolution FMCW radar systems.
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Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377872
Hiroyuki Ito, A. Shirane, N. Ishihara, K. Masu
This paper introduces a quadrature modulation transmitter featuring the new IF-based quadrature backscattering technique to yield spectral efficient modulation schemes while reducing the power consumption. A 5.8 GHz RF-powered transceiver with the proposed transmitter was fabricated in 65 nm Si CMOS technology. The transmitter achieves 2.5 Mb/s, 32-QAM modulation while consuming 113 μW under 0.6 V power supply.
本文介绍了一种采用基于中频的正交后向散射技术的正交调制发射机，该技术在降低功耗的同时产生了频谱高效的调制方案。采用65nm Si CMOS技术制作了5.8 GHz射频收发器。该发射机在0.6 V电源下实现2.5 Mb/s、32-QAM调制，功耗为113 μW。
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Pub Date : 2015-08-01DOI: 10.1109/RFIT.2015.7377918
G. Jeong, Bonhoon Koo, T. Joo, Songcheol Hong
This paper presents two kinds of linearization techniques for RF CMOS Power Amplifiers (PAs). One is the linearization technique using adaptively controlled biases of Common Source (CS) and Common Gate (CG) amplifier in a cascode structure The ethers are the power-cell linearization techniques such as large signal multi-gated transistor (LS-MGTR) of a CS amplifier and adaptive power cell (APC) of CG amplifier.
{"title":"Linearization of RF CMOS power amplifiers","authors":"G. Jeong, Bonhoon Koo, T. Joo, Songcheol Hong","doi":"10.1109/RFIT.2015.7377918","DOIUrl":"https://doi.org/10.1109/RFIT.2015.7377918","url":null,"abstract":"This paper presents two kinds of linearization techniques for RF CMOS Power Amplifiers (PAs). One is the linearization technique using adaptively controlled biases of Common Source (CS) and Common Gate (CG) amplifier in a cascode structure The ethers are the power-cell linearization techniques such as large signal multi-gated transistor (LS-MGTR) of a CS amplifier and adaptive power cell (APC) of CG amplifier.","PeriodicalId":422369,"journal":{"name":"2015 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125628399","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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