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2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)最新文献

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Analysis and Optimization of a Multi-Layer Integrated Organic Substrate for High Current GaN HEMT-Based Power Module 高电流GaN hemt功率模块多层集成有机衬底的分析与优化
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360269
E. Gurpinar, Raj Sahu, B. Ozpineci, D. DeVoto
In this paper, analysis and optimization of a multi-layer organic substrate for high current GaN HEMT based power module are discussed. The organic multi-layer substrates can provide high electrical performance in terms of low parasitic inductance in the power loop by providing vertical layout, and shielding for reduction of common-mode noise, a common problem in fast switching power converters. Furthermore, high performance cooling solutions, such as micro-channel heat sinks, can be directly bonded to the substrate for optimum thermal management. The structure of the proposed architecture, thermal analysis and optimization of layer thickness, thermo-mechanical stress analysis of the GaN HEMT and development of a high-performance heat sink are discussed.
本文讨论了用于大电流GaN HEMT功率模块的多层有机衬底的分析和优化。有机多层基板通过提供垂直布局,在功率回路中提供低寄生电感方面提供高电性能,并屏蔽减少共模噪声,这是快速开关功率变换器的常见问题。此外,高性能的冷却解决方案,如微通道散热器,可以直接连接到基板上,以实现最佳的热管理。讨论了GaN HEMT的结构、热分析和层厚优化、热机械应力分析以及高性能散热器的开发。
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引用次数: 8
A SiC IGBT Behavioral Model with High Accuracy and Fast Convergence 高精度、快速收敛的SiC IGBT行为模型
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360262
Lubin Han, Lin Liang, Yong Kang
In order to study the mechanisms of SiC IGBT, optimize the SiC IGBT based power conversion system and predict the electro-thermal performance of the circuits, a simple, high-speed and accurate behavioral model of SiC IGBT is proposed. In this model, three controlled current sources are used to simulate the voltage and displacement current of the three parasitic capacitors of SiC IGBT. The other two controlled current sources are used to simulate the I-V characteristics and tail current characteristics of SiC IGBT respectively. In the model, the interpolation method instead of the conventional polynomial fitting method is adopted, which could simulate the static I-V characteristics and C-V characteristics more accurately. The method to extract the C-V curves by using dv/dt and displacement current is proposed, which could accurately simulate the punch-through effect of SiC IGBT under high voltage. The proposed model is more concise, more accurate and faster than the existing complex physical based mathematical model, which is suitable for system level circuit simulation based on SiC IGBT.
为了研究SiC IGBT的作用机理,优化基于SiC IGBT的功率转换系统,预测电路的电热性能,提出了一种简单、高速、准确的SiC IGBT行为模型。该模型采用3个可控电流源对SiC IGBT的3个寄生电容的电压和位移电流进行仿真。另外两个可控电流源分别模拟了SiC IGBT的I-V特性和尾电流特性。在模型中,采用插值法代替传统的多项式拟合方法,可以更准确地模拟静态I-V特性和C-V特性。提出了利用dv/dt和位移电流提取C-V曲线的方法,可以准确模拟SiC IGBT在高压下的穿通效应。该模型比现有的基于复杂物理的数学模型更简洁、准确、快速,适用于基于SiC IGBT的系统级电路仿真。
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引用次数: 1
A 1 MHz Boost DC-DC Converter with Turn on ZCS Capability to Reduce EMI 具有开启ZCS能力的1mhz升压DC-DC变换器以降低EMI
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360268
H. Yoshioka, J. Furuta, Kazutoshi Kobayashi
This paper proposes a boost DC-DC converter with turn-on zero current switching (ZCS) capability to suppress electromagnetic interference (EMI) generated from an output diode. When a switching component turn on, reverse current flows from the output diode. In SiC-SBD, reverse recovery time is very short and conduction loss is small, but noise is increased by switching speed over MHz. By operating in discontinuous current mode, noise at turn-on can be reduced. However, at high frequency over MHz, the conduction loss increases because peak current flowing through the switching component and inductor increases. Radiated EMI of the boost DC-DC converter is reduced by the ZCS soft switching at turn on operating in the continuous current mode. Measurement results of EMI of the ZCS DC-DC converter were presented to confirm EMI suppression from the ZCS operation.
提出了一种具有导通零电流开关(ZCS)能力的升压DC-DC变换器,用于抑制输出二极管产生的电磁干扰(EMI)。当开关元件接通时,反向电流从输出二极管流出。在SiC-SBD中,反向恢复时间很短,导通损耗小,但在MHz以上的开关速度会增加噪声。通过在断续电流模式下工作,可以降低导通时的噪声。然而,在超过MHz的高频下,由于流过开关元件和电感的峰值电流增加,导通损耗增加。升压DC-DC变换器工作在连续电流模式下,通过在导通时采用ZCS软开关降低了其辐射电磁干扰。给出了ZCS直流-直流变换器的电磁干扰测量结果,证实了ZCS工作对电磁干扰的抑制作用。
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引用次数: 0
48 V-12 V Isolated-type DC/DC converter miniaturized using GaN transistors and operating at 2-MHz switching frequency Koki Sakamoto Atsushi Yamaguchi Ken Nakahara 48 V-12 V隔离型DC/DC变换器小型化,采用GaN晶体管,工作在2 mhz开关频率
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360289
K. Sakamoto, Atsushi Yamaguchi, K. Nakahara
The compatibility of high switching-frequency $(f_{sw})$ and high efficiency is achieved using GaN transistors in 48 V-12 V isolation-type DC/DC converter. High fsw increases power loss, but generate a downward trend for the required magnetic flux per switch. Hence, an optimal fsw is found for gaining the compatibility. The prior-to-experiment loss estimation proves that $f_{sw}sim 2$ MHz is optimal, and a converter with the size of 25.0 mm $times$16.8 mm $times$ 4.5 mm is made assuming that GaN-FETs are employed. With an air-cooled condition of 2m/s, this converter can transfer 129 W output power and its maximum power conversion efficiency reach to 95.3%.
在48v - 12v隔离型DC/DC变换器中采用GaN晶体管,实现了高开关频率和高效率的兼容。高fsw增加了功率损耗,但产生了每开关所需磁通的下降趋势。因此,找到了获得兼容性的最佳fsw。实验前损耗估计证明了$f_{sw}sim 2$ MHz是最优的,并且假设使用gan - fet,得到了一个尺寸为25.0 mm $ $ × 16.8 mm $ $ × 4.5 mm的变换器。在2m/s的风冷工况下,该变流器输出功率可达129 W,最大功率转换效率可达95.3%。
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引用次数: 0
Parasitic Parameters Analysis and Design of Snubber Circuit on PCB for High-frequency Wireless Power Transfer 高频无线传输PCB缓冲电路的寄生参数分析与设计
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360290
Masamichi Yamaguchi, K. Kusaka, J. Itoh
This paper presents an analysis of the PCB pattern, which is for a high-frequency inverter circuit. In a high-frequency inverter circuit, the design of the snubber circuit, which suppresses surge voltage, is essential to achieve kilowatt operation. The authors are aiming to simulate a surge voltage in order to decide the parameters of the snubber circuit. In this paper, the surge voltage is simulated using the analysis result of the PCB and the models of the passive components. Furthermore, the surge voltage with changing the snubber capacitor is evaluated in order to make the relationship between the surge voltage and the snubber circuit parameters as the first step of the parameters design by using simulation.
本文对高频逆变电路的PCB图进行了分析。在高频逆变电路中,抑制浪涌电压的缓冲电路的设计是实现千瓦级工作的关键。作者的目的是模拟一个浪涌电压,以确定缓冲电路的参数。本文利用PCB板的分析结果和无源器件的模型对浪涌电压进行了仿真。此外,通过仿真计算了改变缓冲电容时的浪涌电压,将浪涌电压与缓冲电路参数之间的关系作为参数设计的第一步。
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引用次数: 0
Characterization of Al-foil/p -4H-SiC SBDs Fabricated by DW with Variation of Process Conditions DW制备al -箔/p -4H-SiC固态硬盘的工艺条件变化
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360265
Mehadi Hasan Ziko, A. Koel, T. Rang
Silicon carbide (SiC) is a wide-bandgap (WBG) semiconductor material with high thermal conductivity and radiation harness that have good potential to develop a new generation of power devices for operating at the higher temperature, high frequency, high power applications. In this paper, various manufacturing process (MP) parameters of diffusion welding (DW) p-type 4H-SiC Schottky contact developments are studied. Deposition temperature and pressure influence the DW Schottky barrier diodes (SBD) electrical characteristics and observed their barrier inhomogeneity. The lower doping concentration in the epilayer improves the Schottky contact characteristics with the same MP parameters. Additionally, Schottky contact with DW deposition technology shows better electrical contact compare to ion-sputtering deposition technique. Furthermore, temperature dependency of forward current-voltage (I–V), capacitance-voltage (C–V), and barrier height correspond to ideality factors measurements of DW two-MP parameters shows that there are higher barrier inhomogeneities at the metal and SiC interface compare to one-MP parameters for Aluminum (Al)-foil/p 4H–SiC SBDs.
碳化硅(SiC)是一种宽禁带(WBG)半导体材料,具有高导热性和辐射线束特性,具有开发新一代功率器件的良好潜力,可用于更高温度、高频率、高功率的应用。本文研究了扩散焊(DW) p型4H-SiC肖特基触点发展的各种工艺参数。沉积温度和压力对DW肖特基势垒二极管(SBD)的电特性有影响,并观察到其势垒不均匀性。在相同的MP参数下,较低的掺杂浓度改善了肖特基接触特性。此外,与离子溅射沉积技术相比,肖特基接触DW沉积技术表现出更好的电接触。此外,正向电流电压(I-V)、电容电压(C-V)和势垒高度对理想因子的温度依赖性表明,DW双mp参数的测量表明,与单mp参数相比,铝(Al)箔/p 4H-SiC sdd在金属和SiC界面处具有更高的势垒不均匀性。
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引用次数: 0
A Study on MHz Switching Operation in Flyback Converter for Lithium Ion Battery and its Parallelization 锂离子电池反激变换器中MHz开关操作及其并行化研究
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360294
Kentaro Nakayama, N. Satoh
Lithium-ion batteries (LiBs) have been widely used as consumer rechargeable batteries. We use the flyback topology, which is a type of isolated DC/DC converter, as the boosting circuit for an LiB. In this study, the flyback converter is operated with a single LiB in both the main and gate drive circuits. The switching frequency of conventional flyback converters is in the range of several hundred kHz. However, we aim to drive the flyback converter at 2.1MHz. Accordingly, Si and GaN devices are compared, and Liqualloy magnetic materials are investigated. Then, the components suitable for our field of use are reexamined. Additionally, our approach for the parallelization of the circuit to compensate for the drop in the output voltage of the LiB is described.
锂离子电池(LiBs)作为可充电电池已得到广泛应用。我们使用反激拓扑,这是一种隔离的DC/DC转换器,作为LiB的升压电路。在本研究中,反激变换器在主电路和栅极驱动电路中都使用单个LiB进行操作。传统反激变换器的开关频率在几百千赫范围内。然而,我们的目标是驱动2.1MHz的反激变换器。因此,比较了硅和氮化镓器件,并对液态合金磁性材料进行了研究。然后,重新检查适合我们使用领域的组件。此外,我们对电路的并行化方法进行了描述,以补偿LiB输出电压的下降。
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引用次数: 1
Design of Press-Pack Packaging for High Voltage SiC DSRD Stack 高压SiC dsd堆叠压包封装设计
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360250
Yingjie Yang, Lin Liang, Hai Shang, Yong Kang, Hui Yan
SiC drift step recovery diode (DSRD) could be applied in the field of nanosecond high-power pulses. There is a demand for packaging for higher voltage and higher speed SiC DSRD. This paper proposes a stacked structure consisting of several high voltage SiC DSRD chips connected in series by rigid press-pack packaging. Finite element simulations performed to investigate the parasitic parameter, thermal performance in the packaging show that the packaging gets low parasitic inductance of about 3.5 nH and favorable heat dissipation capability. For the high-voltage SiC DSRD press-pack modules, the high field concentration around the DSRD chips is more critical. The objective is to build uniform electric field by structural optimization. A methodology to optimize the length of the metal conductive layer inside the packaging is proposed. Finally, the impact of the length on the electric field distribution is investigated quantitatively with Maxwell simulations. The electric field optimization brought by the platform reduces the maximum electric field intensity by 16%, which provides a packaging design reference for the upcoming high-voltage SiC DSRD devices.
SiC漂移阶跃恢复二极管可以应用于纳秒级高功率脉冲领域。对更高电压和更高速度的SiC dsd的封装有需求。本文提出了一种由多个高压SiC dsd芯片通过刚性压包封装串联而成的堆叠结构。对封装的寄生参数和热性能进行了有限元模拟,结果表明该封装具有较低的寄生电感,约为3.5 nH,具有良好的散热性能。对于高压SiC DSRD压封装模块,DSRD芯片周围的高场浓度更为关键。目的是通过结构优化建立均匀电场。提出了一种优化封装内金属导电层长度的方法。最后,通过Maxwell模拟定量研究了长度对电场分布的影响。该平台带来的电场优化使最大电场强度降低了16%,为即将推出的高压SiC dsd器件提供了封装设计参考。
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引用次数: 0
3.3-kV SiC MOSFET Performance and Short-Circuit Capability 3.3 kv SiC MOSFET的性能和短路性能
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360270
Diang Xing, Chen Xie, Ke Wang, Tianshi Liu, Boxue Hu, Jin Wang, A. Agarwal, R. Singh, S. Atcitty
This paper compares the long-channel and short-channel 3300-V, 5-A silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) manufactured by GeneSiC regarding static characteristics and short-circuit (SC) sustaining capability. Their saturation currents were measured up to 2200-V drain bias at different gate voltages. The SC withstand times of two types of devices were measured at 2200-V drain voltage and 1S-V gate voltage. Their SC test results were compared with 1200-V SiC MOSFETs from four different manufactures, which suggested that SiC MOSFETs with longer channel length should have longer sustaining times in a SC event. In addition, the device dynamic characteristic was evaluated. A comprehensive simulation program with integrated circuit emphasis (SPICE) model was developed based on the device test results.
本文比较了GeneSiC公司生产的长通道和短通道3300 v, 5-A碳化硅(SiC)金属氧化物半导体场效应晶体管(mosfet)的静态特性和短路维持能力。在不同的栅极电压下,测量了它们的饱和电流达到2200 v的漏极偏置。测量了两种器件在2200 v漏极电压和1s v栅极电压下的SC耐受次数。他们的SC测试结果与来自四个不同制造商的1200 v SiC mosfet进行了比较,这表明具有更长的沟道长度的SiC mosfet在SC事件中应该具有更长的持续时间。此外,还对器件的动态特性进行了评价。根据器件测试结果,开发了集成电路重点(SPICE)模型的综合仿真程序。
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引用次数: 4
Parasitic Capacitances Characterization of Double-Sided Cooling Power Module Based on GaN Devices 基于GaN器件的双面散热电源模块寄生电容特性研究
Pub Date : 2020-09-23 DOI: 10.1109/WiPDAAsia49671.2020.9360259
Bingyang Li, Kangping Wang, Hongkeng Zhu, Xu Yang, Laili Wang
The parasitic capacitances of a novel double-sided cooling structure of GaN power module are analyzed in this paper. Due to the additional top ceramic substrate of the structure, parasitic capacitances become more complex. By analysis, gate-source parasitic capacitance and gate-drain parasitic capacitance of all GaN devices and drain-source parasitic capacitance of upper GaN device of half bridge circuit are less than 1% of the corresponding intrinsic capacitances. However, the drain-source parasitic capacitance (14% of Coss) of bottom GaN device of half bridge circuit increases by 30% compared with traditional single-sided cooling module, which is acceptable since the thermal resistance of this structure is about halved.
本文分析了一种新型氮化镓功率模块双面冷却结构的寄生电容。由于结构的顶部附加陶瓷衬底,寄生电容变得更加复杂。通过分析,所有GaN器件的栅源寄生电容和栅漏寄生电容以及半桥电路GaN器件的上极漏源寄生电容均小于其固有电容的1%。然而,与传统的单面冷却模块相比,半桥电路底部GaN器件的漏源寄生电容(损耗的14%)增加了30%,这是可以接受的,因为这种结构的热阻大约减半。
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引用次数: 1
期刊
2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)
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