Pub Date : 2020-09-23DOI: 10.1109/wipdaasia49671.2020.9360273
Jin Wei, Meng Zhang, G. Lyu, K. J. Chen
In this work, the substrate effects in GaN-on-Si power ICs are systematically investigated, and a novel GaN power IC platform on engineered bulk silicon substrate is proposed to effectively address these negative effects. For the GaN-on-Si power ICs, the integrated high-side (HS-) transistor and low-side (LS-) transistor have to share a common conductive silicon substrate. The termination of the substrate cannot be optimized for both the HS- and LS-transistors, so one of the transistors has to suffer a significant degradation in the dynamic RON. The proposed engineered bulk silicon substrate provides a common mechanical substrate for both the HS- and LS-transistors. For each of the transistors, the engineered substrate also provides a localized electrical substrate region. The electrical substrate region is isolated from the mechanical substrate by a reversely biased PN junction. TCAD simulations show that the substrate effects are completely eliminated in the novel GaN power IC on engineered bulk silicon substrate.
{"title":"Substrate Effects in GaN-on-Si Integrated Bridge Circuit and Proposal of Engineered Bulk Silicon Substrate for GaN Power ICs","authors":"Jin Wei, Meng Zhang, G. Lyu, K. J. Chen","doi":"10.1109/wipdaasia49671.2020.9360273","DOIUrl":"https://doi.org/10.1109/wipdaasia49671.2020.9360273","url":null,"abstract":"In this work, the substrate effects in GaN-on-Si power ICs are systematically investigated, and a novel GaN power IC platform on engineered bulk silicon substrate is proposed to effectively address these negative effects. For the GaN-on-Si power ICs, the integrated high-side (HS-) transistor and low-side (LS-) transistor have to share a common conductive silicon substrate. The termination of the substrate cannot be optimized for both the HS- and LS-transistors, so one of the transistors has to suffer a significant degradation in the dynamic RON. The proposed engineered bulk silicon substrate provides a common mechanical substrate for both the HS- and LS-transistors. For each of the transistors, the engineered substrate also provides a localized electrical substrate region. The electrical substrate region is isolated from the mechanical substrate by a reversely biased PN junction. TCAD simulations show that the substrate effects are completely eliminated in the novel GaN power IC on engineered bulk silicon substrate.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"67 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115676343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360287
Yuqi Wei, Zhiqing Wang, Quanming Luo, A. Mantooth
In this paper, a graphical user interference (GUI) program based on MATLAB was built for LLC resonant converter. The time domain analysis method is adopted to derive the mathematical model of LLC resonant converter in PO operation mode. The designed MATLAB GUI program has the following features and advantages: 1) key circuit voltages and currents operation waveforms are presented, which can help visualize the steady state operation of the converter; 2) the execution time is only around one second, which is much more faster than commercial simulation software; 3) important currents and voltages values are summarized and listed, which is convenient for users; 4) power loss model is used to obtain the efficiency and power loss distribution information, which is beneficial for LLC converter design; 5) high accuracy and small computation capacity make it suitable for industry applications. Brief introductions for the time domain analysis are presented in this paper. Comparisons between the proposed GUI program and commercial simulation tools are made.
{"title":"A MATLAB GUI Program for LLC Resonant Converter","authors":"Yuqi Wei, Zhiqing Wang, Quanming Luo, A. Mantooth","doi":"10.1109/WiPDAAsia49671.2020.9360287","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360287","url":null,"abstract":"In this paper, a graphical user interference (GUI) program based on MATLAB was built for LLC resonant converter. The time domain analysis method is adopted to derive the mathematical model of LLC resonant converter in PO operation mode. The designed MATLAB GUI program has the following features and advantages: 1) key circuit voltages and currents operation waveforms are presented, which can help visualize the steady state operation of the converter; 2) the execution time is only around one second, which is much more faster than commercial simulation software; 3) important currents and voltages values are summarized and listed, which is convenient for users; 4) power loss model is used to obtain the efficiency and power loss distribution information, which is beneficial for LLC converter design; 5) high accuracy and small computation capacity make it suitable for industry applications. Brief introductions for the time domain analysis are presented in this paper. Comparisons between the proposed GUI program and commercial simulation tools are made.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127736660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360268
H. Yoshioka, J. Furuta, Kazutoshi Kobayashi
This paper proposes a boost DC-DC converter with turn-on zero current switching (ZCS) capability to suppress electromagnetic interference (EMI) generated from an output diode. When a switching component turn on, reverse current flows from the output diode. In SiC-SBD, reverse recovery time is very short and conduction loss is small, but noise is increased by switching speed over MHz. By operating in discontinuous current mode, noise at turn-on can be reduced. However, at high frequency over MHz, the conduction loss increases because peak current flowing through the switching component and inductor increases. Radiated EMI of the boost DC-DC converter is reduced by the ZCS soft switching at turn on operating in the continuous current mode. Measurement results of EMI of the ZCS DC-DC converter were presented to confirm EMI suppression from the ZCS operation.
{"title":"A 1 MHz Boost DC-DC Converter with Turn on ZCS Capability to Reduce EMI","authors":"H. Yoshioka, J. Furuta, Kazutoshi Kobayashi","doi":"10.1109/WiPDAAsia49671.2020.9360268","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360268","url":null,"abstract":"This paper proposes a boost DC-DC converter with turn-on zero current switching (ZCS) capability to suppress electromagnetic interference (EMI) generated from an output diode. When a switching component turn on, reverse current flows from the output diode. In SiC-SBD, reverse recovery time is very short and conduction loss is small, but noise is increased by switching speed over MHz. By operating in discontinuous current mode, noise at turn-on can be reduced. However, at high frequency over MHz, the conduction loss increases because peak current flowing through the switching component and inductor increases. Radiated EMI of the boost DC-DC converter is reduced by the ZCS soft switching at turn on operating in the continuous current mode. Measurement results of EMI of the ZCS DC-DC converter were presented to confirm EMI suppression from the ZCS operation.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131859648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360262
Lubin Han, Lin Liang, Yong Kang
In order to study the mechanisms of SiC IGBT, optimize the SiC IGBT based power conversion system and predict the electro-thermal performance of the circuits, a simple, high-speed and accurate behavioral model of SiC IGBT is proposed. In this model, three controlled current sources are used to simulate the voltage and displacement current of the three parasitic capacitors of SiC IGBT. The other two controlled current sources are used to simulate the I-V characteristics and tail current characteristics of SiC IGBT respectively. In the model, the interpolation method instead of the conventional polynomial fitting method is adopted, which could simulate the static I-V characteristics and C-V characteristics more accurately. The method to extract the C-V curves by using dv/dt and displacement current is proposed, which could accurately simulate the punch-through effect of SiC IGBT under high voltage. The proposed model is more concise, more accurate and faster than the existing complex physical based mathematical model, which is suitable for system level circuit simulation based on SiC IGBT.
{"title":"A SiC IGBT Behavioral Model with High Accuracy and Fast Convergence","authors":"Lubin Han, Lin Liang, Yong Kang","doi":"10.1109/WiPDAAsia49671.2020.9360262","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360262","url":null,"abstract":"In order to study the mechanisms of SiC IGBT, optimize the SiC IGBT based power conversion system and predict the electro-thermal performance of the circuits, a simple, high-speed and accurate behavioral model of SiC IGBT is proposed. In this model, three controlled current sources are used to simulate the voltage and displacement current of the three parasitic capacitors of SiC IGBT. The other two controlled current sources are used to simulate the I-V characteristics and tail current characteristics of SiC IGBT respectively. In the model, the interpolation method instead of the conventional polynomial fitting method is adopted, which could simulate the static I-V characteristics and C-V characteristics more accurately. The method to extract the C-V curves by using dv/dt and displacement current is proposed, which could accurately simulate the punch-through effect of SiC IGBT under high voltage. The proposed model is more concise, more accurate and faster than the existing complex physical based mathematical model, which is suitable for system level circuit simulation based on SiC IGBT.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"1 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132610131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360265
Mehadi Hasan Ziko, A. Koel, T. Rang
Silicon carbide (SiC) is a wide-bandgap (WBG) semiconductor material with high thermal conductivity and radiation harness that have good potential to develop a new generation of power devices for operating at the higher temperature, high frequency, high power applications. In this paper, various manufacturing process (MP) parameters of diffusion welding (DW) p-type 4H-SiC Schottky contact developments are studied. Deposition temperature and pressure influence the DW Schottky barrier diodes (SBD) electrical characteristics and observed their barrier inhomogeneity. The lower doping concentration in the epilayer improves the Schottky contact characteristics with the same MP parameters. Additionally, Schottky contact with DW deposition technology shows better electrical contact compare to ion-sputtering deposition technique. Furthermore, temperature dependency of forward current-voltage (I–V), capacitance-voltage (C–V), and barrier height correspond to ideality factors measurements of DW two-MP parameters shows that there are higher barrier inhomogeneities at the metal and SiC interface compare to one-MP parameters for Aluminum (Al)-foil/p 4H–SiC SBDs.
{"title":"Characterization of Al-foil/p -4H-SiC SBDs Fabricated by DW with Variation of Process Conditions","authors":"Mehadi Hasan Ziko, A. Koel, T. Rang","doi":"10.1109/WiPDAAsia49671.2020.9360265","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360265","url":null,"abstract":"Silicon carbide (SiC) is a wide-bandgap (WBG) semiconductor material with high thermal conductivity and radiation harness that have good potential to develop a new generation of power devices for operating at the higher temperature, high frequency, high power applications. In this paper, various manufacturing process (MP) parameters of diffusion welding (DW) p-type 4H-SiC Schottky contact developments are studied. Deposition temperature and pressure influence the DW Schottky barrier diodes (SBD) electrical characteristics and observed their barrier inhomogeneity. The lower doping concentration in the epilayer improves the Schottky contact characteristics with the same MP parameters. Additionally, Schottky contact with DW deposition technology shows better electrical contact compare to ion-sputtering deposition technique. Furthermore, temperature dependency of forward current-voltage (I–V), capacitance-voltage (C–V), and barrier height correspond to ideality factors measurements of DW two-MP parameters shows that there are higher barrier inhomogeneities at the metal and SiC interface compare to one-MP parameters for Aluminum (Al)-foil/p 4H–SiC SBDs.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124358153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360294
Kentaro Nakayama, N. Satoh
Lithium-ion batteries (LiBs) have been widely used as consumer rechargeable batteries. We use the flyback topology, which is a type of isolated DC/DC converter, as the boosting circuit for an LiB. In this study, the flyback converter is operated with a single LiB in both the main and gate drive circuits. The switching frequency of conventional flyback converters is in the range of several hundred kHz. However, we aim to drive the flyback converter at 2.1MHz. Accordingly, Si and GaN devices are compared, and Liqualloy magnetic materials are investigated. Then, the components suitable for our field of use are reexamined. Additionally, our approach for the parallelization of the circuit to compensate for the drop in the output voltage of the LiB is described.
{"title":"A Study on MHz Switching Operation in Flyback Converter for Lithium Ion Battery and its Parallelization","authors":"Kentaro Nakayama, N. Satoh","doi":"10.1109/WiPDAAsia49671.2020.9360294","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360294","url":null,"abstract":"Lithium-ion batteries (LiBs) have been widely used as consumer rechargeable batteries. We use the flyback topology, which is a type of isolated DC/DC converter, as the boosting circuit for an LiB. In this study, the flyback converter is operated with a single LiB in both the main and gate drive circuits. The switching frequency of conventional flyback converters is in the range of several hundred kHz. However, we aim to drive the flyback converter at 2.1MHz. Accordingly, Si and GaN devices are compared, and Liqualloy magnetic materials are investigated. Then, the components suitable for our field of use are reexamined. Additionally, our approach for the parallelization of the circuit to compensate for the drop in the output voltage of the LiB is described.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130135074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360290
Masamichi Yamaguchi, K. Kusaka, J. Itoh
This paper presents an analysis of the PCB pattern, which is for a high-frequency inverter circuit. In a high-frequency inverter circuit, the design of the snubber circuit, which suppresses surge voltage, is essential to achieve kilowatt operation. The authors are aiming to simulate a surge voltage in order to decide the parameters of the snubber circuit. In this paper, the surge voltage is simulated using the analysis result of the PCB and the models of the passive components. Furthermore, the surge voltage with changing the snubber capacitor is evaluated in order to make the relationship between the surge voltage and the snubber circuit parameters as the first step of the parameters design by using simulation.
{"title":"Parasitic Parameters Analysis and Design of Snubber Circuit on PCB for High-frequency Wireless Power Transfer","authors":"Masamichi Yamaguchi, K. Kusaka, J. Itoh","doi":"10.1109/WiPDAAsia49671.2020.9360290","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360290","url":null,"abstract":"This paper presents an analysis of the PCB pattern, which is for a high-frequency inverter circuit. In a high-frequency inverter circuit, the design of the snubber circuit, which suppresses surge voltage, is essential to achieve kilowatt operation. The authors are aiming to simulate a surge voltage in order to decide the parameters of the snubber circuit. In this paper, the surge voltage is simulated using the analysis result of the PCB and the models of the passive components. Furthermore, the surge voltage with changing the snubber capacitor is evaluated in order to make the relationship between the surge voltage and the snubber circuit parameters as the first step of the parameters design by using simulation.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"380 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127898663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360250
Yingjie Yang, Lin Liang, Hai Shang, Yong Kang, Hui Yan
SiC drift step recovery diode (DSRD) could be applied in the field of nanosecond high-power pulses. There is a demand for packaging for higher voltage and higher speed SiC DSRD. This paper proposes a stacked structure consisting of several high voltage SiC DSRD chips connected in series by rigid press-pack packaging. Finite element simulations performed to investigate the parasitic parameter, thermal performance in the packaging show that the packaging gets low parasitic inductance of about 3.5 nH and favorable heat dissipation capability. For the high-voltage SiC DSRD press-pack modules, the high field concentration around the DSRD chips is more critical. The objective is to build uniform electric field by structural optimization. A methodology to optimize the length of the metal conductive layer inside the packaging is proposed. Finally, the impact of the length on the electric field distribution is investigated quantitatively with Maxwell simulations. The electric field optimization brought by the platform reduces the maximum electric field intensity by 16%, which provides a packaging design reference for the upcoming high-voltage SiC DSRD devices.
{"title":"Design of Press-Pack Packaging for High Voltage SiC DSRD Stack","authors":"Yingjie Yang, Lin Liang, Hai Shang, Yong Kang, Hui Yan","doi":"10.1109/WiPDAAsia49671.2020.9360250","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360250","url":null,"abstract":"SiC drift step recovery diode (DSRD) could be applied in the field of nanosecond high-power pulses. There is a demand for packaging for higher voltage and higher speed SiC DSRD. This paper proposes a stacked structure consisting of several high voltage SiC DSRD chips connected in series by rigid press-pack packaging. Finite element simulations performed to investigate the parasitic parameter, thermal performance in the packaging show that the packaging gets low parasitic inductance of about 3.5 nH and favorable heat dissipation capability. For the high-voltage SiC DSRD press-pack modules, the high field concentration around the DSRD chips is more critical. The objective is to build uniform electric field by structural optimization. A methodology to optimize the length of the metal conductive layer inside the packaging is proposed. Finally, the impact of the length on the electric field distribution is investigated quantitatively with Maxwell simulations. The electric field optimization brought by the platform reduces the maximum electric field intensity by 16%, which provides a packaging design reference for the upcoming high-voltage SiC DSRD devices.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134525387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360270
Diang Xing, Chen Xie, Ke Wang, Tianshi Liu, Boxue Hu, Jin Wang, A. Agarwal, R. Singh, S. Atcitty
This paper compares the long-channel and short-channel 3300-V, 5-A silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) manufactured by GeneSiC regarding static characteristics and short-circuit (SC) sustaining capability. Their saturation currents were measured up to 2200-V drain bias at different gate voltages. The SC withstand times of two types of devices were measured at 2200-V drain voltage and 1S-V gate voltage. Their SC test results were compared with 1200-V SiC MOSFETs from four different manufactures, which suggested that SiC MOSFETs with longer channel length should have longer sustaining times in a SC event. In addition, the device dynamic characteristic was evaluated. A comprehensive simulation program with integrated circuit emphasis (SPICE) model was developed based on the device test results.
本文比较了GeneSiC公司生产的长通道和短通道3300 v, 5-A碳化硅(SiC)金属氧化物半导体场效应晶体管(mosfet)的静态特性和短路维持能力。在不同的栅极电压下，测量了它们的饱和电流达到2200 v的漏极偏置。测量了两种器件在2200 v漏极电压和1s v栅极电压下的SC耐受次数。他们的SC测试结果与来自四个不同制造商的1200 v SiC mosfet进行了比较，这表明具有更长的沟道长度的SiC mosfet在SC事件中应该具有更长的持续时间。此外，还对器件的动态特性进行了评价。根据器件测试结果，开发了集成电路重点(SPICE)模型的综合仿真程序。
{"title":"3.3-kV SiC MOSFET Performance and Short-Circuit Capability","authors":"Diang Xing, Chen Xie, Ke Wang, Tianshi Liu, Boxue Hu, Jin Wang, A. Agarwal, R. Singh, S. Atcitty","doi":"10.1109/WiPDAAsia49671.2020.9360270","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360270","url":null,"abstract":"This paper compares the long-channel and short-channel 3300-V, 5-A silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) manufactured by GeneSiC regarding static characteristics and short-circuit (SC) sustaining capability. Their saturation currents were measured up to 2200-V drain bias at different gate voltages. The SC withstand times of two types of devices were measured at 2200-V drain voltage and 1S-V gate voltage. Their SC test results were compared with 1200-V SiC MOSFETs from four different manufactures, which suggested that SiC MOSFETs with longer channel length should have longer sustaining times in a SC event. In addition, the device dynamic characteristic was evaluated. A comprehensive simulation program with integrated circuit emphasis (SPICE) model was developed based on the device test results.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133785651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-23DOI: 10.1109/WiPDAAsia49671.2020.9360259
Bingyang Li, Kangping Wang, Hongkeng Zhu, Xu Yang, Laili Wang
The parasitic capacitances of a novel double-sided cooling structure of GaN power module are analyzed in this paper. Due to the additional top ceramic substrate of the structure, parasitic capacitances become more complex. By analysis, gate-source parasitic capacitance and gate-drain parasitic capacitance of all GaN devices and drain-source parasitic capacitance of upper GaN device of half bridge circuit are less than 1% of the corresponding intrinsic capacitances. However, the drain-source parasitic capacitance (14% of Coss) of bottom GaN device of half bridge circuit increases by 30% compared with traditional single-sided cooling module, which is acceptable since the thermal resistance of this structure is about halved.
{"title":"Parasitic Capacitances Characterization of Double-Sided Cooling Power Module Based on GaN Devices","authors":"Bingyang Li, Kangping Wang, Hongkeng Zhu, Xu Yang, Laili Wang","doi":"10.1109/WiPDAAsia49671.2020.9360259","DOIUrl":"https://doi.org/10.1109/WiPDAAsia49671.2020.9360259","url":null,"abstract":"The parasitic capacitances of a novel double-sided cooling structure of GaN power module are analyzed in this paper. Due to the additional top ceramic substrate of the structure, parasitic capacitances become more complex. By analysis, gate-source parasitic capacitance and gate-drain parasitic capacitance of all GaN devices and drain-source parasitic capacitance of upper GaN device of half bridge circuit are less than 1% of the corresponding intrinsic capacitances. However, the drain-source parasitic capacitance (14% of Coss) of bottom GaN device of half bridge circuit increases by 30% compared with traditional single-sided cooling module, which is acceptable since the thermal resistance of this structure is about halved.","PeriodicalId":432666,"journal":{"name":"2020 IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116046559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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