Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412687
M. Norling, D. Kuylenstierna, A. Vorobiev, K. Reimann, D. Lederer, J. Raskin, S. Gevorgian
This paper describes low-frequency measurements and comparative analysis of methods used for surface passivation of high-resistivity silicon (HR-Si). A number of substrates are evaluated; n-type and p-type HR-Si, with and without surface passivation by means of polysilicon or Ar-ion implantation. Additionally, a selection of samples is prepared with a layer of ferroelectric material. Substrate characteristics are extracted from measurements of the samples, allowing comparison of passivation methods and evaluation of the influence of the ferroelectric film. The study shows all passivation methods successful in removing any bias-dependence of substrate properties. Further, the high-temperature processing of the ferroelectric film is observed increasing the extracted substrate conductivity by about 70% for the Ar-ion implanted samples, and about 50% for the p-type samples passivated by poly-Si. The effective substrate conductivity of the n-type samples passivated by RTA-crystallised poly-Si appears unaffected.
{"title":"Comparison of high-resistivity silicon surface passivation methods","authors":"M. Norling, D. Kuylenstierna, A. Vorobiev, K. Reimann, D. Lederer, J. Raskin, S. Gevorgian","doi":"10.1109/EMICC.2007.4412687","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412687","url":null,"abstract":"This paper describes low-frequency measurements and comparative analysis of methods used for surface passivation of high-resistivity silicon (HR-Si). A number of substrates are evaluated; n-type and p-type HR-Si, with and without surface passivation by means of polysilicon or Ar-ion implantation. Additionally, a selection of samples is prepared with a layer of ferroelectric material. Substrate characteristics are extracted from measurements of the samples, allowing comparison of passivation methods and evaluation of the influence of the ferroelectric film. The study shows all passivation methods successful in removing any bias-dependence of substrate properties. Further, the high-temperature processing of the ferroelectric film is observed increasing the extracted substrate conductivity by about 70% for the Ar-ion implanted samples, and about 50% for the p-type samples passivated by poly-Si. The effective substrate conductivity of the n-type samples passivated by RTA-crystallised poly-Si appears unaffected.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"281 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114567572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412680
Sang Jin Lee, D. An, Mun-Kyo Lee, T. Baek, Byoung-Chul Jun, S. Moon, C. Park
We report on a high isolation 94 GHz MMIC single balanced cascode mixer using 0.1 mum metamorphic high electron mobility transistor (MHEMT) and CPW tandem couplers. Tandem couplers are introduced to overcome the limits of CPW based conventional directional couplers. Conversion loss of the single balanced cascode mixer was 9.8 dB at an LO power of 10.9 dBm. PldB (1 dB compression point) was -14.8 dBm at an input power of -4 dBm. The LO to RF isolation at 94 GHz and 100 GHz were -29.5 dB and -39.5 dB, respectively.
{"title":"94 GHz single balanced cascode mixer using CPW tandem couplers","authors":"Sang Jin Lee, D. An, Mun-Kyo Lee, T. Baek, Byoung-Chul Jun, S. Moon, C. Park","doi":"10.1109/EMICC.2007.4412680","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412680","url":null,"abstract":"We report on a high isolation 94 GHz MMIC single balanced cascode mixer using 0.1 mum metamorphic high electron mobility transistor (MHEMT) and CPW tandem couplers. Tandem couplers are introduced to overcome the limits of CPW based conventional directional couplers. Conversion loss of the single balanced cascode mixer was 9.8 dB at an LO power of 10.9 dBm. PldB (1 dB compression point) was -14.8 dBm at an input power of -4 dBm. The LO to RF isolation at 94 GHz and 100 GHz were -29.5 dB and -39.5 dB, respectively.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133179121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412726
F. Ramírez, M. Pontón, A. Suárez
A systematic procedure for the design of quadruple-push oscillators is presented. The 4th-harmonic output power is maximized through load-pull optimization of the sub-oscillator circuit. Two variants of the technique are considered: the use of ideal harmonic terminations, defined by their reflection coefficients, and the use of a substitution generator at the output frequency. The latter enables a direct control of the output amplitude at the 4th-harmonic component. A further global optimization of the entire quadruple-push configuration is performed, connecting one auxiliary generator to each sub-oscillator to impose the required 90deg phase shift and preventing undesired oscillation modes. A statistical analysis of the design sensitivity to discrepancies between the four sub-oscillator elements is also presented. The proposed techniques have been applied to the design of a quadruple-push oscillator operating at 20 GHz.
{"title":"Nonlinear-optimization techniques for quadruple-push oscillators","authors":"F. Ramírez, M. Pontón, A. Suárez","doi":"10.1109/EMICC.2007.4412726","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412726","url":null,"abstract":"A systematic procedure for the design of quadruple-push oscillators is presented. The 4th-harmonic output power is maximized through load-pull optimization of the sub-oscillator circuit. Two variants of the technique are considered: the use of ideal harmonic terminations, defined by their reflection coefficients, and the use of a substitution generator at the output frequency. The latter enables a direct control of the output amplitude at the 4th-harmonic component. A further global optimization of the entire quadruple-push configuration is performed, connecting one auxiliary generator to each sub-oscillator to impose the required 90deg phase shift and preventing undesired oscillation modes. A statistical analysis of the design sensitivity to discrepancies between the four sub-oscillator elements is also presented. The proposed techniques have been applied to the design of a quadruple-push oscillator operating at 20 GHz.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121931650","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412663
H. Hsu, Ming-Chang Tsai, Kuo-Hsun Huang
The comprehensive characterization of 4-port transformer is paid in this paper, the contents include such as figure-of-merit, differential excitation. The coupling coefficient is added into the performance index of transformer. A foundry 90 nm CMOS technology is adopted to fabricate the 4-port transformer. Finally, an equivalent circuit is proposed to extract the model parameter in these transformers.
{"title":"Four-port transformer in silicon-based technology","authors":"H. Hsu, Ming-Chang Tsai, Kuo-Hsun Huang","doi":"10.1109/EMICC.2007.4412663","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412663","url":null,"abstract":"The comprehensive characterization of 4-port transformer is paid in this paper, the contents include such as figure-of-merit, differential excitation. The coupling coefficient is added into the performance index of transformer. A foundry 90 nm CMOS technology is adopted to fabricate the 4-port transformer. Finally, an equivalent circuit is proposed to extract the model parameter in these transformers.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124053354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412645
E. R. Srinidhi, G. Kompa
This paper mainly focuses on providing theoretical justification for possible GaN device linearity improvement, interpretating key physical origins of IMD3. Based on bias dependent S-parameter measurement data of field-plate-free 8x125 mum GaN HEMT, IMD3 is modelled using classical Volterra series theory. Device diagnosis is hence carried out, by means of this technique, for efficiently localizing the distortion behaviour. Further, device linearity is shown to improve by appropriately tuning gate-drain feedback capacitance by taking advantage of field-plate technology proving the analysis to be a powerful tool for developing GaN HEMT technology. Further, with the intension of understanding IMD nulling, Volterra analysis is extended to 5th-degrce nonlinearity through which an insight into the distortion cancellation mechanism is obtained.
本文主要侧重于为可能的GaN器件线性度改进提供理论依据，解释IMD3的关键物理起源。基于无场极板的8x125 mum GaN HEMT的偏置相关s参数测量数据，利用经典Volterra级数理论建立了IMD3模型。因此，通过这种技术进行器件诊断，以有效地定位畸变行为。此外，利用场极板技术适当调整栅漏反馈电容可以改善器件的线性度，证明该分析是开发GaN HEMT技术的有力工具。此外，随着对IMD零化的深入理解，Volterra分析扩展到五度非线性，从而深入了解畸变抵消机制。
{"title":"Investigation of IMD3 in GaN HEMT based on extended volterra series analysis","authors":"E. R. Srinidhi, G. Kompa","doi":"10.1109/EMICC.2007.4412645","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412645","url":null,"abstract":"This paper mainly focuses on providing theoretical justification for possible GaN device linearity improvement, interpretating key physical origins of IMD3. Based on bias dependent S-parameter measurement data of field-plate-free 8x125 mum GaN HEMT, IMD3 is modelled using classical Volterra series theory. Device diagnosis is hence carried out, by means of this technique, for efficiently localizing the distortion behaviour. Further, device linearity is shown to improve by appropriately tuning gate-drain feedback capacitance by taking advantage of field-plate technology proving the analysis to be a powerful tool for developing GaN HEMT technology. Further, with the intension of understanding IMD nulling, Volterra analysis is extended to 5th-degrce nonlinearity through which an insight into the distortion cancellation mechanism is obtained.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127979513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412653
S. Chartier, Liu Liu, G. Fischer, S. Glisic, H. Hohnemann, A. Trasser, H. Schumacher
A Si/SiGe bipolar dynamic frequency divider designed for 77GHz/79GHz automotive radar is presented, which uses a transimpedance amplifier topology to improve sensitivity and operational bandwidth. Capable of operation for input frequencies from 22 GHz up to 93 GHz, the divider consumes only 35 mA at 5 V supply voltage and has a very compact die area of 295 x 475 mum2. In addition, measurements show that the divider operates in the full radar frequency band (76 GHz-81 GHz) up to a temperature of 100degC.
提出了一种用于77GHz/79GHz汽车雷达的Si/SiGe双极动态分频器，该分频器采用跨阻放大器拓扑结构，提高了灵敏度和工作带宽。该分压器能够在22 GHz至93 GHz的输入频率范围内工作，在5 V电源电压下仅消耗35 mA，并且具有非常紧凑的295 x 475 mum2的芯片面积。此外，测量表明，分压器工作在整个雷达频段(76 GHz-81 GHz)高达100摄氏度的温度。
{"title":"SiGe millimeter-wave dynamic frequency divider with enhanced sensitivity incorporating a transimpedance stage","authors":"S. Chartier, Liu Liu, G. Fischer, S. Glisic, H. Hohnemann, A. Trasser, H. Schumacher","doi":"10.1109/EMICC.2007.4412653","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412653","url":null,"abstract":"A Si/SiGe bipolar dynamic frequency divider designed for 77GHz/79GHz automotive radar is presented, which uses a transimpedance amplifier topology to improve sensitivity and operational bandwidth. Capable of operation for input frequencies from 22 GHz up to 93 GHz, the divider consumes only 35 mA at 5 V supply voltage and has a very compact die area of 295 x 475 mum2. In addition, measurements show that the divider operates in the full radar frequency band (76 GHz-81 GHz) up to a temperature of 100degC.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115817970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412691
J. Lintignat, S. Darfeuille, B. Barelaud, L. Billonnet, B. Jarry, P. Mcunier, P. Gamand
In this paper, a fully-differential low noise amplifier based on a classical cascode topology enhanced with noise cancelling technique is presented. This circuit achieves a 0.1-1.7 GHz bandwidth. The chip surface is less than 0.8 mm2. Measured circuit gain is greater than 18 dB and the 3 dB bandwidth is reached for a frequency of 18 GHz. The achieved noise figure is as low as 1.1 dB at 250 MHz and is lower than 1.3 dB all over the passband. This chip has been implemented using NXP QUBlC4G SiGe BiCMOS process.
{"title":"A 0.1-1.7 GHz, 1.1dB NF low noise amplifier for radioastronomy application","authors":"J. Lintignat, S. Darfeuille, B. Barelaud, L. Billonnet, B. Jarry, P. Mcunier, P. Gamand","doi":"10.1109/EMICC.2007.4412691","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412691","url":null,"abstract":"In this paper, a fully-differential low noise amplifier based on a classical cascode topology enhanced with noise cancelling technique is presented. This circuit achieves a 0.1-1.7 GHz bandwidth. The chip surface is less than 0.8 mm2. Measured circuit gain is greater than 18 dB and the 3 dB bandwidth is reached for a frequency of 18 GHz. The achieved noise figure is as low as 1.1 dB at 250 MHz and is lower than 1.3 dB all over the passband. This chip has been implemented using NXP QUBlC4G SiGe BiCMOS process.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121586295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412659
Kwanhim Lam, H. Ding, Xuefeng Liu, B. Orner, J. Rascoe, B. Dewitt, E. Mina, B. Gaucher
Feasibility of wideband on-chip RF switch operating at millimeter wave frequencies using PIN diodes in IBM .13 mum SiGe technology is demonstrated. A SPDT reflective switch targeting 60 GHz wireless and radar applications is designed, fabricated, and measured. Good correlations between simulation and hardware are reported. Measured data show 2.0 to 2.7 dB of insertion loss over 51 to 78 GHz bandwidth with better than 12 dB return loss and 25 to 35 dB of isolation.
{"title":"Wideband millimeter wave pin diode spdt switch using ibm 0.13µm sige technology","authors":"Kwanhim Lam, H. Ding, Xuefeng Liu, B. Orner, J. Rascoe, B. Dewitt, E. Mina, B. Gaucher","doi":"10.1109/EMICC.2007.4412659","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412659","url":null,"abstract":"Feasibility of wideband on-chip RF switch operating at millimeter wave frequencies using PIN diodes in IBM .13 mum SiGe technology is demonstrated. A SPDT reflective switch targeting 60 GHz wireless and radar applications is designed, fabricated, and measured. Good correlations between simulation and hardware are reported. Measured data show 2.0 to 2.7 dB of insertion loss over 51 to 78 GHz bandwidth with better than 12 dB return loss and 25 to 35 dB of isolation.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114225857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412741
A. Sterile, C. Siegel, V. Ziegler, B. Schonlinner, U. Prechtel, S. Thilmont, H. Seidel, U. Schmid
This paper presents a RF-MEMS switch optimized for high temperature range of operation using a temperature stable metallization. The devices are fabricated on a silicon substrate in very low complexity process using only one metallization. The performed measurements characterize the properties of the metallization and also the properties of the entire switch in terms of creeping behaviour, RF performance and charging effects at different temperatures. A stable operation up to 120degC is demonstrated and the principle reliability of the switches is shown by 109 switching cycles.
{"title":"Low complexity RF-MEMS switch optimized for operation up to 120°C","authors":"A. Sterile, C. Siegel, V. Ziegler, B. Schonlinner, U. Prechtel, S. Thilmont, H. Seidel, U. Schmid","doi":"10.1109/EMICC.2007.4412741","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412741","url":null,"abstract":"This paper presents a RF-MEMS switch optimized for high temperature range of operation using a temperature stable metallization. The devices are fabricated on a silicon substrate in very low complexity process using only one metallization. The performed measurements characterize the properties of the metallization and also the properties of the entire switch in terms of creeping behaviour, RF performance and charging effects at different temperatures. A stable operation up to 120degC is demonstrated and the principle reliability of the switches is shown by 109 switching cycles.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"161 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123006838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412666
A. Cesari, P. Gilabert, E. Bertran, G. Montoro, J. Dilhac
This paper presents a Field Programmable Gate Array (FPGA) based platform for prototyping digital predistortion (DPD) linearizers, and a scalable DPD architecture is proposed and implemented. This architecture eases the process of meeting transmission linearity requirements, depending of the degree of impairments added by the transmitter chain, and enables a quick migration between different DPD schemes. Details on the internal DPD organization, reconfiguration abilities, as well as experimental results showing DPD linearization of a 10 W LDMOS RF power amplifier are provided, giving an insight on actual development scenarios of DPD systems accounting for memory effects.
本文提出了一种基于现场可编程门阵列(FPGA)的数字预失真(DPD)线性器原型设计平台，并提出并实现了一种可扩展的DPD体系结构。这种架构简化了满足传输线性度要求的过程，这取决于发射机链增加的损伤程度，并且可以在不同的DPD方案之间快速迁移。详细介绍了DPD的内部组织，重构能力，以及10 W LDMOS射频功率放大器的DPD线性化实验结果，为考虑记忆效应的DPD系统的实际开发场景提供了见解。
{"title":"A FPGA based digital predistorter for RF power amplifiers with memory effects","authors":"A. Cesari, P. Gilabert, E. Bertran, G. Montoro, J. Dilhac","doi":"10.1109/EMICC.2007.4412666","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412666","url":null,"abstract":"This paper presents a Field Programmable Gate Array (FPGA) based platform for prototyping digital predistortion (DPD) linearizers, and a scalable DPD architecture is proposed and implemented. This architecture eases the process of meeting transmission linearity requirements, depending of the degree of impairments added by the transmitter chain, and enables a quick migration between different DPD schemes. Details on the internal DPD organization, reconfiguration abilities, as well as experimental results showing DPD linearization of a 10 W LDMOS RF power amplifier are provided, giving an insight on actual development scenarios of DPD systems accounting for memory effects.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125528804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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