Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412671
A. Martin, T. Reveyrand, M. Campovecchio, R. Aubry, S. Piotrowicz, D. Floriot, R. Quéré
This paper reports on the design of a cascode GaN HEMT cell dedicated to 4-18 GHz flip-chip distributed power amplifier. The active device is a 8x50 mum AlGaN/GaN HEMT grown on SiC substrate. The GaN-based die which integrates the active cascode cell and its matching elements is flip-chipped via electrical bumps onto an AIN substrate. The matching elements of the balanced cascode cell are composed of series capacitances on the gate of both transistors with additional resistances to insure stability and bias path. The series capacitor on the gate of the 1st transistor is added for the distributed amplifier optimisation while the series capacitor on the gate of the 2 nd transistor is dedicated
{"title":"Design of GaN-based balanced cascode cells for wide-band distributed power amplifier","authors":"A. Martin, T. Reveyrand, M. Campovecchio, R. Aubry, S. Piotrowicz, D. Floriot, R. Quéré","doi":"10.1109/EMICC.2007.4412671","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412671","url":null,"abstract":"This paper reports on the design of a cascode GaN HEMT cell dedicated to 4-18 GHz flip-chip distributed power amplifier. The active device is a 8x50 mum AlGaN/GaN HEMT grown on SiC substrate. The GaN-based die which integrates the active cascode cell and its matching elements is flip-chipped via electrical bumps onto an AIN substrate. The matching elements of the balanced cascode cell are composed of series capacitances on the gate of both transistors with additional resistances to insure stability and bias path. The series capacitor on the gate of the 1st transistor is added for the distributed amplifier optimisation while the series capacitor on the gate of the 2 nd transistor is dedicated","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123395195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412688
S. Seo, K. Ghose, D. Pavlidis, S. Schmidt
AIN/GaN metal insulator semiconductor field effect transistors (MISFETs) were designed, simulated and fabricated. DC and S-parameter measurements were also performed. Drift-diffusion simulations using DESSIS compared AIN/GaN MISFETs and A32Ga68N/GaN Heterostructure FETs (HFETs) with the same geometries. The simulation results show the advantages of AIN/GaN MISFETs in terms of higher saturation current, lower gate leakage and higher transconductance than AlGaN HFETs. First results from fabricated AIN/GaN devices with 1.1 mum gate length and 200 mum gate width showed a maximum drain current density of ~-470 mA/mm and a peak extrinsic transconductance of 80 mS/mm. S-parameter measurements showed that the current-gain cutoff frequency (fT) and maximum oscillation frequency (fmax) were 2.8 GHz and 10.3 GHz, respectively. To the authors knowledge this is the first report of a systematic study of AIN/GaN MISFETs addressing their physical modeling and experimental high-frequency characteristics.
{"title":"AlN/GaN MISFET for high frequency applications: Physical simulation and experimental evaluation","authors":"S. Seo, K. Ghose, D. Pavlidis, S. Schmidt","doi":"10.1109/EMICC.2007.4412688","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412688","url":null,"abstract":"AIN/GaN metal insulator semiconductor field effect transistors (MISFETs) were designed, simulated and fabricated. DC and S-parameter measurements were also performed. Drift-diffusion simulations using DESSIS compared AIN/GaN MISFETs and A32Ga68N/GaN Heterostructure FETs (HFETs) with the same geometries. The simulation results show the advantages of AIN/GaN MISFETs in terms of higher saturation current, lower gate leakage and higher transconductance than AlGaN HFETs. First results from fabricated AIN/GaN devices with 1.1 mum gate length and 200 mum gate width showed a maximum drain current density of ~-470 mA/mm and a peak extrinsic transconductance of 80 mS/mm. S-parameter measurements showed that the current-gain cutoff frequency (fT) and maximum oscillation frequency (fmax) were 2.8 GHz and 10.3 GHz, respectively. To the authors knowledge this is the first report of a systematic study of AIN/GaN MISFETs addressing their physical modeling and experimental high-frequency characteristics.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"159 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122826094","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412655
Y. Oda, N. Watanabe, M. Hiroki, T. Yagi, T. Kobayashi
We investigated preferable way of decrease of vertical leakage current in GaN-based high-electron-mobility-transistor structure on Si(111) substrate. It is found that the leakage current is much improved as the dislocation density in thin A1N buffer layer decreases. It has been successfully obtained the leakage current less than 10-4 A/cm2 at 200 V although the total epitaxial layer thickness is about only 1 mum.
{"title":"Reduction of buffer leakage current in AlGaN/GaN high-electron-mobility-transistor structure on Si substrate by reducing the dislocation density in AlN buffer layer","authors":"Y. Oda, N. Watanabe, M. Hiroki, T. Yagi, T. Kobayashi","doi":"10.1109/EMICC.2007.4412655","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412655","url":null,"abstract":"We investigated preferable way of decrease of vertical leakage current in GaN-based high-electron-mobility-transistor structure on Si(111) substrate. It is found that the leakage current is much improved as the dislocation density in thin A1N buffer layer decreases. It has been successfully obtained the leakage current less than 10-4 A/cm2 at 200 V although the total epitaxial layer thickness is about only 1 mum.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114439846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412632
Y. Bouvier, A. Konczykowska, A. Ouslimani, F. Jorge, M. Riet, J. Godin
A fully differential 20 Gsample/s Track and Hold Amplifier with 20 GHz large-input-signal bandwidth is designed and fabricated in 210 GHz-fT-InP-DHBT on a 1.6 x 1.4 mm2 chip. Spectral measurements in track mode give an SNR, a THD, and a SFDR respectively of 65 dB, -38 dB and -38 dB for input frequency up to 9 GHz and input voltage up to 0.5 Vpp. This THD is equivalent to 6 ENOB. Time domain measurements illustrate 20 GHz sampling with 2 and 5 GHz sinusoidal input signals.
在1.6 x 1.4 mm2芯片上，采用210 GHz- ft -inp - dhbt设计并制造了一款具有20 GHz大输入信号带宽的全差分20 g采样/s跟踪和保持放大器。在轨道模式下，当输入频率高达9 GHz，输入电压高达0.5 Vpp时，SNR、THD和SFDR分别为65 dB、-38 dB和-38 dB。这个THD相当于6个ENOB。时域测量说明20 GHz采样与2和5 GHz正弦输入信号。
{"title":"A 20-GSamples/s Track-Hold Amplifier in InP DHBT technology","authors":"Y. Bouvier, A. Konczykowska, A. Ouslimani, F. Jorge, M. Riet, J. Godin","doi":"10.1109/EMICC.2007.4412632","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412632","url":null,"abstract":"A fully differential 20 Gsample/s Track and Hold Amplifier with 20 GHz large-input-signal bandwidth is designed and fabricated in 210 GHz-fT-InP-DHBT on a 1.6 x 1.4 mm2 chip. Spectral measurements in track mode give an SNR, a THD, and a SFDR respectively of 65 dB, -38 dB and -38 dB for input frequency up to 9 GHz and input voltage up to 0.5 Vpp. This THD is equivalent to 6 ENOB. Time domain measurements illustrate 20 GHz sampling with 2 and 5 GHz sinusoidal input signals.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129138218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412685
A. Matiss, A. Poloczek, W. Brockerhoff, W. Prost, F. Tegude
A large signal measurement set up and analysis technique is developed to characterize and model the dynamic I/V characteristic of a two-terminal double-barrier quantum well structure, the resonant tunnelling diode (RTD). The devices investigated have been realized on InP-substrate using sub-micron process technology in order to minimize power dissipation for high-frequency applications. The process technology applied employs electron beam lithography for precise definition of critical structures and self aligned dry chemical mesa etching. The extraction of device parameters from measurements is presented together with a scaleable large-signal RTD model.
{"title":"Large-signal analysis and AC modelling of sub micron resonant tunnelling diodes","authors":"A. Matiss, A. Poloczek, W. Brockerhoff, W. Prost, F. Tegude","doi":"10.1109/EMICC.2007.4412685","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412685","url":null,"abstract":"A large signal measurement set up and analysis technique is developed to characterize and model the dynamic I/V characteristic of a two-terminal double-barrier quantum well structure, the resonant tunnelling diode (RTD). The devices investigated have been realized on InP-substrate using sub-micron process technology in order to minimize power dissipation for high-frequency applications. The process technology applied employs electron beam lithography for precise definition of critical structures and self aligned dry chemical mesa etching. The extraction of device parameters from measurements is presented together with a scaleable large-signal RTD model.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121695257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412721
I. Zine-El-Abidine, M. Okoniewski
High quality toroid and solenoid inductors, exhibiting quality factors as high as 87 at 14.5 GHz and 35 at 6.4 GHz are presented in this paper. The inductors are fabricated using only two plating steps which reduces the complexity of the fabrication. The process lowers the number of ohmic contacts between the electroplated layers improving the performance of the device. The fabrication process is low-temperature and fully compatible with CMOS technology which makes it suitable for post-IC processing.
{"title":"High quality factor micromachined toroid and solenoid inductors","authors":"I. Zine-El-Abidine, M. Okoniewski","doi":"10.1109/EMICC.2007.4412721","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412721","url":null,"abstract":"High quality toroid and solenoid inductors, exhibiting quality factors as high as 87 at 14.5 GHz and 35 at 6.4 GHz are presented in this paper. The inductors are fabricated using only two plating steps which reduces the complexity of the fabrication. The process lowers the number of ohmic contacts between the electroplated layers improving the performance of the device. The fabrication process is low-temperature and fully compatible with CMOS technology which makes it suitable for post-IC processing.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115876194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412667
A. Cidronali, I. Magrini, R. Fagotti, F. Alimenti, D. Kother, G. Manes
This paper discusses and experimentally demonstrates the use of a reconfigurable class-AB power amplifier in a wideband step envelope tracking architecture. The experimental results are related to a SiGe HBT power device prototype in which we integrated the dynamic biasing switching capability. This paper proves that, in the case of 802.11g signals, the prototype allows for an average efficiency of 16.5%, which represents an increase of 10% if compared with traditional class-AB RFPA. The step envelope tracking architecture and its digital predistortion algorithm are discussed and analyzed by system level simulations, which demonstrate the capability of the SiGe prototype to provide 19 dBm output total power with EVM=3.4%.
{"title":"A reconfigurable SiGe HBT for wideband step envelope tracking power amplifiers","authors":"A. Cidronali, I. Magrini, R. Fagotti, F. Alimenti, D. Kother, G. Manes","doi":"10.1109/EMICC.2007.4412667","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412667","url":null,"abstract":"This paper discusses and experimentally demonstrates the use of a reconfigurable class-AB power amplifier in a wideband step envelope tracking architecture. The experimental results are related to a SiGe HBT power device prototype in which we integrated the dynamic biasing switching capability. This paper proves that, in the case of 802.11g signals, the prototype allows for an average efficiency of 16.5%, which represents an increase of 10% if compared with traditional class-AB RFPA. The step envelope tracking architecture and its digital predistortion algorithm are discussed and analyzed by system level simulations, which demonstrate the capability of the SiGe prototype to provide 19 dBm output total power with EVM=3.4%.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130221353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412674
C. Roff, A. Sheikh, J. Benedikt, P. Tasker, K. Hilton, J. O. Maclean, D. Hayes, M. Uren, T. Martin
This paper uses measured waveforms to demonstrate how to optimise GaN HFET PA designs in order to achieve high power and high efficiency. Efficiency values of 80% were achieved at a power density of 3 Wmm-4. The design procedure shows how waveform engineering, i.e. a combination of RF current and voltage waveform measurements, bias control and active harmonic load-pull, allow maximum performance to be achieved. The significant role of the device output capacitance in GaN designs that utilise large voltage swings is also explained, and a simple method for limiting the effect of Cds 5 is presented.
{"title":"Optimising AIGaN/GaN HFET designs for high efficiency","authors":"C. Roff, A. Sheikh, J. Benedikt, P. Tasker, K. Hilton, J. O. Maclean, D. Hayes, M. Uren, T. Martin","doi":"10.1109/EMICC.2007.4412674","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412674","url":null,"abstract":"This paper uses measured waveforms to demonstrate how to optimise GaN HFET PA designs in order to achieve high power and high efficiency. Efficiency values of 80% were achieved at a power density of 3 Wmm-4. The design procedure shows how waveform engineering, i.e. a combination of RF current and voltage waveform measurements, bias control and active harmonic load-pull, allow maximum performance to be achieved. The significant role of the device output capacitance in GaN designs that utilise large voltage swings is also explained, and a simple method for limiting the effect of Cds 5 is presented.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132811087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412683
M. Jankovic, A. Brannon, J. Breitbarth, Z. Popovic
This paper presents a design method for voltage controlled oscillators (VCOs) with simultaneous small size, low phase noise, DC power consumption and thermal drift. We show design steps to give good prediction of VCO phase noise and power consumption behavior: (1) measured resonator frequency-dependent parameters; (2) transistor additive phase noise/ noise figure characterization; (3) accurate tuning element model; and (4) bias-dependent model in case of an active load. As an illustration, the design of a 3.4-GHz bipolar transistor VCO with varactor tuning is presented Oscillator measurements demonstrate low phase noise (-40dBc@ 100Hz and better than -lOOdBcfflOkHz) with power consumption on the order of a few milliwatts with a circuit footprint smaller than 0.6cm2. The temperature stability is found to be better than +/-10ppm/degC from -40degC to +30degC. The oscillators are implemented using low-cost off-the-shelf surface-mountable components, including a micro-coaxial resonator. The VCO directly modulates the current of a laser diode and demonstrates a short-term stability 2-10/radictau Bias of clock. when locked to a miniature Rubidium atomic clock.
{"title":"Design method for low-power, low phase noise voltage-controlled oscillators","authors":"M. Jankovic, A. Brannon, J. Breitbarth, Z. Popovic","doi":"10.1109/EMICC.2007.4412683","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412683","url":null,"abstract":"This paper presents a design method for voltage controlled oscillators (VCOs) with simultaneous small size, low phase noise, DC power consumption and thermal drift. We show design steps to give good prediction of VCO phase noise and power consumption behavior: (1) measured resonator frequency-dependent parameters; (2) transistor additive phase noise/ noise figure characterization; (3) accurate tuning element model; and (4) bias-dependent model in case of an active load. As an illustration, the design of a 3.4-GHz bipolar transistor VCO with varactor tuning is presented Oscillator measurements demonstrate low phase noise (-40dBc@ 100Hz and better than -lOOdBcfflOkHz) with power consumption on the order of a few milliwatts with a circuit footprint smaller than 0.6cm2. The temperature stability is found to be better than +/-10ppm/degC from -40degC to +30degC. The oscillators are implemented using low-cost off-the-shelf surface-mountable components, including a micro-coaxial resonator. The VCO directly modulates the current of a laser diode and demonstrates a short-term stability 2-10/radictau Bias of clock. when locked to a miniature Rubidium atomic clock.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116971145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-26DOI: 10.1109/EMICC.2007.4412773
W. Byun, Bong-Su Kim, Kwang-Seon Kim, K. Eun, Myung‐Sun Song, R. Kulke, O. Kersten, G. Mollenbeck, M. Rittweger
In this paper, we present design, implementation and measurement of 3D mm-wave LTCC (low temperature co-fired ceramic) module with vertical transition through FR-4 PCB substrate. A new structure in order to transfer mm-wave signal from transceiver module through an opening in FR-4 PCB substrate to antenna with standard WR-22 waveguide port is proposed. The module features front-end, receiver and transmitter. The opening in FR-4 PCB substrate is of rectangular type, which has the same dimensions as a WR-22 waveguide. The edge of the opening is conductively plated with copper from top side to the bottom to reduce transmission losses. The implemented module is compact in size (32 x 28 x 3.3 mm ). Experimental results show a 1dB compression output power of 15 dBm and noise figure of 9.72 dB at 40.5~41.5 GHz.
在本文中，我们介绍了3D毫米波LTCC(低温共烧陶瓷)模块的设计、实现和测量，该模块具有垂直跃迁通过FR-4 PCB基板。提出了一种将毫米波信号从收发模块通过FR-4 PCB基板上的开口传输到具有标准WR-22波导端口的天线的新结构。该模块包括前端、接收机和发射机。FR-4 PCB基板中的开口为矩形型，其尺寸与WR-22波导相同。开口边缘由上至下导电镀铜，以减少传输损耗。实现的模块尺寸紧凑(32 x 28 x 3.3 mm)。实验结果表明，在40.5~41.5 GHz频段，1dB压缩输出功率为15 dBm，噪声系数为9.72 dB。
{"title":"Design of vertical transition for 40GHz transceiver module using LTCC technology","authors":"W. Byun, Bong-Su Kim, Kwang-Seon Kim, K. Eun, Myung‐Sun Song, R. Kulke, O. Kersten, G. Mollenbeck, M. Rittweger","doi":"10.1109/EMICC.2007.4412773","DOIUrl":"https://doi.org/10.1109/EMICC.2007.4412773","url":null,"abstract":"In this paper, we present design, implementation and measurement of 3D mm-wave LTCC (low temperature co-fired ceramic) module with vertical transition through FR-4 PCB substrate. A new structure in order to transfer mm-wave signal from transceiver module through an opening in FR-4 PCB substrate to antenna with standard WR-22 waveguide port is proposed. The module features front-end, receiver and transmitter. The opening in FR-4 PCB substrate is of rectangular type, which has the same dimensions as a WR-22 waveguide. The edge of the opening is conductively plated with copper from top side to the bottom to reduce transmission losses. The implemented module is compact in size (32 x 28 x 3.3 mm ). Experimental results show a 1dB compression output power of 15 dBm and noise figure of 9.72 dB at 40.5~41.5 GHz.","PeriodicalId":436391,"journal":{"name":"2007 European Microwave Integrated Circuit Conference","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132431611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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