Pub Date : 2025-03-26DOI: 10.1109/TSM.2025.3554685
Liang-Yu Chen;Michael Kao;Shih-Hao Chen;Chia-Hsiang Yang
Silicon data allow designers to enhance the chip performance by leveraging machine learning techniques. By gaining a deeper understanding of the distributions of interested features within a wafer, designers can predict chip behaviors more accurately. However, real silicon data may not always be available. This work presents a methodology for generating high-quality synthetic silicon data and verifies its effectiveness through several metrics. Silicon features obtained by chip probing (CP) and wafer acceptance test (WAT) are combined to create more comprehensive data, enabling to conduct design-technology co-optimization (DTCO). Unlike the generative adversarial network (GAN) based methodology used in prior work, this work utilizes a diffusion model to generate synthetic silicon data. The Jensen-Shannon (JS) divergence similarity and Frechet Inception Distance (FID) are used to evaluate the distribution and to quantify the quality of synthetic data, respectively. Experimental results demonstrate that the diffusion model is able to extract the multi-feature silicon data distribution more accurately, with an average JS divergence similarity of 0.987 and an FID of 6.28. This methodology enables to generate a substantial volume of silicon samples for extensive silicon data analysis and DTCO acceleration.
{"title":"A Diffusion-Model-Based Methodology for Virtual Silicon Data Generation","authors":"Liang-Yu Chen;Michael Kao;Shih-Hao Chen;Chia-Hsiang Yang","doi":"10.1109/TSM.2025.3554685","DOIUrl":"https://doi.org/10.1109/TSM.2025.3554685","url":null,"abstract":"Silicon data allow designers to enhance the chip performance by leveraging machine learning techniques. By gaining a deeper understanding of the distributions of interested features within a wafer, designers can predict chip behaviors more accurately. However, real silicon data may not always be available. This work presents a methodology for generating high-quality synthetic silicon data and verifies its effectiveness through several metrics. Silicon features obtained by chip probing (CP) and wafer acceptance test (WAT) are combined to create more comprehensive data, enabling to conduct design-technology co-optimization (DTCO). Unlike the generative adversarial network (GAN) based methodology used in prior work, this work utilizes a diffusion model to generate synthetic silicon data. The Jensen-Shannon (JS) divergence similarity and Frechet Inception Distance (FID) are used to evaluate the distribution and to quantify the quality of synthetic data, respectively. Experimental results demonstrate that the diffusion model is able to extract the multi-feature silicon data distribution more accurately, with an average JS divergence similarity of 0.987 and an FID of 6.28. This methodology enables to generate a substantial volume of silicon samples for extensive silicon data analysis and DTCO acceleration.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"146-153"},"PeriodicalIF":2.3,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-03-26DOI: 10.1109/TSM.2025.3554783
Jongmin Lee;Jungtae Park;Il-Jin Kim;Haeun Lee;Sehoon Park
A thorough investigation was conducted to determine the impact of outdoor airborne nanoparticles on defect generation during semiconductor manufacturing. Periods of elevated airborne particle levels, along with increased occurrences of embedded Silicon-Germanium (eSiGe) defects, were analyzed using experimental bare wafers designed to capture nanoparticles. Defect counts were analyzed to trace their origins. A novel data processing algorithm was developed to clarify and quantify the relationship between external airborne nanoparticles and defect formation. The findings indicate that eSiGe defect particles attributable to external airborne nano-contamination were generated at rates ranging from 1% to 6%, depending on the fab site. The robustness of the algorithm was validated through the application of an Artificial Neural Network (ANN) technique. Key parameters influencing eSiGe defects, identified as outdoor PM2.5 and Fab particles, were further analyzed using Random Forest Regression (RFG) and Quantile Regression (QR). Additionally, the application of Support Vector Regression (SVR) significantly enhanced the prediction accuracy of eSiGe defect particles, achieving an improvement of approximately 56% compared to RFG modeling. This study uniquely combines short-term experimental methods with long-term inline data science techniques to elucidate the effects of outdoor nanoparticles on eSiGe defects.
{"title":"Quantifying the Impact of Outdoor Airborne Nano-Contamination on eSiGe Defect Generation and Machine Learning-Based Predictive Modeling","authors":"Jongmin Lee;Jungtae Park;Il-Jin Kim;Haeun Lee;Sehoon Park","doi":"10.1109/TSM.2025.3554783","DOIUrl":"https://doi.org/10.1109/TSM.2025.3554783","url":null,"abstract":"A thorough investigation was conducted to determine the impact of outdoor airborne nanoparticles on defect generation during semiconductor manufacturing. Periods of elevated airborne particle levels, along with increased occurrences of embedded Silicon-Germanium (eSiGe) defects, were analyzed using experimental bare wafers designed to capture nanoparticles. Defect counts were analyzed to trace their origins. A novel data processing algorithm was developed to clarify and quantify the relationship between external airborne nanoparticles and defect formation. The findings indicate that eSiGe defect particles attributable to external airborne nano-contamination were generated at rates ranging from 1% to 6%, depending on the fab site. The robustness of the algorithm was validated through the application of an Artificial Neural Network (ANN) technique. Key parameters influencing eSiGe defects, identified as outdoor PM2.5 and Fab particles, were further analyzed using Random Forest Regression (RFG) and Quantile Regression (QR). Additionally, the application of Support Vector Regression (SVR) significantly enhanced the prediction accuracy of eSiGe defect particles, achieving an improvement of approximately 56% compared to RFG modeling. This study uniquely combines short-term experimental methods with long-term inline data science techniques to elucidate the effects of outdoor nanoparticles on eSiGe defects.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"178-184"},"PeriodicalIF":2.3,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
As the preceding process of chip-to-wafer (C2W) hybrid bonding, die pick-up, and transfer are critical in 3D heterogeneous integration (3D HI) technique. Especially, with the ever-shrinking die thickness and ever-increasing bumps on the die surface, mechanical scratches and electrostatic interference on chips caused by the traditional contact-type pickup process cannot be tolerated. Therefore, it is the trend to implement contactless pickup head to realize damage-free chip transfer. Herein, a contactless, pneumatic pickup head based on vortex flow was designed for the efficient and contactless grab of $50~mu $ m ultrathin chips. A baffle structure on the four corners of pickup head was designed, which can achieve stable noncontact pickup of target chip and maintain the position under multiangle loading conditions. Furthermore, we optimized baffle structure to reduce the oscillation of the chip by more than 50%. We explored the underlying mechanism of pneumatic noncontact pickup through computational fluid dynamics (CFD) simulation by three turbulence models. Further, a high-precision vortex platform was built to investigate the pickup force characteristics, radial pressure distribution, and oscillations for different intake pressure and their influence on the noncontact pickup effect. Eventually, the simulation and experimental results indicate that the optimal intake pressure for stable non-contact pickup is between 20 and 30 kPa. This study provides design and optimization methods for stable noncontact picking of microchips, offering theoretical and experimental basis for selecting the optimal air intake pressure in practical applications.
{"title":"Simulation and Experimental Analysis of Contactless Chip Pickup Process Based on a Vortex Flow Gripper","authors":"Peiran Zhai;Zhoulong Xu;Zhouping Yin;Xiaohang Li;Bin Xie;Hao Wu","doi":"10.1109/TSM.2025.3553559","DOIUrl":"https://doi.org/10.1109/TSM.2025.3553559","url":null,"abstract":"As the preceding process of chip-to-wafer (C2W) hybrid bonding, die pick-up, and transfer are critical in 3D heterogeneous integration (3D HI) technique. Especially, with the ever-shrinking die thickness and ever-increasing bumps on the die surface, mechanical scratches and electrostatic interference on chips caused by the traditional contact-type pickup process cannot be tolerated. Therefore, it is the trend to implement contactless pickup head to realize damage-free chip transfer. Herein, a contactless, pneumatic pickup head based on vortex flow was designed for the efficient and contactless grab of <inline-formula> <tex-math>$50~mu $ </tex-math></inline-formula>m ultrathin chips. A baffle structure on the four corners of pickup head was designed, which can achieve stable noncontact pickup of target chip and maintain the position under multiangle loading conditions. Furthermore, we optimized baffle structure to reduce the oscillation of the chip by more than 50%. We explored the underlying mechanism of pneumatic noncontact pickup through computational fluid dynamics (CFD) simulation by three turbulence models. Further, a high-precision vortex platform was built to investigate the pickup force characteristics, radial pressure distribution, and oscillations for different intake pressure and their influence on the noncontact pickup effect. Eventually, the simulation and experimental results indicate that the optimal intake pressure for stable non-contact pickup is between 20 and 30 kPa. This study provides design and optimization methods for stable noncontact picking of microchips, offering theoretical and experimental basis for selecting the optimal air intake pressure in practical applications.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"324-331"},"PeriodicalIF":2.3,"publicationDate":"2025-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this study, the periodic purge process of the silicon nitride oxide deposition chamber was quantitatively analyzed and optimized using a real-time contaminant particle sensor (RTCPS). The RTCPS can measure the particle number concentration emitted from the semiconductor process chamber at the foreline in real time. The previous periodic purge process, which used a cycle purge method alternating between showerhead flow on and off, only expelled the accumulated particles in the chamber during the early stages of each cycle. On the other hand, by adding heater movement during the cycle, continuous particle emission was achieved throughout the periodic purge, resulting in improved efficiency. Additionally, the purge time was reduced, leading to increased productivity.
{"title":"A Study on Particle Emission Efficiency of a Plasma Enhanced Chemical Vapor Deposition Chamber During Periodic Cycle Purge Process Using an Improved Single Particle Light Scattering Method","authors":"Myungjoon Kim;Minwoo Jang;Minchul Jung;Hyungsun Han;Suyeon Jung;Yoonbeom Song;Youngsoo Jung;Dohyung Kim;Jihun Mun;Byeonghyeon Min;Seunghyon Kang;Eunyoung Han;Myeonghun Oh;Young Jeong Kim","doi":"10.1109/TSM.2025.3572028","DOIUrl":"https://doi.org/10.1109/TSM.2025.3572028","url":null,"abstract":"In this study, the periodic purge process of the silicon nitride oxide deposition chamber was quantitatively analyzed and optimized using a real-time contaminant particle sensor (RTCPS). The RTCPS can measure the particle number concentration emitted from the semiconductor process chamber at the foreline in real time. The previous periodic purge process, which used a cycle purge method alternating between showerhead flow on and off, only expelled the accumulated particles in the chamber during the early stages of each cycle. On the other hand, by adding heater movement during the cycle, continuous particle emission was achieved throughout the periodic purge, resulting in improved efficiency. Additionally, the purge time was reduced, leading to increased productivity.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"667-674"},"PeriodicalIF":2.3,"publicationDate":"2025-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-03-21DOI: 10.1109/TSM.2025.3572285
Se Yun Jo;Ah Hyun Park;Sang Jeen Hong
An effort to find an alternative dry-cleaning process gas with low global warming potential (GWP) has been conducted to decrease greenhouse gas emissions. Carbonyl fluoride (COF2) is one of the candidates as an alternative gas for plasma-enhanced chemical vapor deposition (PECVD) chamber cleaning because of its lower GWP compared to the currently employed $mathrm {NF}_{mathrm {3}}$ gas. The dry-cleaning process conditions containing the power amount of the plasma source is related to the dissociation rate of the cleaning gas and dry-cleaning performance. We investigated the effects of the amount of remote plasma power to the chamber cleaning rate with COF2, and its effects with diluted gases of $mathrm {O}_{mathrm {2}}$ and Ar. By the comparison of both numerical analysis and experiment, we found that the change of the amount of power induced different production rates of species in the gas mixture. In the case of $mathrm {O}_{mathrm {2}}$ dilution, oxygen radicals prevail in the plasma, and it produces stable by-product of $mathrm {CO}_{mathrm {2}}$ with the reaction of oxygen radicals to yield more fluorine atoms and radicals. We conclude that oxygen radicals have a significant role in the dissociation of the COF2, production of fluorine radicals, and it helps to reduce the amount of cleaning inhibitors such as C-C and C-F compounds. Additional dilution gases for cleaning gas affect production mechanisms and rates of species.
{"title":"Effects of the Applied Power of Remote Plasma System With Green Alternative Chamber Cleaning Gas of Carbonyl Fluoride","authors":"Se Yun Jo;Ah Hyun Park;Sang Jeen Hong","doi":"10.1109/TSM.2025.3572285","DOIUrl":"https://doi.org/10.1109/TSM.2025.3572285","url":null,"abstract":"An effort to find an alternative dry-cleaning process gas with low global warming potential (GWP) has been conducted to decrease greenhouse gas emissions. Carbonyl fluoride (COF2) is one of the candidates as an alternative gas for plasma-enhanced chemical vapor deposition (PECVD) chamber cleaning because of its lower GWP compared to the currently employed <inline-formula> <tex-math>$mathrm {NF}_{mathrm {3}}$ </tex-math></inline-formula> gas. The dry-cleaning process conditions containing the power amount of the plasma source is related to the dissociation rate of the cleaning gas and dry-cleaning performance. We investigated the effects of the amount of remote plasma power to the chamber cleaning rate with COF2, and its effects with diluted gases of <inline-formula> <tex-math>$mathrm {O}_{mathrm {2}}$ </tex-math></inline-formula> and Ar. By the comparison of both numerical analysis and experiment, we found that the change of the amount of power induced different production rates of species in the gas mixture. In the case of <inline-formula> <tex-math>$mathrm {O}_{mathrm {2}}$ </tex-math></inline-formula> dilution, oxygen radicals prevail in the plasma, and it produces stable by-product of <inline-formula> <tex-math>$mathrm {CO}_{mathrm {2}}$ </tex-math></inline-formula> with the reaction of oxygen radicals to yield more fluorine atoms and radicals. We conclude that oxygen radicals have a significant role in the dissociation of the COF2, production of fluorine radicals, and it helps to reduce the amount of cleaning inhibitors such as C-C and C-F compounds. Additional dilution gases for cleaning gas affect production mechanisms and rates of species.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"624-633"},"PeriodicalIF":2.3,"publicationDate":"2025-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-03-20DOI: 10.1109/TSM.2025.3571926
Raphael Herding;Kenneth J. Fordyce;R. John Milne;Lars Mönch
Planning in semiconductor supply chains is challenging due to the sheer size of the supply chains, the distributed and hierarchical nature of the planning activities, the many inherent uncertainties, and the presence of multiple decision-makers with different objectives. The automation of planning processes is desirable to cope with the frequent changes in semiconductor supply chains. This requires rich communication between the different decision-making units, whether human planners or software, and hardware components of the planning system. In this paper, we describe an ontology that supports planning activities in semiconductor supply chains and illustrate, for instance, how it can be used to automatically generate linear programming (LP) models required for decision making in the borderless fab context.
{"title":"An Ontology for Semiconductor Supply Chain Planning","authors":"Raphael Herding;Kenneth J. Fordyce;R. John Milne;Lars Mönch","doi":"10.1109/TSM.2025.3571926","DOIUrl":"https://doi.org/10.1109/TSM.2025.3571926","url":null,"abstract":"Planning in semiconductor supply chains is challenging due to the sheer size of the supply chains, the distributed and hierarchical nature of the planning activities, the many inherent uncertainties, and the presence of multiple decision-makers with different objectives. The automation of planning processes is desirable to cope with the frequent changes in semiconductor supply chains. This requires rich communication between the different decision-making units, whether human planners or software, and hardware components of the planning system. In this paper, we describe an ontology that supports planning activities in semiconductor supply chains and illustrate, for instance, how it can be used to automatically generate linear programming (LP) models required for decision making in the borderless fab context.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"554-570"},"PeriodicalIF":2.3,"publicationDate":"2025-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11007645","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-03-19DOI: 10.1109/TSM.2025.3552349
Quan Yuan;Anna Peczek;Joe Frankel;Dan Rishavy;Christian Mai;Eric Christenson;Divya Pratap;Lars Zimmermann
In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with $0.25~mu $ m photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the system’s ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.
{"title":"Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits","authors":"Quan Yuan;Anna Peczek;Joe Frankel;Dan Rishavy;Christian Mai;Eric Christenson;Divya Pratap;Lars Zimmermann","doi":"10.1109/TSM.2025.3552349","DOIUrl":"https://doi.org/10.1109/TSM.2025.3552349","url":null,"abstract":"In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with <inline-formula> <tex-math>$0.25~mu $ </tex-math></inline-formula>m photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the system’s ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"168-177"},"PeriodicalIF":2.3,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934143","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In the photolithography process of integrated circuit (IC) manufacturing, overlay (OL) control is a key factor for successful exposure. Overlay control is achieved by creating models that can estimate the expected overlay error, so that this can be corrected before the wavefront reaches the wafer surface. Such models consist of basis functions, influenced by application-controllable variables such as process settings, tool characteristics, and field-related factors with their corresponding model parameters. The process of tuning the model parameters involves several time-consuming sensor measurements on markers distributed across the wafer surface and significantly impacts the throughput performance of the exposure system. For this reason, a strategic selection of wafer markers is necessary. In this paper, we propose a methodology to improve the overlay modeling process by exploiting Surface Reconstruction (SR). SR is used as an intermediate step, during the parameter estimation process, to generate additional data from a strategically selected set of markers that are spatially uniform and provide maximum information gain. The proposed method reconstructs the wafer surface by incorporating spatially interpolated estimates derived from the physical insights of existing measurements. This augmented data set, comprised of measured and synthetic overlay data, serves as a comprehensive input for the parameters’ tuning process leading to more accurate overlay modeling. The proposed method is evaluated using real-industry data from a semiconductor process of 300mm diameter wafers. The results demonstrate a significant reduction in the overlay residuals in both x and y directions.
{"title":"Surface Reconstruction for Enhancing the Overlay Modeling Optimization Procedure in Photolithography Processes","authors":"Aris Magklaras;Christos Gogos;Panayiotis Alefragis;Alexios Birbas;Sila Guler","doi":"10.1109/TSM.2025.3570904","DOIUrl":"https://doi.org/10.1109/TSM.2025.3570904","url":null,"abstract":"In the photolithography process of integrated circuit (IC) manufacturing, overlay (OL) control is a key factor for successful exposure. Overlay control is achieved by creating models that can estimate the expected overlay error, so that this can be corrected before the wavefront reaches the wafer surface. Such models consist of basis functions, influenced by application-controllable variables such as process settings, tool characteristics, and field-related factors with their corresponding model parameters. The process of tuning the model parameters involves several time-consuming sensor measurements on markers distributed across the wafer surface and significantly impacts the throughput performance of the exposure system. For this reason, a strategic selection of wafer markers is necessary. In this paper, we propose a methodology to improve the overlay modeling process by exploiting Surface Reconstruction (SR). SR is used as an intermediate step, during the parameter estimation process, to generate additional data from a strategically selected set of markers that are spatially uniform and provide maximum information gain. The proposed method reconstructs the wafer surface by incorporating spatially interpolated estimates derived from the physical insights of existing measurements. This augmented data set, comprised of measured and synthetic overlay data, serves as a comprehensive input for the parameters’ tuning process leading to more accurate overlay modeling. The proposed method is evaluated using real-industry data from a semiconductor process of 300mm diameter wafers. The results demonstrate a significant reduction in the overlay residuals in both x and y directions.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"499-509"},"PeriodicalIF":2.3,"publicationDate":"2025-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-03-15DOI: 10.1109/TSM.2025.3570323
Zhaoyang Wang;Haiyong Chen;Zhen Cao
The vision foundation model, relying on large-scale pre-training, has advanced image comprehension capabilities and excels in general scenarios. However, its performance remains suboptimal in specialized tasks, such as photovoltaic (PV) cells defect detection. This limitation stems from the models’ lack of domain-specific prior knowledge. To address this, we propose a two-stage pre-training framework comprising fine-grained feature autoencoding (FFA) and pseudo-box contrastive learning (PCL), which leverages extensive unlabeled raw images to inject domain expertise into the model. First, we investigate the fine-grained feature autoencoder, which trains a detail-sensitive vision transformer (ViT) backbone by reconstructing the histogram of oriented gradients (HOG) of masked images. Second, we pre-train the detection head through contrastive learning. Using selective search (SS) to generate pseudo-boxes, we treat paired boxes from two augmented views of an image as positive samples. The abundant unsupervised pseudo-boxes optimize the detection head’s local representation and localization capabilities. Finally, we fully fine-tune the model with labeled images. Based on this methodology, we build the cross-scenario photovoltaic defect detector (CPDD). The experimental results demonstrate that CPDD achieves state-of-the-art (SOTA) mAP50 scores on three benchmarks, outperforming detectors pre-trained on the COCO dataset as well as those specifically designed for PV defect detection.
{"title":"CPDD: A Cross-Scenario Photovoltaic Defect Detector Based on Fine-Grained Feature Autoencoding and Pseudo-Box Contrastive Learning","authors":"Zhaoyang Wang;Haiyong Chen;Zhen Cao","doi":"10.1109/TSM.2025.3570323","DOIUrl":"https://doi.org/10.1109/TSM.2025.3570323","url":null,"abstract":"The vision foundation model, relying on large-scale pre-training, has advanced image comprehension capabilities and excels in general scenarios. However, its performance remains suboptimal in specialized tasks, such as photovoltaic (PV) cells defect detection. This limitation stems from the models’ lack of domain-specific prior knowledge. To address this, we propose a two-stage pre-training framework comprising fine-grained feature autoencoding (FFA) and pseudo-box contrastive learning (PCL), which leverages extensive unlabeled raw images to inject domain expertise into the model. First, we investigate the fine-grained feature autoencoder, which trains a detail-sensitive vision transformer (ViT) backbone by reconstructing the histogram of oriented gradients (HOG) of masked images. Second, we pre-train the detection head through contrastive learning. Using selective search (SS) to generate pseudo-boxes, we treat paired boxes from two augmented views of an image as positive samples. The abundant unsupervised pseudo-boxes optimize the detection head’s local representation and localization capabilities. Finally, we fully fine-tune the model with labeled images. Based on this methodology, we build the cross-scenario photovoltaic defect detector (CPDD). The experimental results demonstrate that CPDD achieves state-of-the-art (SOTA) mAP50 scores on three benchmarks, outperforming detectors pre-trained on the COCO dataset as well as those specifically designed for PV defect detection.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"612-623"},"PeriodicalIF":2.3,"publicationDate":"2025-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-03-12DOI: 10.1109/TSM.2025.3569278
Miyuki Kouda;Yumi Mori;Tomohiko Sugita;Youyang Ng
Recently, the complexity of semiconductor manufacturing processes has increased, resulting in a growing need for high-precision optimization of device structures. For example, in batch-type wet etching devices, the flow of chemical liquids in the process bath can vary depending on the device structure, which causes variations in the etching state of the wafer. This issue is addressed using a feedback mechanism that adjusts the device structure iteratively based on the results of an etching experiment, thereby achieving more uniform etching conditions. However, this approach requires a large number of trial experiments. In the fabrication process of 3D flash memory devices, the formation of word lines in the silicon substrate requires precise control of the silicon concentration in the etching solution. However, this concentration can fluctuate due to the dissolution of the SiN film during the etching process, which can cause various problems. Thus, this study proposes an innovative multi-objective Bayesian optimization method that is informed by image and physical quantity data from fluid dynamics simulations to derive optimal wet etching bath design parameters. The proposed method was validated through simulation experiments, and the simulation results were used to identify the best possible wet etching bath designs.
{"title":"Optimal Design of Wet Etching Bath for 3-D Flash Memories Using Multi-Objective Bayesian Optimization","authors":"Miyuki Kouda;Yumi Mori;Tomohiko Sugita;Youyang Ng","doi":"10.1109/TSM.2025.3569278","DOIUrl":"https://doi.org/10.1109/TSM.2025.3569278","url":null,"abstract":"Recently, the complexity of semiconductor manufacturing processes has increased, resulting in a growing need for high-precision optimization of device structures. For example, in batch-type wet etching devices, the flow of chemical liquids in the process bath can vary depending on the device structure, which causes variations in the etching state of the wafer. This issue is addressed using a feedback mechanism that adjusts the device structure iteratively based on the results of an etching experiment, thereby achieving more uniform etching conditions. However, this approach requires a large number of trial experiments. In the fabrication process of 3D flash memory devices, the formation of word lines in the silicon substrate requires precise control of the silicon concentration in the etching solution. However, this concentration can fluctuate due to the dissolution of the SiN film during the etching process, which can cause various problems. Thus, this study proposes an innovative multi-objective Bayesian optimization method that is informed by image and physical quantity data from fluid dynamics simulations to derive optimal wet etching bath design parameters. The proposed method was validated through simulation experiments, and the simulation results were used to identify the best possible wet etching bath designs.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"439-445"},"PeriodicalIF":2.3,"publicationDate":"2025-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：