Pub Date : 2024-06-19DOI: 10.1109/tsm.2024.3416830
Emily Gallagher, Lars-Åke Ragnarsson, Cedric Rolin
{"title":"Sustainable Semiconductor Manufacturing: The Role of Lithography","authors":"Emily Gallagher, Lars-Åke Ragnarsson, Cedric Rolin","doi":"10.1109/tsm.2024.3416830","DOIUrl":"https://doi.org/10.1109/tsm.2024.3416830","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.7,"publicationDate":"2024-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-18DOI: 10.1109/TSM.2024.3416055
Mohammad Mehedi Hasan;Naigong Yu;Imran Khan Mirani
Detecting wafer map anomalies is crucial for preventing yield loss in semiconductor fabrication, although intricate patterns and resource-intensive labeled data prerequisites hinder precise deep-learning segmentation. This paper presents an innovative, unsupervised method for detecting pixel-level anomalies in wafer maps. It utilizes an efficient dual attention module with a knowledge distillation network to learn defect distributions without anomalies. Knowledge transfer is achieved by distilling information from a pre-trained teacher into a student network with similar architecture, except an efficient dual attention module is incorporated atop the teacher network’s feature pyramid hierarchies, which enhances feature representation and segmentation across pyramid hierarchies that selectively emphasize relevant and discard irrelevant features by capturing contextual associations in positional and channel dimensions. Furthermore, it enables student networks to acquire an improved knowledge of hierarchical features to identify anomalies across different scales accurately. The dissimilarity in feature pyramids acts as a discriminatory function, predicting the likelihood of an abnormality, resulting in highly accurate pixel-level anomaly detection. Consequently, our proposed method excelled on the WM-811K and MixedWM38 datasets, achieving AUROC, AUPR, AUPRO, and F1-Scores of (99.65%, 99.35%), (97.31%, 92.13%), (90.76%, 84.66%) respectively, alongside an inference speed of 3.204 FPS, showcasing its high precision and efficiency.
检测晶圆图异常对于防止半导体制造中的良率损失至关重要，但复杂的模式和资源密集型标记数据前提条件阻碍了精确的深度学习分割。本文提出了一种创新的无监督方法，用于检测晶圆图中的像素级异常。它利用高效的双重关注模块和知识提炼网络来学习无异常的缺陷分布。除了在教师网络的特征金字塔层次结构上加入高效的双重注意模块外，知识转移是通过将预先训练好的教师网络中的信息提炼到具有类似结构的学生网络中来实现的，这种结构通过捕捉位置和通道维度中的上下文关联，增强了金字塔层次结构中的特征表示和分割，从而有选择性地强调相关特征，摒弃无关特征。此外，它还能使学生网络获得更好的分层特征知识，从而准确识别不同尺度的异常情况。特征金字塔中的不相似性可作为一种判别功能，预测异常的可能性，从而实现高精度的像素级异常检测。因此，我们提出的方法在 WM-811K 和 MixedWM38 数据集上表现出色，AUROC、AUPR、AUPRO 和 F1 分数分别为（99.65%、99.35%）、（97.31%、92.13%）、（90.76%、84.66%），推理速度为 3.204 FPS，显示了其高精度和高效率。
{"title":"Efficient Dual-Attention-Based Knowledge Distillation Network for Unsupervised Wafer Map Anomaly Detection","authors":"Mohammad Mehedi Hasan;Naigong Yu;Imran Khan Mirani","doi":"10.1109/TSM.2024.3416055","DOIUrl":"10.1109/TSM.2024.3416055","url":null,"abstract":"Detecting wafer map anomalies is crucial for preventing yield loss in semiconductor fabrication, although intricate patterns and resource-intensive labeled data prerequisites hinder precise deep-learning segmentation. This paper presents an innovative, unsupervised method for detecting pixel-level anomalies in wafer maps. It utilizes an efficient dual attention module with a knowledge distillation network to learn defect distributions without anomalies. Knowledge transfer is achieved by distilling information from a pre-trained teacher into a student network with similar architecture, except an efficient dual attention module is incorporated atop the teacher network’s feature pyramid hierarchies, which enhances feature representation and segmentation across pyramid hierarchies that selectively emphasize relevant and discard irrelevant features by capturing contextual associations in positional and channel dimensions. Furthermore, it enables student networks to acquire an improved knowledge of hierarchical features to identify anomalies across different scales accurately. The dissimilarity in feature pyramids acts as a discriminatory function, predicting the likelihood of an abnormality, resulting in highly accurate pixel-level anomaly detection. Consequently, our proposed method excelled on the WM-811K and MixedWM38 datasets, achieving AUROC, AUPR, AUPRO, and F1-Scores of (99.65%, 99.35%), (97.31%, 92.13%), (90.76%, 84.66%) respectively, alongside an inference speed of 3.204 FPS, showcasing its high precision and efficiency.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
During semiconductor manufacturing, the high temperature sulfuric acid peroxide mixture (SPM) and airborne molecule contaminants (AMCs) can result in the formation of defects such as Silicon-carbide (Si-C) on the wafer surface. Furthermore, defects adversely affect device performance, yield, and manufacturing productivity. In this work, a novel approach is proposed by introducing an additional nitrogen (N2) gas purge nozzle inside the single wafer chamber to reduce total volatile organic compounds (t-VOC). Additionally, we provide insights into the mechanism underlying defect formation in SPM which has not been previously explained. In SPM process, defects are formed by AMCs and high temperature. So, various AMCs were investigated in this work. Moreover, the correlation of the number of Si-C defect with temperature and duration of chemical flow was also analyzed. The experimental results demonstrated that defects and t-VOC follow the same concentration trend. Our nitrogen purge method effectively diluted the chamber environment, reducing the adhesion energy between contamination particles and the wafer surface. A suitable N2 purging rate inside the single-wafer chamber facilitated the elimination of around 63% of defects from wafer surface. Hence, this approach can be crucial in minimizing the Si-C defects and improving the chamber environment for high-temperature SPM wet-cleaning process.
{"title":"Elimination of Si-C Defect on Wafer Surface in High-Temperature SPM Process Through Nitrogen Purge in 300-mm Single-Wafer Chamber","authors":"Rajan Kumar Singh;Alfie Lin;Haley Lin;Max Chen;Yvonne Pan;Nancy Cho;Willy Chen;Jamiet Tung;Walt Hu;Wilson Huang","doi":"10.1109/TSM.2024.3416079","DOIUrl":"10.1109/TSM.2024.3416079","url":null,"abstract":"During semiconductor manufacturing, the high temperature sulfuric acid peroxide mixture (SPM) and airborne molecule contaminants (AMCs) can result in the formation of defects such as Silicon-carbide (Si-C) on the wafer surface. Furthermore, defects adversely affect device performance, yield, and manufacturing productivity. In this work, a novel approach is proposed by introducing an additional nitrogen (N2) gas purge nozzle inside the single wafer chamber to reduce total volatile organic compounds (t-VOC). Additionally, we provide insights into the mechanism underlying defect formation in SPM which has not been previously explained. In SPM process, defects are formed by AMCs and high temperature. So, various AMCs were investigated in this work. Moreover, the correlation of the number of Si-C defect with temperature and duration of chemical flow was also analyzed. The experimental results demonstrated that defects and t-VOC follow the same concentration trend. Our nitrogen purge method effectively diluted the chamber environment, reducing the adhesion energy between contamination particles and the wafer surface. A suitable N2 purging rate inside the single-wafer chamber facilitated the elimination of around 63% of defects from wafer surface. Hence, this approach can be crucial in minimizing the Si-C defects and improving the chamber environment for high-temperature SPM wet-cleaning process.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-13DOI: 10.1109/TSM.2024.3414121
Adam Chalupa;Joel Warner;Jarett Martin
Industrial semiconductor electrodeposition plating cells require recirculation of process chemicals with consistent flow and minimal contaminants to prevent defects from developing during film deposition. This manuscript investigates how recirculation nozzle quality and nozzle machining can affect bath chemical uniformity. Computational fluid dynamics simulations are utilized to visualize bath chemical velocities based on variable nozzle conditions in four case studies. Results show that strict quality control of inlet nozzles, in conjunction with proper mounting angles, induce laminar bath flow. Greater fluid uniformity and laminar flow translate to a reduction of in-line defects and increased wafer yield.
{"title":"Computational Study of Chemical Uniformity Impacts on Electrodeposition","authors":"Adam Chalupa;Joel Warner;Jarett Martin","doi":"10.1109/TSM.2024.3414121","DOIUrl":"10.1109/TSM.2024.3414121","url":null,"abstract":"Industrial semiconductor electrodeposition plating cells require recirculation of process chemicals with consistent flow and minimal contaminants to prevent defects from developing during film deposition. This manuscript investigates how recirculation nozzle quality and nozzle machining can affect bath chemical uniformity. Computational fluid dynamics simulations are utilized to visualize bath chemical velocities based on variable nozzle conditions in four case studies. Results show that strict quality control of inlet nozzles, in conjunction with proper mounting angles, induce laminar bath flow. Greater fluid uniformity and laminar flow translate to a reduction of in-line defects and increased wafer yield.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-10DOI: 10.1109/TSM.2024.3411662
Sanghyuk Hong;Hasung Kong
The increasing number of fires in semiconductor factories requires new approaches to fire safety. It is important to study the specifics of the activities of companies that use potentially flammable materials in production, such as air filtration units, electrical cables and floor panels. The aim of the study was therefore to determine the level of fire risk in the clean rooms of these companies by means of real fire experiments. As a result, a fire risk assessment of the main combustible materials such as air filtration units, electrical cables and floor panels in the plenum room on the top floor of the cleanroom was carried out. The results of the experiment showed a low ignition propensity of the air filtration unit and limited fire propagation in the event of ignition. High calorific materials, such as fibreglass in filters, were identified as increasing the risk. Based on this, it was proposed to replace these materials with flame retardant materials and to improve the stop/fire control systems of the air filtration units. The results obtained in the study should be used for the development of technical recommendations for improving fire safety in critical premises at semiconductor factories.
{"title":"A Study on the Improvement of Safety and Efficiency of Clean Rooms in Semiconductor Factories Through Real Fire Experiments","authors":"Sanghyuk Hong;Hasung Kong","doi":"10.1109/TSM.2024.3411662","DOIUrl":"10.1109/TSM.2024.3411662","url":null,"abstract":"The increasing number of fires in semiconductor factories requires new approaches to fire safety. It is important to study the specifics of the activities of companies that use potentially flammable materials in production, such as air filtration units, electrical cables and floor panels. The aim of the study was therefore to determine the level of fire risk in the clean rooms of these companies by means of real fire experiments. As a result, a fire risk assessment of the main combustible materials such as air filtration units, electrical cables and floor panels in the plenum room on the top floor of the cleanroom was carried out. The results of the experiment showed a low ignition propensity of the air filtration unit and limited fire propagation in the event of ignition. High calorific materials, such as fibreglass in filters, were identified as increasing the risk. Based on this, it was proposed to replace these materials with flame retardant materials and to improve the stop/fire control systems of the air filtration units. The results obtained in the study should be used for the development of technical recommendations for improving fire safety in critical premises at semiconductor factories.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-06DOI: 10.1109/tsm.2024.3408926
I.-Y. Liu, L. Van Winckel, L. Boakes, M. Garcia Bardon, C. Rolin, L.-Å. Ragnarsson
{"title":"Modeling the Energy Consumption of Integrated Circuit fab Infrastructure","authors":"I.-Y. Liu, L. Van Winckel, L. Boakes, M. Garcia Bardon, C. Rolin, L.-Å. Ragnarsson","doi":"10.1109/tsm.2024.3408926","DOIUrl":"https://doi.org/10.1109/tsm.2024.3408926","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.7,"publicationDate":"2024-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-06DOI: 10.1109/TSM.2024.3410513
Benjamin Vavrille;Lionel Vignoud;Laurent-Luc Chapelon;Rafael Estevez
Thermoset resins are singular materials in the field of microelectronics. Because they exhibit a high contrast of thermomechanical properties with other integrated materials like oxides, metals or silicon, polymers can threaten the mechanical integrity of stacks. Knowing polymer properties allows manufacturers to foresee the compatibility between materials and improve chipsets reliability. At a bilayer scale, the properties mismatch between the polymer film and the silicon substrate causes an overall curvature of the wafer which evolves with temperature. By comparing the thermally induced curvature of two distinct substrates with the same film, the biaxial modulus and the coefficient of thermal expansion of the film can be determined. This method can not only check the achievement of the polymer cross-linking, but also estimates their relaxation temperatures. In this article, we present the ability of this method to, not only, measure those properties in the glassy state, but also, for the first time, in the rubbery state. We also illustrate the proficiency of this approach in detecting and characterizing two successive glassy states.
{"title":"Advances in the Thermal Study of Polymers for Microelectronics Using the Thermally Induced Curvature Approach","authors":"Benjamin Vavrille;Lionel Vignoud;Laurent-Luc Chapelon;Rafael Estevez","doi":"10.1109/TSM.2024.3410513","DOIUrl":"10.1109/TSM.2024.3410513","url":null,"abstract":"Thermoset resins are singular materials in the field of microelectronics. Because they exhibit a high contrast of thermomechanical properties with other integrated materials like oxides, metals or silicon, polymers can threaten the mechanical integrity of stacks. Knowing polymer properties allows manufacturers to foresee the compatibility between materials and improve chipsets reliability. At a bilayer scale, the properties mismatch between the polymer film and the silicon substrate causes an overall curvature of the wafer which evolves with temperature. By comparing the thermally induced curvature of two distinct substrates with the same film, the biaxial modulus and the coefficient of thermal expansion of the film can be determined. This method can not only check the achievement of the polymer cross-linking, but also estimates their relaxation temperatures. In this article, we present the ability of this method to, not only, measure those properties in the glassy state, but also, for the first time, in the rubbery state. We also illustrate the proficiency of this approach in detecting and characterizing two successive glassy states.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-03DOI: 10.1109/TSM.2024.3404475
Youcheng Wang;Zhuo Chen;Cong Wang;Nick Keller;G. Andrew Antonelli;Zhuan Liu;Troy Ribaudo;Rostislav Grynko
Three dimensional Not-And (3D NAND) flash memory devices are scaling in the vertical direction to more than 200 oxide/sacrificial wordline nitride layers to further increase storage capacity and enhance energy efficiency. The accurate measurement of the thicknesses of these layers is critical to controlling stress-induced wafer warping and pattern distortion. While traditional optical metrology in the UV-vis-NIR range offers a non-destructive inline solution for high volume manufacturing, we demonstrate in this paper, that mid-IR metrology has advantages in de-correlating oxide and nitride thicknesses owing to their unique absorption signatures. Furthermore, because of the depths sensitivity of oxide and nitride absorptions, the simulated measurement results show the ability to differentiate thickness variations in the vertical zones. Good blind test results were obtained with a machine learning model trained on pseudo-references and pseudo spectra with added skew.
{"title":"3-D NAND Oxide/Nitride Tier Stack Thickness and Zonal Measurements With Infrared Metrology","authors":"Youcheng Wang;Zhuo Chen;Cong Wang;Nick Keller;G. Andrew Antonelli;Zhuan Liu;Troy Ribaudo;Rostislav Grynko","doi":"10.1109/TSM.2024.3404475","DOIUrl":"10.1109/TSM.2024.3404475","url":null,"abstract":"Three dimensional Not-And (3D NAND) flash memory devices are scaling in the vertical direction to more than 200 oxide/sacrificial wordline nitride layers to further increase storage capacity and enhance energy efficiency. The accurate measurement of the thicknesses of these layers is critical to controlling stress-induced wafer warping and pattern distortion. While traditional optical metrology in the UV-vis-NIR range offers a non-destructive inline solution for high volume manufacturing, we demonstrate in this paper, that mid-IR metrology has advantages in de-correlating oxide and nitride thicknesses owing to their unique absorption signatures. Furthermore, because of the depths sensitivity of oxide and nitride absorptions, the simulated measurement results show the ability to differentiate thickness variations in the vertical zones. Good blind test results were obtained with a machine learning model trained on pseudo-references and pseudo spectra with added skew.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141942155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-05-21DOI: 10.1109/tsm.2024.3403230
Dongxue Zhao, Zhiliang Xia, Yi Yang, Meiying Liu, Yuancheng Yang, Zongliang Huo
{"title":"Optimization of Void Defects at TiN/Si:HfO2 Interface for 3D Ferroelectric Memory","authors":"Dongxue Zhao, Zhiliang Xia, Yi Yang, Meiying Liu, Yuancheng Yang, Zongliang Huo","doi":"10.1109/tsm.2024.3403230","DOIUrl":"https://doi.org/10.1109/tsm.2024.3403230","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.7,"publicationDate":"2024-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141149772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this study, the origin of growth pits on the surface of 4H-silicon carbide epitaxial films grown using a chemical vapor deposition reactor was clarified by evaluating the surface morphology of substrates immediately before the epitaxial growth and of epitaxial films. When the film was grown under non-optimized conditions, we found that numerous Si particles were formed on the surface of the substrate before the epitaxial growth and that the numerous growth pits on the subsequently grown epitaxial film were originated from Si particles. We observed that, by increasing the HCl flow rate through the outer nozzles in the gas inlet, which has a double-pipe structure consisting of inner and outer nozzles, the growth pit density was successfully decreased.
{"title":"Observation and Suppression of Growth Pits Formed on 4H-SiC Epitaxial Films Grown Using Halide Chemical Vapor Deposition Process","authors":"Yoshiaki Daigo;Keisuke Kurashima;Shigeaki Ishii;Ichiro Mizushima","doi":"10.1109/TSM.2024.3395361","DOIUrl":"10.1109/TSM.2024.3395361","url":null,"abstract":"In this study, the origin of growth pits on the surface of 4H-silicon carbide epitaxial films grown using a chemical vapor deposition reactor was clarified by evaluating the surface morphology of substrates immediately before the epitaxial growth and of epitaxial films. When the film was grown under non-optimized conditions, we found that numerous Si particles were formed on the surface of the substrate before the epitaxial growth and that the numerous growth pits on the subsequently grown epitaxial film were originated from Si particles. We observed that, by increasing the HCl flow rate through the outer nozzles in the gas inlet, which has a double-pipe structure consisting of inner and outer nozzles, the growth pit density was successfully decreased.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10511277","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140831548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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