Pub Date : 2026-03-01Epub Date: 2026-01-27DOI: 10.1016/j.aeue.2026.156237
Pooja Panda, Ashutosh Mahajan
In this article, we present a dual-band reflective frequency selective surface (FSS) capable of electronically switching between the WLAN bands at 2.45 GHz and 5 GHz. The design employs a loop-based geometry to achieve band-stop functionality, with patterned structures implemented on both the top and bottom layers. Each unit cell integrates four PIN diodes, enabling two distinct switching states. The structure exhibits polarization sensitivity and demonstrates desirable performance under TE polarization. The unit cell dimensions are approximately 0.26 at the lower operating frequency. A parallel biasing scheme is employed, and RF isolation within the DC biasing lines is ensured using six wire-wound inductors per unit cell. A prototype of size 28.8 cm 28.8 cm is fabricated and experimentally characterized under normal incidence. The measured results validate the effectiveness of the proposed FSS, showing strong agreement with simulations. Both simulated and experimental responses show transmission coefficients below -16 dB at the stop bands and insertion losses below 3.3 dB at the pass bands.
在本文中,我们提出了一种双频反射频率选择表面(FSS),能够在2.45 GHz和5 GHz的WLAN频段之间进行电子切换。该设计采用基于环路的几何结构来实现带阻功能,在顶层和底层都实现了图案结构。每个单元集成了四个PIN二极管,实现两种不同的开关状态。该结构具有极化敏感性,在TE极化下表现出良好的性能。在较低的工作频率下,单胞尺寸约为0.26λ0。采用并联偏置方案,并确保直流偏置线内的射频隔离使用六个线绕电感器每个单元单元。制作了尺寸为28.8 cm × 28.8 cm的原型机,并在正入射下进行了实验表征。实测结果验证了所提FSS的有效性,与仿真结果吻合较好。模拟和实验结果均表明,阻带处的传输系数低于-16 dB,通带处的插入损耗低于3.3 dB。
{"title":"Reconfigurable frequency selective surface for dual-band wireless communication and internet of things applications","authors":"Pooja Panda, Ashutosh Mahajan","doi":"10.1016/j.aeue.2026.156237","DOIUrl":"10.1016/j.aeue.2026.156237","url":null,"abstract":"<div><div>In this article, we present a dual-band reflective frequency selective surface (FSS) capable of electronically switching between the WLAN bands at 2.45 GHz and 5 GHz. The design employs a loop-based geometry to achieve band-stop functionality, with patterned structures implemented on both the top and bottom layers. Each unit cell integrates four PIN diodes, enabling two distinct switching states. The structure exhibits polarization sensitivity and demonstrates desirable performance under TE polarization. The unit cell dimensions are approximately 0.26<span><math><msub><mrow><mi>λ</mi></mrow><mrow><mn>0</mn></mrow></msub></math></span> at the lower operating frequency. A parallel biasing scheme is employed, and RF isolation within the DC biasing lines is ensured using six wire-wound inductors per unit cell. A prototype of size 28.8 cm <span><math><mo>×</mo></math></span> 28.8 cm is fabricated and experimentally characterized under normal incidence. The measured results validate the effectiveness of the proposed FSS, showing strong agreement with simulations. Both simulated and experimental responses show transmission coefficients below -16 dB at the stop bands and insertion losses below 3.3 dB at the pass bands.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156237"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146080144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-01-31DOI: 10.1016/j.aeue.2026.156238
Duc Hoang Trong , Lanh Chu Van , Thuy Nguyen Thi
This paper presents a numerical study on the optimization of square lattice silica photonic crystal fibers with variable pitch and a C2Cl4-infiltrated core, aiming to achieve tailored dispersion characteristics for efficient mid-infrared supercontinuum generation at 1.55 μm wavelength. The square cladding structure is known as an effective solution for generating smooth, flat-top SCGs, suitable for optical tomography applications. The first fiber has an ultra-flat all-normal dispersion profile with ΔD = ±0.889 ps/nm·km over a wavelength range of 0.352 μm. When pumped with 40 fs pulses at an input energy of 0.12 nJ, this fiber generates supercontinuum spectrum spanning from 0.811 to 2.44 μm (approximately 1.6 octaves), driven primarily by self phase modulation and optical wave breaking. The second fiber provides flat anomalous dispersion (ΔD = ±7.573 ps/nm·km over the same wavelength range as the first fiber), with a low dispersion value of 2.448 ps/nm·km at 1.55 μm. It supports soliton induced supercontinuum with a spectrum covering 0.788 to 3.673 μm (more than two octaves) using a pump pulse of 120 fs duration and an input energy of 0.48 nJ. These optimized fibers demonstrate strong potential for the realization of compact, cost effective supercontinuum generation sources applicable to mid-infrared nonlinear applications.
{"title":"Over two octaves supercontinuum generation in low dispersion square lattice silica photonic crystal fiber","authors":"Duc Hoang Trong , Lanh Chu Van , Thuy Nguyen Thi","doi":"10.1016/j.aeue.2026.156238","DOIUrl":"10.1016/j.aeue.2026.156238","url":null,"abstract":"<div><div>This paper presents a numerical study on the optimization of square lattice silica photonic crystal fibers with variable pitch and a C<sub>2</sub>Cl<sub>4</sub>-infiltrated core, aiming to achieve tailored dispersion characteristics for efficient mid-infrared supercontinuum generation at 1.55 μm wavelength. The square cladding structure is known as an effective solution for generating smooth, flat-top SCGs, suitable for optical tomography applications. The first fiber has an ultra-flat all-normal dispersion profile with Δ<em>D</em> = ±0.889 ps/nm·km over a wavelength range of 0.352 μm. When pumped with 40 fs pulses at an input energy of 0.12 nJ, this fiber generates supercontinuum spectrum spanning from 0.811 to 2.44 μm (approximately 1.6 octaves), driven primarily by self phase modulation and optical wave breaking. The second fiber provides flat anomalous dispersion (Δ<em>D</em> = ±7.573 ps/nm·km over the same wavelength range as the first fiber), with a low dispersion value of 2.448 ps/nm·km at 1.55 μm. It supports soliton induced supercontinuum with a spectrum covering 0.788 to 3.673 μm (more than two octaves) using a pump pulse of 120 fs duration and an input energy of 0.48 nJ. These optimized fibers demonstrate strong potential for the realization of compact, cost effective supercontinuum generation sources applicable to mid-infrared nonlinear applications.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156238"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-02-07DOI: 10.1016/j.aeue.2026.156246
Mohamed O. Musa, Mohamed Naguib, Ahmed H. Elghandour, Alaa Eldin Rohiem
Inter-Satellite Optical Wireless Communication (IS-OWC) offers high-capacity links but suffers severe performance degradation due to pointing errors caused by satellite vibrations and jitter. To address this challenge, this paper presents a comprehensive channel modeling framework for IS-OWC links under pointing errors and proposes a Dynamic Beam Waist Adjustment (DBWA) technique that adaptively mitigates these impairments in real time without requiring prior statistical knowledge of the channel. Based on the proposed model, closed-form expressions are derived for performance metrics, including the average bit error probability, average bit error rate, and outage probability, under both non-coherent OOK and coherent BPSK modulation schemes. Monte Carlo simulations validate the analytical derivations and demonstrate that DBWA achieves up to a 46.6% improvement in channel gain and orders-of-magnitude reductions in error probability and outage compared to conventional fixed-waist configurations. Numerical results under varying pointing error levels, link distances, operating wavelengths, and receiver aperture sizes confirm the robustness and generality of the proposed framework. To the best of our knowledge, this work provides the first comprehensive analytical performance analysis of DBWA-equipped IS-OWC systems. The proposed method is computationally efficient, robust to misalignment, and establishes a foundation for reliable next-generation inter-satellite and deep-space optical networks.
{"title":"Channel modeling and pointing error mitigation in inter-satellite optical links using a dynamic beam waist adjustment method","authors":"Mohamed O. Musa, Mohamed Naguib, Ahmed H. Elghandour, Alaa Eldin Rohiem","doi":"10.1016/j.aeue.2026.156246","DOIUrl":"10.1016/j.aeue.2026.156246","url":null,"abstract":"<div><div>Inter-Satellite Optical Wireless Communication (IS-OWC) offers high-capacity links but suffers severe performance degradation due to pointing errors caused by satellite vibrations and jitter. To address this challenge, this paper presents a comprehensive channel modeling framework for IS-OWC links under pointing errors and proposes a Dynamic Beam Waist Adjustment (DBWA) technique that adaptively mitigates these impairments in real time without requiring prior statistical knowledge of the channel. Based on the proposed model, closed-form expressions are derived for performance metrics, including the average bit error probability, average bit error rate, and outage probability, under both non-coherent OOK and coherent BPSK modulation schemes. Monte Carlo simulations validate the analytical derivations and demonstrate that DBWA achieves up to a 46.6% improvement in channel gain and orders-of-magnitude reductions in error probability and outage compared to conventional fixed-waist configurations. Numerical results under varying pointing error levels, link distances, operating wavelengths, and receiver aperture sizes confirm the robustness and generality of the proposed framework. To the best of our knowledge, this work provides the first comprehensive analytical performance analysis of DBWA-equipped IS-OWC systems. The proposed method is computationally efficient, robust to misalignment, and establishes a foundation for reliable next-generation inter-satellite and deep-space optical networks.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"208 ","pages":"Article 156246"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146147241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-02-11DOI: 10.1016/j.aeue.2026.156258
Ruibin Gao, Jingzhou Pang
This paper proposed a fully matched sequential load modulated balanced amplifier (FM-SLMBA) architecture. The proposed design employs a novel output matching strategy for the balanced power amplifier, combined with a specific phase compensation scheme. This approach enables the implementation of complex output matching networks with arbitrary phase features within the balanced path, while also enabling the matching between arbitrary optimal impedance of the balanced path transistors and the characteristic impedance of the output coupler. Consequently, the FM-SLMBA achieves broadband matching, unconstrained by active device parasitic parameters or optimal impedance limitations. The paper provides a detailed theoretical derivation and analysis of the operating mechanism of the FM-SLMBA, and the analytical solution of the matching networks is provided. To validate the theory, an ultra-wideband RF-input SLMBA utilizing commercially available gallium nitride (GaN) transistors was designed, fabricated, and tested. The fabricated FM-SLMBA operates across a 0.5–2.5 GHz frequency band, delivering a saturated output power of 45.8–47.9 dBm over this range. At a 10-dB output power back-off (OBO), it achieves drain efficiency of 42.0–57.5%. Furthermore, under modulated signal testing with a 100 MHz bandwidth, the amplifier demonstrated an ACLR better than −45.5 dBc after digital predistortion (DPD).
{"title":"A fully-matched sequential LMBA with arbitrary impedance transformation ratio: Analytical theory and design methodology","authors":"Ruibin Gao, Jingzhou Pang","doi":"10.1016/j.aeue.2026.156258","DOIUrl":"10.1016/j.aeue.2026.156258","url":null,"abstract":"<div><div>This paper proposed a fully matched sequential load modulated balanced amplifier (FM-SLMBA) architecture. The proposed design employs a novel output matching strategy for the balanced power amplifier, combined with a specific phase compensation scheme. This approach enables the implementation of complex output matching networks with arbitrary phase features within the balanced path, while also enabling the matching between arbitrary optimal impedance of the balanced path transistors and the characteristic impedance of the output coupler. Consequently, the FM-SLMBA achieves broadband matching, unconstrained by active device parasitic parameters or optimal impedance limitations. The paper provides a detailed theoretical derivation and analysis of the operating mechanism of the FM-SLMBA, and the analytical solution of the matching networks is provided. To validate the theory, an ultra-wideband RF-input SLMBA utilizing commercially available gallium nitride (GaN) transistors was designed, fabricated, and tested. The fabricated FM-SLMBA operates across a 0.5–2.5 GHz frequency band, delivering a saturated output power of 45.8–47.9 dBm over this range. At a 10-dB output power back-off (OBO), it achieves drain efficiency of 42.0–57.5%. Furthermore, under modulated signal testing with a 100 MHz bandwidth, the amplifier demonstrated an ACLR better than −45.5 dBc after digital predistortion (DPD).</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"208 ","pages":"Article 156258"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146192926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-02-02DOI: 10.1016/j.aeue.2026.156242
Smrutilekha Samanta , Santanu Sarkar
The high-speed digital-to-analog-converters (DACs) mainly suffer from low dynamic performances due to mismatch induced non-linearities. The amplitude mismatch and timing mismatch are the major sources that critically challenge the DAC linearity at higher sampling frequencies. This article presents a 500 MHz 10-bit current-steering DAC (CS-DAC) that adopts distributed dual randomization Dynamic Element Matching (DDR-DEM) technique to address these challenges. The DDR-DEM CSDAC utilizes the advantage of distributed architecture to reduce the mid-code glitches. The dual randomization technique adds an additional degree of random rotation to suppress the non-linear distortion for high frequency DACs. The proposed architecture is designed in 180 nm CMOS process and occupies an area of 0.28 mm. Monte-Carlo analysis shows this DAC achieves 71.6-dB spurious-free dynamic range (SFDR) at the near Nyquist the frequency range. The power consumption of the proposed DDRDEM CS-DAC is observed approximately 21.2 mW from 1.8 V DC supply.
{"title":"Performance enhanced current-steering DAC using distributed dual randomization dynamic element matching technique","authors":"Smrutilekha Samanta , Santanu Sarkar","doi":"10.1016/j.aeue.2026.156242","DOIUrl":"10.1016/j.aeue.2026.156242","url":null,"abstract":"<div><div>The high-speed digital-to-analog-converters (DACs) mainly suffer from low dynamic performances due to mismatch induced non-linearities. The amplitude mismatch and timing mismatch are the major sources that critically challenge the DAC linearity at higher sampling frequencies. This article presents a 500 MHz 10-bit current-steering DAC (CS-DAC) that adopts distributed dual randomization Dynamic Element Matching (DDR-DEM) technique to address these challenges. The DDR-DEM CSDAC utilizes the advantage of distributed architecture to reduce the mid-code glitches. The dual randomization technique adds an additional degree of random rotation to suppress the non-linear distortion for high frequency DACs. The proposed architecture is designed in 180 nm CMOS process and occupies an area of 0.28 mm<span><math><msup><mrow></mrow><mrow><mn>2</mn></mrow></msup></math></span>. Monte-Carlo analysis shows this DAC achieves 71.6-dB spurious-free dynamic range (SFDR) at the near Nyquist the frequency range. The power consumption of the proposed DDRDEM CS-DAC is observed approximately 21.2 mW from 1.8 V DC supply.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156242"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-01-22DOI: 10.1016/j.aeue.2026.156222
Debanjan Dhara, Ranajay Paul , Suvarun Dalapati
For a single-phase full-bridge inverter, hybrid PWM switching is more preferable for continuous operation due to its reduced switching losses and lower thermal stress on individual semiconductor switches, without compromising in PWM output. On the other hand, One-Cycle-Control (OCC) is a non-linear control technique which is used in power-electronic converters for achieving very fast response and for compensating the dead-time distortion. This paper presents a novel closed-loop Hybrid PWM based OCC (HPOCC) technique for single-phase full-bridge inverter, generating switching pulses in hybrid PWM mode, thereby reducing switching losses, and also has the control dynamics similar to conventional-OCC. The proposed technique not only uses a single resettable integrator instead of two, as seen in conventional-OCC based single-phase full-bridge inverter, but also delivers improved quality output voltage, as compared to conventional OCC based single-phase full-bridge inverters. All these advantages make this technique a superior alternative to conventional-OCC. Thus, this PWM technique can fulfill the requirement for low switching-loss, fast dynamic performance and low total-harmonic-distortion (THD) in inverter-output. The performance of this technique is validated through mathematical analysis, simulation on a digital platform and experiments on a laboratory set-up, which confirm its superior nature as compared to conventional-OCC and Sine-PWM techniques.
{"title":"An improved closed-loop PWM control technique for single-phase full-bridge voltage source inverter","authors":"Debanjan Dhara, Ranajay Paul , Suvarun Dalapati","doi":"10.1016/j.aeue.2026.156222","DOIUrl":"10.1016/j.aeue.2026.156222","url":null,"abstract":"<div><div>For a single-phase full-bridge inverter, hybrid PWM switching is more preferable for continuous operation due to its reduced switching losses and lower thermal stress on individual semiconductor switches, without compromising in PWM output. On the other hand, One-Cycle-Control (OCC) is a non-linear control technique which is used in power-electronic converters for achieving very fast response and for compensating the dead-time distortion. This paper presents a novel closed-loop Hybrid PWM based OCC (HPOCC) technique for single-phase full-bridge inverter, generating switching pulses in hybrid PWM mode, thereby reducing switching losses, and also has the control dynamics similar to conventional-OCC. The proposed technique not only uses a single resettable integrator instead of two, as seen in conventional-OCC based single-phase full-bridge inverter, but also delivers improved quality output voltage, as compared to conventional OCC based single-phase full-bridge inverters. All these advantages make this technique a superior alternative to conventional-OCC. Thus, this PWM technique can fulfill the requirement for low switching-loss, fast dynamic performance and low total-harmonic-distortion (THD) in inverter-output. The performance of this technique is validated through mathematical analysis, simulation on a digital platform and experiments on a laboratory set-up, which confirm its superior nature as compared to conventional-OCC and Sine-PWM techniques.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156222"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146080291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-01-15DOI: 10.1016/j.aeue.2026.156218
Wan-Hao Xu , Junbing Duan , Lei Zhu , Cheng Liao , You-Feng Cheng , Ting Shi
This article investigates and analyzes the high-gain condition based on a vertically polarized (VP) endfire leaky-wave antenna by periodically loading parallel inductive elements on both sides of the double-sided parallel strip line. A radiation model of the employed leaky-wave antenna is firstly established to explore the effects of period length as well as propagation constants on the radiation gains and efficiencies. To achieve the high gain and efficiency, the structural influences of the antenna are then analyzed to explore the proper loading stub model to meet those requirements for the propagation characteristics. A prototype antenna is in final designed and fabricated to verify its performance in achieving high gain and efficiency radiation. The simulation results are in good agreement with the measured results, demonstrating the effectiveness of the resulted high-gain radiation condition for the VP endfire leaky-wave antenna.
{"title":"Proposal and analysis of high-gain vertically-polarized endfire leaky-wave antenna","authors":"Wan-Hao Xu , Junbing Duan , Lei Zhu , Cheng Liao , You-Feng Cheng , Ting Shi","doi":"10.1016/j.aeue.2026.156218","DOIUrl":"10.1016/j.aeue.2026.156218","url":null,"abstract":"<div><div>This article investigates and analyzes the high-gain condition based on a vertically polarized (VP) endfire leaky-wave antenna by periodically loading parallel inductive elements on both sides of the double-sided parallel strip line. A radiation model of the employed leaky-wave antenna is firstly established to explore the effects of period length as well as propagation constants on the radiation gains and efficiencies. To achieve the high gain and efficiency, the structural influences of the antenna are then analyzed to explore the proper loading stub model to meet those requirements for the propagation characteristics. A prototype antenna is in final designed and fabricated to verify its performance in achieving high gain and efficiency radiation. The simulation results are in good agreement with the measured results, demonstrating the effectiveness of the resulted high-gain radiation condition for the VP endfire leaky-wave antenna.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156218"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145982035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-02-06DOI: 10.1016/j.aeue.2026.156244
Aleksey S. Gvozdarev, Tatiana K. Artemova, Mikhail A. Zuev
This paper presents a rigorous comparative reliability analysis of Amplify-and-Forward (AF) and Decode-and-Forward (DF) relay-assisted wireless communication systems operating under severe fading and shadowing conditions. The study focuses on two advanced channel models capable of describing hyper-Rayleigh regimes: the Lomax fading model and the Fluctuating Nakagami- model. For both assumed channel models, we derive novel closed-form expressions for the reliability loss metric, defined as the difference between outage probabilities of DF and AF relays in two-hop communication scenarios. The hyper-Rayleigh regimes for the adopted models are derived and their boundaries are comprehensively studied. Extensive numerical simulations reveal that the reliability gain achieved by replacing AF with DF relays is highly dependent on average SNR values, threshold SNR, and channel parameters. Results demonstrate that in low average SNR conditions with moderate fading, the DF relay provides substantial and parameter-independent reliability improvements, while in high SNR scenarios with severe fading, the advantage diminishes. The Lomax model exhibits greater sensitivity to parameter variations compared to the Fluctuating Nakagami- model, making it more suitable for detailed reliability forecasting. These findings provide crucial insights for relay deployment strategies in 5G, Beyond 5G, and 6G networks operating in harsh propagation environments, including urban areas, industrial facilities, and vehicular communications.
{"title":"Comparative reliability analysis of AF and DF relay-assisted wireless communications for Lomax and Fluctuating Nakagami-m fading channel models","authors":"Aleksey S. Gvozdarev, Tatiana K. Artemova, Mikhail A. Zuev","doi":"10.1016/j.aeue.2026.156244","DOIUrl":"10.1016/j.aeue.2026.156244","url":null,"abstract":"<div><div>This paper presents a rigorous comparative reliability analysis of Amplify-and-Forward (AF) and Decode-and-Forward (DF) relay-assisted wireless communication systems operating under severe fading and shadowing conditions. The study focuses on two advanced channel models capable of describing hyper-Rayleigh regimes: the Lomax fading model and the Fluctuating Nakagami-<span><math><mi>m</mi></math></span> model. For both assumed channel models, we derive novel closed-form expressions for the reliability loss metric, defined as the difference between outage probabilities of DF and AF relays in two-hop communication scenarios. The hyper-Rayleigh regimes for the adopted models are derived and their boundaries are comprehensively studied. Extensive numerical simulations reveal that the reliability gain achieved by replacing AF with DF relays is highly dependent on average SNR values, threshold SNR, and channel parameters. Results demonstrate that in low average SNR conditions with moderate fading, the DF relay provides substantial and parameter-independent reliability improvements, while in high SNR scenarios with severe fading, the advantage diminishes. The Lomax model exhibits greater sensitivity to parameter variations compared to the Fluctuating Nakagami-<span><math><mi>m</mi></math></span> model, making it more suitable for detailed reliability forecasting. These findings provide crucial insights for relay deployment strategies in 5G, Beyond 5G, and 6G networks operating in harsh propagation environments, including urban areas, industrial facilities, and vehicular communications.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156244"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-02-07DOI: 10.1016/j.aeue.2026.156248
Francisco Aznar , Uxua Esteban-Eraso , Antonio D. Martínez-Pérez , Roque Fernández , Santiago Celma
Traditionally, the RMS phase error has been the standard metric for assessing the quality of phase shifters used in phased-array beamforming antennas. However, this metric fails to isolate the different effects on the radiation pattern. This work proposes three novel metrics to provide a more nuanced analysis of digitally controlled phase shifters. These metrics, denoted as Beam Steering Error, Null Quality Error, and Side-Lobe Level Error, target specific performance characteristics of the radiation pattern. They are defined for any bit resolution, enabling the decomposition of the RMS phase error into three distinct components, each providing valuable insights into the performance of linear phased arrays. The limitations of conventional RMS phase error analysis are demonstrated, and the advantages of these new metrics are validated through a case study involving a 5-bit architecture implemented in a 65-nm CMOS process, as well as other phase shifters reported in the literature.
{"title":"Orthonormal splitting of RMS phase error in digitally controlled phase shifters","authors":"Francisco Aznar , Uxua Esteban-Eraso , Antonio D. Martínez-Pérez , Roque Fernández , Santiago Celma","doi":"10.1016/j.aeue.2026.156248","DOIUrl":"10.1016/j.aeue.2026.156248","url":null,"abstract":"<div><div>Traditionally, the RMS phase error has been the standard metric for assessing the quality of phase shifters used in phased-array beamforming antennas. However, this metric fails to isolate the different effects on the radiation pattern. This work proposes three novel metrics to provide a more nuanced analysis of digitally controlled phase shifters. These metrics, denoted as Beam Steering Error, Null Quality Error, and Side-Lobe Level Error, target specific performance characteristics of the radiation pattern. They are defined for any bit resolution, enabling the decomposition of the RMS phase error into three distinct components, each providing valuable insights into the performance of linear phased arrays. The limitations of conventional RMS phase error analysis are demonstrated, and the advantages of these new metrics are validated through a case study involving a 5-bit architecture implemented in a 65-nm CMOS process, as well as other phase shifters reported in the literature.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"208 ","pages":"Article 156248"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147404514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-03-01Epub Date: 2026-01-16DOI: 10.1016/j.aeue.2026.156216
P. Manikandan
This work proposes a fast transient, dynamically biased cascoded flipped voltage follower low-dropout (LDO) regulator. The proposed LDO is constructed based on a single-stage error amplifier (EA) and a cascoded flipped voltage follower. The proposed error amplifier dynamically biases the CAFVF and enhances the transient and stability performance of the LDO regulator. This work uses three different feed-forward transconductors along with one miller and two feed-forward small compensatory capacitors. Two of these feed-forward transconductors and three small compensation capacitors generate two low-frequency left-half-plane (LHP) zeros in conjunction with the self-feed-forward path. These LHP zeros are unaffected by load conditions and provide consistent phase lead for all the load cases. Another feed-forward transconductor converts the load-dependent right-half-plane (RHP) Miller zero to an LHP zero. The load-dependent LHP zero appears closer to the unity gain frequency (UGF) for a lightly loaded LDO, improving its stability under light load situations. The proposed frequency compensation technique stabilizes the LDO for load currents ranging from 0 to , with a maximum load capacitor of . The proposed LDO is designed using UMC CMOS technology and implemented with the Cadence Virtuoso tool. With a maximum quiescent current of , the proposed LDO achieves a minimum good slew rate (SR) of and minimum unity gain frequency of , allowing it to settle faster with a settling time of . The reliability and robustness of the proposed LDO are verified using the process corners with an extreme temperature range and 200-point Monte Carlo simulations.
{"title":"A fast transient dynamically biased output capacitor-less cascoded flipped voltage follower (CAFVF) LDO regulator","authors":"P. Manikandan","doi":"10.1016/j.aeue.2026.156216","DOIUrl":"10.1016/j.aeue.2026.156216","url":null,"abstract":"<div><div>This work proposes a fast transient, dynamically biased cascoded flipped voltage follower low-dropout (LDO) regulator. The proposed LDO is constructed based on a single-stage error amplifier (EA) and a cascoded flipped voltage follower. The proposed error amplifier dynamically biases the CAFVF and enhances the transient and stability performance of the LDO regulator. This work uses three different feed-forward transconductors along with one miller and two feed-forward small compensatory capacitors. Two of these feed-forward transconductors and three small compensation capacitors generate two low-frequency left-half-plane (LHP) zeros in conjunction with the self-feed-forward path. These LHP zeros are unaffected by load conditions and provide consistent phase lead for all the load cases. Another feed-forward transconductor converts the load-dependent right-half-plane (RHP) Miller zero to an LHP zero. The load-dependent LHP zero appears closer to the unity gain frequency (UGF) for a lightly loaded LDO, improving its stability under light load situations. The proposed frequency compensation technique stabilizes the LDO for load currents ranging from 0 to <span><math><mrow><mn>30</mn><mspace></mspace><mi>mA</mi></mrow></math></span>, with a maximum load capacitor of <span><math><mrow><mn>50</mn><mspace></mspace><mi>pF</mi></mrow></math></span>. The proposed LDO is designed using UMC <span><math><mrow><mn>90</mn><mspace></mspace><mi>nm</mi></mrow></math></span> CMOS technology and implemented with the Cadence Virtuoso tool. With a maximum quiescent current of <span><math><mrow><mn>91</mn><mo>.</mo><mn>3</mn><mspace></mspace><mi>μ</mi><mi>A</mi></mrow></math></span>, the proposed LDO achieves a minimum good slew rate (SR) of <span><math><mrow><mn>30</mn><mspace></mspace><mi>V</mi><mo>/</mo><mi>μ</mi><mi>s</mi></mrow></math></span> and minimum unity gain frequency of <span><math><mrow><mn>15</mn><mo>.</mo><mn>7</mn><mspace></mspace><mi>MHz</mi></mrow></math></span>, allowing it to settle faster with a settling time of <span><math><mrow><mn>30</mn><mspace></mspace><mi>ns</mi></mrow></math></span>. The reliability and robustness of the proposed LDO are verified using the process corners with an extreme temperature range and 200-point Monte Carlo simulations.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156216"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145982036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}