Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221012
Maida Farooq, K. Afridi
This paper presents an improved adaptive feedback control strategy for the inversion stage of the recently proposed high-power-density transformer-less single-phase online uninterruptible power supply (UPS). The proposed inversion stage operates in buck/buck-boost mode depending on the sinusoidal output voltage polarity. This dual-mode operation of the inversion stage under standard feedback control leads to inadequate output voltage regulation, resulting in a significant increase in total harmonic distortion (THD) of the output voltage. While the previously proposed adaptive feedback control strategy offers some improvement in output voltage total harmonic distortion (THD) compared to standard feedback control, the reduction achieved is limited. This limitation renders the THD reduction inadequate and unsuitable for practical applications. To achieve substantially better output voltage regulation and hence lower the output voltage THD, an improved adaptive feedback control strategy is proposed. To facilitate the design of the associated controllers and enable a performance comparison, analytical models that capture the dynamics of the inversion stage with both adaptive feedback and improved adaptive feedback control strategies are provided. A GaN-based 1-kW prototype high-power-density online UPS is designed, built, and tested to validate the effectiveness of the adaptive feedback and the proposed improved adaptive feedback control strategies. The improved adaptive feedback control strategy results in a 50% reduction in the output voltage THD compared to the previously proposed adaptive feedback control strategy across a wide output power range.
{"title":"Improved Adaptive Feedback Control for a High-Power-Density Transformer-Less Online UPS","authors":"Maida Farooq, K. Afridi","doi":"10.1109/COMPEL52896.2023.10221012","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221012","url":null,"abstract":"This paper presents an improved adaptive feedback control strategy for the inversion stage of the recently proposed high-power-density transformer-less single-phase online uninterruptible power supply (UPS). The proposed inversion stage operates in buck/buck-boost mode depending on the sinusoidal output voltage polarity. This dual-mode operation of the inversion stage under standard feedback control leads to inadequate output voltage regulation, resulting in a significant increase in total harmonic distortion (THD) of the output voltage. While the previously proposed adaptive feedback control strategy offers some improvement in output voltage total harmonic distortion (THD) compared to standard feedback control, the reduction achieved is limited. This limitation renders the THD reduction inadequate and unsuitable for practical applications. To achieve substantially better output voltage regulation and hence lower the output voltage THD, an improved adaptive feedback control strategy is proposed. To facilitate the design of the associated controllers and enable a performance comparison, analytical models that capture the dynamics of the inversion stage with both adaptive feedback and improved adaptive feedback control strategies are provided. A GaN-based 1-kW prototype high-power-density online UPS is designed, built, and tested to validate the effectiveness of the adaptive feedback and the proposed improved adaptive feedback control strategies. The improved adaptive feedback control strategy results in a 50% reduction in the output voltage THD compared to the previously proposed adaptive feedback control strategy across a wide output power range.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"4 1","pages":"1-6"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73630402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221057
Qi Zhu
The conventional trench termination for the 4HSiC sidewall-implanted Super Junction device has relatively low avalanche capability and the devices can fail destructively under abnormal operating conditions. In this paper, a novel high-k dielectric assisted trench termination is proposed. The high-k dielectric TiO2 is incorporated into the SiO2-filled trench. TCAD simulations are conducted to validate the efficacy of the proposed termination. The results show that with the proposed termination, the peak electric field is pushed to the edge of the TiO2 region, preventing breakdown at the corners of the active region edge; at the same time, the leakage current flows uniformly from the active region, thus improving the avalanche current; in addition, the addition of TiO2 to the terminator does not reduce the breakdown voltage. Moreover, the dimensions of the TiO2 are optimized in terms of the maximum current density. By taking the dielectric strength into consideration, the optimum depth and length of the TiO2 region are found to be 0.6μm and 2μm, respectively.
{"title":"High-k Dielectric Assisted Trench Termination of the 4H-SiC Super Junction Device for Improved Avalanche Capability","authors":"Qi Zhu","doi":"10.1109/COMPEL52896.2023.10221057","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221057","url":null,"abstract":"The conventional trench termination for the 4HSiC sidewall-implanted Super Junction device has relatively low avalanche capability and the devices can fail destructively under abnormal operating conditions. In this paper, a novel high-k dielectric assisted trench termination is proposed. The high-k dielectric TiO2 is incorporated into the SiO2-filled trench. TCAD simulations are conducted to validate the efficacy of the proposed termination. The results show that with the proposed termination, the peak electric field is pushed to the edge of the TiO2 region, preventing breakdown at the corners of the active region edge; at the same time, the leakage current flows uniformly from the active region, thus improving the avalanche current; in addition, the addition of TiO2 to the terminator does not reduce the breakdown voltage. Moreover, the dimensions of the TiO2 are optimized in terms of the maximum current density. By taking the dielectric strength into consideration, the optimum depth and length of the TiO2 region are found to be 0.6μm and 2μm, respectively.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"38 1","pages":"1-6"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76874029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221181
Arthur Mendes, David Nam, Xiang Lin, J. Stewart, B. Fan, D. Dong, R. Burgos
The operation and failure modes of the flying capacitor multilevel converter topology are well-known and the protections for Si IGBT-based converters are well established. However, when it comes to high voltage SiC MOSFET-based converters there are some particularities that must be evaluated: shorter energy withstanding time, higher dv/dt and higher insulation stress. This paper provides an assessment of the failure modes for a 7-level 13.8 kV AC 22 kV DC 1.1 MVA three-phase flying capacitor converter using 10 kVSiC MOSFETs, an analysis of the fault propagation mechanism between cells and the design of a transient voltage suppressor (TVS) diode-based protection module to prevent it.
飞电容多电平变换器的工作模式和失效模式是众所周知的,基于硅igbt的变换器的保护措施已经建立。然而,当涉及到高压SiC mosfet转换器时,必须评估一些特殊性:更短的能量承受时间,更高的dv/dt和更高的绝缘应力。本文对采用10 kVSiC mosfet的7级13.8 kV AC 22 kV DC 1.1 MVA三相飞容变换器的故障模式进行了评估,分析了单元间故障传播机制,并设计了基于瞬态电压抑制器(TVS)二极管的保护模块以防止故障传播。
{"title":"Protection Circuitry Design to Mitigate Failure Propagation for 10 kV SiC MOSFETs in a 22 kV DC 13.8 kV AC Flying Capacitor Multilevel Converter","authors":"Arthur Mendes, David Nam, Xiang Lin, J. Stewart, B. Fan, D. Dong, R. Burgos","doi":"10.1109/COMPEL52896.2023.10221181","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221181","url":null,"abstract":"The operation and failure modes of the flying capacitor multilevel converter topology are well-known and the protections for Si IGBT-based converters are well established. However, when it comes to high voltage SiC MOSFET-based converters there are some particularities that must be evaluated: shorter energy withstanding time, higher dv/dt and higher insulation stress. This paper provides an assessment of the failure modes for a 7-level 13.8 kV AC 22 kV DC 1.1 MVA three-phase flying capacitor converter using 10 kVSiC MOSFETs, an analysis of the fault propagation mechanism between cells and the design of a transient voltage suppressor (TVS) diode-based protection module to prevent it.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"46 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86145572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221036
Daniel Beniaminson, Bar Halivni, M. Evzelman, A. Kuperman, M. Peretz
This paper introduces a digitally controlled multiphase multistage hybrid boost converter (MMHBC) for high voltage capacitor charging applications. Rapid capacitor charging control approach is presented, and topological variations to improve efficiency are examined. The controller provides tight output current regulation, while maintaining real-time current balancing capabilities for superior thermal distribution and converter efficiency. The MMHBC is capable of rapid capacitor bank charging to high voltage by forcing maximum output current at the first stage, which translates into maximal output power during the whole charging period. The controller includes a system governor unit which facilitates additional control aspects for multiphase operation such as phase shedding, soft-start mechanism, and system protection. SMPS operation, rapid capacitor charging, and topological improvements are validated experimentally on a four-phase 12V-to-300V multiphase prototype with a maximum output power of 250W and power density of 2.5kW/Liter.
{"title":"Digital Control and Phase Governing of Interleaved Multistage Hybrid Boost Capacitor Charger for Improved Efficiency and Power Density","authors":"Daniel Beniaminson, Bar Halivni, M. Evzelman, A. Kuperman, M. Peretz","doi":"10.1109/COMPEL52896.2023.10221036","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221036","url":null,"abstract":"This paper introduces a digitally controlled multiphase multistage hybrid boost converter (MMHBC) for high voltage capacitor charging applications. Rapid capacitor charging control approach is presented, and topological variations to improve efficiency are examined. The controller provides tight output current regulation, while maintaining real-time current balancing capabilities for superior thermal distribution and converter efficiency. The MMHBC is capable of rapid capacitor bank charging to high voltage by forcing maximum output current at the first stage, which translates into maximal output power during the whole charging period. The controller includes a system governor unit which facilitates additional control aspects for multiphase operation such as phase shedding, soft-start mechanism, and system protection. SMPS operation, rapid capacitor charging, and topological improvements are validated experimentally on a four-phase 12V-to-300V multiphase prototype with a maximum output power of 250W and power density of 2.5kW/Liter.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"163 1","pages":"1-5"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86284129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221099
Kishan Srinivasan, H. Hofmann, Jing Sun, A. Avestruz
This paper presents a robust simulation technique for power electronic circuits that accurately captures device losses. The temperature dependent i-v characteristics of the power electronic devices are used to develop a scalar nonlinear equation for a power-pole configuration. The power pole model can be readily extended to majority of circuit topologies. Furthermore, a switching loss model is presented that adjusts the voltage and current waveforms of the power pole due to switching at each switching instant. Integrating the switching loss model makes the proposed approach comprehensive in loss estimation. Simulation and experimental results are presented confirming the validity of the above approach. Results regarding computation time are also provided.
{"title":"Robust Power Electronic Circuit Models with Accurate Loss Estimation","authors":"Kishan Srinivasan, H. Hofmann, Jing Sun, A. Avestruz","doi":"10.1109/COMPEL52896.2023.10221099","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221099","url":null,"abstract":"This paper presents a robust simulation technique for power electronic circuits that accurately captures device losses. The temperature dependent i-v characteristics of the power electronic devices are used to develop a scalar nonlinear equation for a power-pole configuration. The power pole model can be readily extended to majority of circuit topologies. Furthermore, a switching loss model is presented that adjusts the voltage and current waveforms of the power pole due to switching at each switching instant. Integrating the switching loss model makes the proposed approach comprehensive in loss estimation. Simulation and experimental results are presented confirming the validity of the above approach. Results regarding computation time are also provided.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"34 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75629951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10220975
Shubham Narula, L. Corradini, D. Maksimović
Non-inverting buck-boost (NIBB) converters used as dc-dc optimizers in photovoltaic (PV) applications are required to operate over a very wide range of conversion ratios and power levels. Conventional control approaches typically include complex mode switching and compensators designed for different modes of operation, which often lead to disturbances and even potential instabilities across mode transitions. This paper proposes a unified sliding mode control approach in order to achieve smooth mode transitions, while at the same time ensuring excellent dynamic performance over a wide operating range. The proposed approach is verified in simulation as well as experimentally on a 20V-to-60V input, 40V output NIBB case study.
{"title":"Unified Sliding-Mode Control of Non-Inverting Buck-Boost Converters","authors":"Shubham Narula, L. Corradini, D. Maksimović","doi":"10.1109/COMPEL52896.2023.10220975","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10220975","url":null,"abstract":"Non-inverting buck-boost (NIBB) converters used as dc-dc optimizers in photovoltaic (PV) applications are required to operate over a very wide range of conversion ratios and power levels. Conventional control approaches typically include complex mode switching and compensators designed for different modes of operation, which often lead to disturbances and even potential instabilities across mode transitions. This paper proposes a unified sliding mode control approach in order to achieve smooth mode transitions, while at the same time ensuring excellent dynamic performance over a wide operating range. The proposed approach is verified in simulation as well as experimentally on a 20V-to-60V input, 40V output NIBB case study.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"1 1","pages":"1-7"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82337241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221189
Dheeraj Etta, Sounak Maji, Yuetao Hou, K. Afridi
This paper introduces a stacked inverter architecture for high-frequency capacitive wireless power transfer (WPT) systems suitable for electric vehicle (EV) charging. The proposed architecture combines the output voltages of two or more high-frequency inverters using parallel-in series-out air-core transformers, thereby increasing the power transfer capability of a capacitive WPT system. A comprehensive methodology to design a stacked inverter-based capacitive WPT system by leveraging magnetizing and leakage inductances of the air-core transformers is presented. Furthermore, performance of the stacked inverter-based capacitive WPT system is analyzed in the presence of mismatches between stacked inverters. A 6.78-MHz 12-cm air-gap prototype capacitive WPT system using three full bridge stacked inverters is designed, built and tested. This system achieves record performance for a capacitive EV charging system, transferring 5.48-kW at a peak efficiency of 89%, corresponding to a power transfer density of 72.08 kW/m2.
{"title":"Stacked Inverter Architecture for High-Frequency Capacitive Wireless Power Transfer Systems","authors":"Dheeraj Etta, Sounak Maji, Yuetao Hou, K. Afridi","doi":"10.1109/COMPEL52896.2023.10221189","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221189","url":null,"abstract":"This paper introduces a stacked inverter architecture for high-frequency capacitive wireless power transfer (WPT) systems suitable for electric vehicle (EV) charging. The proposed architecture combines the output voltages of two or more high-frequency inverters using parallel-in series-out air-core transformers, thereby increasing the power transfer capability of a capacitive WPT system. A comprehensive methodology to design a stacked inverter-based capacitive WPT system by leveraging magnetizing and leakage inductances of the air-core transformers is presented. Furthermore, performance of the stacked inverter-based capacitive WPT system is analyzed in the presence of mismatches between stacked inverters. A 6.78-MHz 12-cm air-gap prototype capacitive WPT system using three full bridge stacked inverters is designed, built and tested. This system achieves record performance for a capacitive EV charging system, transferring 5.48-kW at a peak efficiency of 89%, corresponding to a power transfer density of 72.08 kW/m2.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"12 1","pages":"1-6"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89525144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10220982
Zikang Tong, J. Rivas-Davila
This paper presents the design and implementation of a 13.56 MHz push-pull Class E power amplifier with broad-band capabilities. The Class E amplifier utilizes SiC MOSFETs with a custom current-source resonant gate driver. Because the amplifier is a push-pull structure, we design and implement a balun that converts the differential output into a ground-referenced output. This work experimentally demonstrates the proposed amplifier delivering over 1 kW power to a 50 $Omega$ load impedance.
{"title":"Wideband Push-Pull Class E Amplifier for RF Power Delivery","authors":"Zikang Tong, J. Rivas-Davila","doi":"10.1109/COMPEL52896.2023.10220982","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10220982","url":null,"abstract":"This paper presents the design and implementation of a 13.56 MHz push-pull Class E power amplifier with broad-band capabilities. The Class E amplifier utilizes SiC MOSFETs with a custom current-source resonant gate driver. Because the amplifier is a push-pull structure, we design and implement a balun that converts the differential output into a ground-referenced output. This work experimentally demonstrates the proposed amplifier delivering over 1 kW power to a 50 $Omega$ load impedance.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"44 1","pages":"1-7"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76450371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In addition to increasing the output current, an interleaved buck converter can significantly reduce the current ripple at the output. However, the bottleneck of the interleaved buck converter application is the unbalanced inductor current. In order to achieve the current balance in the entire section of the duty cycle, this paper proposes a control architecture with interleaved alignment, using the adjustment of the duty cycle and phase offset, to analyze and realize a high output current and current balanced in three-arm series capacitor interleaved buck converters (SCIBCs) in this work. By analyzing and modeling the SCIBC and using a single-loop control architecture that feedbacks the output voltage, the proposed current-balancing method balances all inductors’ current within the full duty cycle without any current sensor. In addition, the small-signal transfer function of the control signal to the output voltage and design of the controller parameters are derived according to the specification, and the SCIBC with the proposed current-balancing control with PI controller of the alignment of interleaved phase angle is constructed. The high output current and current-balancing characteristics of the proposed circuit control architecture are validated in the simulation tool SIMPLIS.
{"title":"A Generalized Current Balancing Control for Series-Capacitor Buck Converter with Interleaved Phase Angle","authors":"Chung-Yi Li, Chin-Fu Nien, Li-An Lin, Hung-Chi Chen","doi":"10.1109/COMPEL52896.2023.10221016","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221016","url":null,"abstract":"In addition to increasing the output current, an interleaved buck converter can significantly reduce the current ripple at the output. However, the bottleneck of the interleaved buck converter application is the unbalanced inductor current. In order to achieve the current balance in the entire section of the duty cycle, this paper proposes a control architecture with interleaved alignment, using the adjustment of the duty cycle and phase offset, to analyze and realize a high output current and current balanced in three-arm series capacitor interleaved buck converters (SCIBCs) in this work. By analyzing and modeling the SCIBC and using a single-loop control architecture that feedbacks the output voltage, the proposed current-balancing method balances all inductors’ current within the full duty cycle without any current sensor. In addition, the small-signal transfer function of the control signal to the output voltage and design of the controller parameters are derived according to the specification, and the SCIBC with the proposed current-balancing control with PI controller of the alignment of interleaved phase angle is constructed. The high output current and current-balancing characteristics of the proposed circuit control architecture are validated in the simulation tool SIMPLIS.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"1 1","pages":"1-5"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83514718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper proposed a piecewise analytical transient (PAT) model of SiC MOSFET and SiC Schottky diode pair that can simulate the switching transient in a complex power electronics system with a large number of power switches. The proposed model eliminates the stiffness caused by the parasitic parameters and has a fast simulation speed. The nonlinearity of the junction capacitances is considered. Double pulse tests are conducted to verify the accuracy of the model.
{"title":"Piecewise Analytical Transient Model of SiC MOSFET and SiC Schottky Diode Pair","authors":"Yikang Xiao, Zhengming Zhao, Bochen Shi, Zhujun Yu, Shengyu Jia, Shiqi Ji","doi":"10.1109/COMPEL52896.2023.10221131","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221131","url":null,"abstract":"This paper proposed a piecewise analytical transient (PAT) model of SiC MOSFET and SiC Schottky diode pair that can simulate the switching transient in a complex power electronics system with a large number of power switches. The proposed model eliminates the stiffness caused by the parasitic parameters and has a fast simulation speed. The nonlinearity of the junction capacitances is considered. Double pulse tests are conducted to verify the accuracy of the model.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"1 1","pages":"1-6"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89408954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}