Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221002
Kamlesh Sawant, Jungwon Choi
This paper presents discrete frequency and phase-shift control for a bidirectional class-E2 converter, enabling a wide range of output power in energy storage applications. Class-E² converters typically operate within a narrow power range to achieve zero voltage switching (ZVS) across the switching devices and ensure high efficiency. To address this limitation, we propose an adaptive frequency control algorithm that utilizes multiple frequency steps to reduce output ripple and minimize output capacitor requirements. Our adaptive frequency control algorithm ensures high efficiency across a wide output power range by using 16 discrete switching frequency steps ranging from 800 kHz to 1.6 MHz. Duty ratios are pre-computed and stored in a lookup table to provide ZVS at each frequency. We also apply a variable phase shift between the switching devices to maintain ZVS and control the power flow direction. By directly selecting and applying the appropriate frequency from the lookup table instead of sequential searching, our proposed algorithm enables faster dynamic response with minimal undershoot and overshoot. Through simulation and implementation of closed-loop control of the bidirectional class-E2 converter prototype using an MCU, we achieved bidirectional output power level variation from 13 W to 350 W with a maximum efficiency of 93.5%.
{"title":"Closed-Loop Adaptive Frequency and Phase-Shift Control of Bidirectional Class-E² Converter for Energy Storage Applications","authors":"Kamlesh Sawant, Jungwon Choi","doi":"10.1109/COMPEL52896.2023.10221002","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221002","url":null,"abstract":"This paper presents discrete frequency and phase-shift control for a bidirectional class-E2 converter, enabling a wide range of output power in energy storage applications. Class-E² converters typically operate within a narrow power range to achieve zero voltage switching (ZVS) across the switching devices and ensure high efficiency. To address this limitation, we propose an adaptive frequency control algorithm that utilizes multiple frequency steps to reduce output ripple and minimize output capacitor requirements. Our adaptive frequency control algorithm ensures high efficiency across a wide output power range by using 16 discrete switching frequency steps ranging from 800 kHz to 1.6 MHz. Duty ratios are pre-computed and stored in a lookup table to provide ZVS at each frequency. We also apply a variable phase shift between the switching devices to maintain ZVS and control the power flow direction. By directly selecting and applying the appropriate frequency from the lookup table instead of sequential searching, our proposed algorithm enables faster dynamic response with minimal undershoot and overshoot. Through simulation and implementation of closed-loop control of the bidirectional class-E2 converter prototype using an MCU, we achieved bidirectional output power level variation from 13 W to 350 W with a maximum efficiency of 93.5%.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"2 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89660836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221009
Roderick S. Bayliss, Nathan C. Brooks, R. Pilawa-Podgurski
Single-stage Power Factor Correction (PFC) ac-dc rectifiers open a pathway to achieve high power density and efficiency in grid-connected rectifier applications where the target dc voltage is lower than the peak ac voltage (e.g. data center power delivery, LED drivers). Typically in data center and similar applications, a two-stage solution employing a step-up ac-dc stage followed by a step-down dc-dc stage is employed to achieve grid to 48 V conversion. This approach suffers from the efficiency penalty of a cascade of power converters and typically lower power density due to the design of two separate power conversion stages. A single-stage, buck-type PFC rectifier where the output dc voltage is lower than the peak ac voltage circumvents these issues. This work analyzes and develops a single-stage buck-type PFC rectifier utilizing a six-level flying capacitor multilevel (FCML) converter with active flying capacitor voltage balancing and current control to achieve high power density rectification in a single-stage solution. This work is the first to achieve active balancing of capacitors combined with PFC operation in a step-down FCML rectifier.
{"title":"A Combined Power Factor Correcting and Active Voltage Balancing Control Technique for Buck-Type AC/DC Grid-Tied Flying Capacitor Multilevel Converters","authors":"Roderick S. Bayliss, Nathan C. Brooks, R. Pilawa-Podgurski","doi":"10.1109/COMPEL52896.2023.10221009","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221009","url":null,"abstract":"Single-stage Power Factor Correction (PFC) ac-dc rectifiers open a pathway to achieve high power density and efficiency in grid-connected rectifier applications where the target dc voltage is lower than the peak ac voltage (e.g. data center power delivery, LED drivers). Typically in data center and similar applications, a two-stage solution employing a step-up ac-dc stage followed by a step-down dc-dc stage is employed to achieve grid to 48 V conversion. This approach suffers from the efficiency penalty of a cascade of power converters and typically lower power density due to the design of two separate power conversion stages. A single-stage, buck-type PFC rectifier where the output dc voltage is lower than the peak ac voltage circumvents these issues. This work analyzes and develops a single-stage buck-type PFC rectifier utilizing a six-level flying capacitor multilevel (FCML) converter with active flying capacitor voltage balancing and current control to achieve high power density rectification in a single-stage solution. This work is the first to achieve active balancing of capacitors combined with PFC operation in a step-down FCML rectifier.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"36 1","pages":"1-5"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85860886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221075
Audrey Cheshire, Aarranon Bharathan, D. Maksimović
This paper presents a four-level flying capacitor multi-level (FCML) converter operating as a drain supply modulator (DSM) for radio frequency power amplifiers (RFPAs). The proposed FCML-based DSM excludes the standard output LC filter and employs a direct multi-level DSM approach, changing the output according to an external RFPA drain-supply level demand. A simple state-machine-based controller ensures that the flying capacitor voltages remain balanced for arbitrary sequences of requested output voltage levels. The functionality of the state-machine controlled converter is verified with a GaN-based DSM prototype with output voltage levels of 0V, 6.67V, 13.33 V, and 20 V generated from an input dc voltage of 20 V, and with the state-machine controller sampling period of 5$mu$s. Experimental results show the converter is able to maintain capacitor charge balance across the flying capacitors while outputting the requested RFPA level demand. The maximum output current of the converter is 0.8 A, while efficiencies measured at each output level range between 99.0-99.8%.
{"title":"Flying Capacitor Four-Level Supply Modulator with Active Balancing for RF Power Amplifier Applications","authors":"Audrey Cheshire, Aarranon Bharathan, D. Maksimović","doi":"10.1109/COMPEL52896.2023.10221075","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221075","url":null,"abstract":"This paper presents a four-level flying capacitor multi-level (FCML) converter operating as a drain supply modulator (DSM) for radio frequency power amplifiers (RFPAs). The proposed FCML-based DSM excludes the standard output LC filter and employs a direct multi-level DSM approach, changing the output according to an external RFPA drain-supply level demand. A simple state-machine-based controller ensures that the flying capacitor voltages remain balanced for arbitrary sequences of requested output voltage levels. The functionality of the state-machine controlled converter is verified with a GaN-based DSM prototype with output voltage levels of 0V, 6.67V, 13.33 V, and 20 V generated from an input dc voltage of 20 V, and with the state-machine controller sampling period of 5$mu$s. Experimental results show the converter is able to maintain capacitor charge balance across the flying capacitors while outputting the requested RFPA level demand. The maximum output current of the converter is 0.8 A, while efficiencies measured at each output level range between 99.0-99.8%.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"3 1","pages":"1-7"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82511372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221065
Udit Pratap Singh Tanwar, Chandan Suthar, P. Kyaw, Inder Kumar Vedula, D. Maksimović
The paper presents the design of a resonant gate drive (RGD), which can be employed in various high-frequency power converters where active bridges operate at ~50% duty cycle. The RGD design is based on an LCLC resonant tank and a small gate-drive isolation transformer. The proposed RGD is simple to implement, does not require auxiliary supplies or high-side gate drivers, has low losses, and provides isolation and intrinsic dead time. A hardware prototype is set up to validate the functionality of RGD on a GaN-based full-bridge inverter, which drives a 500W, 6.78 MHz wireless power transfer (WPT) system. The complete system is tested up to a DC input voltage of 300V with a resistive load. The experimental results show that the dead time generated by the resonant gate driver is sufficient to achieve the ZVS of the power-stage inverter GaN-FETs at all operating points. It is also shown how the RGD reduces gate drive losses almost three times compared to the conventional gate driver.
{"title":"Resonant Gate Drive for High Frequency Active-Bridge Power Converters","authors":"Udit Pratap Singh Tanwar, Chandan Suthar, P. Kyaw, Inder Kumar Vedula, D. Maksimović","doi":"10.1109/COMPEL52896.2023.10221065","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221065","url":null,"abstract":"The paper presents the design of a resonant gate drive (RGD), which can be employed in various high-frequency power converters where active bridges operate at ~50% duty cycle. The RGD design is based on an LCLC resonant tank and a small gate-drive isolation transformer. The proposed RGD is simple to implement, does not require auxiliary supplies or high-side gate drivers, has low losses, and provides isolation and intrinsic dead time. A hardware prototype is set up to validate the functionality of RGD on a GaN-based full-bridge inverter, which drives a 500W, 6.78 MHz wireless power transfer (WPT) system. The complete system is tested up to a DC input voltage of 300V with a resistive load. The experimental results show that the dead time generated by the resonant gate driver is sufficient to achieve the ZVS of the power-stage inverter GaN-FETs at all operating points. It is also shown how the RGD reduces gate drive losses almost three times compared to the conventional gate driver.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"8 1","pages":"1-6"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81946415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10220991
T. Kato, Kaoru Inoue, Kosei Watanabe, Daiki Yamashita, Ko Oue
This paper proposes a stability analysis method for a grid-forming inverter with a droop control in the stationary domain. The control method is based on the complex vector theory which can utilize a simple SISO optimal controller design, and the stability analysis is based on the impedance method. First, a system operating point is determined and linearized around the point to calculate the output impedance of the inverter. Then output responses of the inverter are analyzed for a small-signal excitation in the frequency domain. The feedback control is processed only in the stationary domain. However, the complex conjugate operation in the droop control is found to transform variables equivalently into the synchronous domain. The frequency analysis method in the stationary/synchronous mixed domain is proposed and described.
{"title":"Stability Analysis of a Grid-Forming Inverter by Complex Vector Theory","authors":"T. Kato, Kaoru Inoue, Kosei Watanabe, Daiki Yamashita, Ko Oue","doi":"10.1109/COMPEL52896.2023.10220991","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10220991","url":null,"abstract":"This paper proposes a stability analysis method for a grid-forming inverter with a droop control in the stationary domain. The control method is based on the complex vector theory which can utilize a simple SISO optimal controller design, and the stability analysis is based on the impedance method. First, a system operating point is determined and linearized around the point to calculate the output impedance of the inverter. Then output responses of the inverter are analyzed for a small-signal excitation in the frequency domain. The feedback control is processed only in the stationary domain. However, the complex conjugate operation in the droop control is found to transform variables equivalently into the synchronous domain. The frequency analysis method in the stationary/synchronous mixed domain is proposed and described.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"15 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84093887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221067
X. Ren, Jinfeng Zhang, Yunlei Jiang, Xinru Li, T. Long
This paper presents the design and testing of an LLC DC transformer (DCX) capable of directly converting power from a regulated 48 V DC bus to the point of loads (PoLs). By using series connected transformer windings and parallel connected rectifiers, the proposed LLC DCX has achieved high voltage conversion ratio (48:1) and high output current (>300A) within a 58 by 15 by 5.6 mm volume. The design of the high-frequency transformer is introduced and a 48-to-IV DCX prototype with 300A output current is constructed, exhibiting a peak efficiency of 93.7% and a full load efficiency of 89.0%.
{"title":"A 48-to-1V LLC DC Transformer","authors":"X. Ren, Jinfeng Zhang, Yunlei Jiang, Xinru Li, T. Long","doi":"10.1109/COMPEL52896.2023.10221067","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221067","url":null,"abstract":"This paper presents the design and testing of an LLC DC transformer (DCX) capable of directly converting power from a regulated 48 V DC bus to the point of loads (PoLs). By using series connected transformer windings and parallel connected rectifiers, the proposed LLC DCX has achieved high voltage conversion ratio (48:1) and high output current (>300A) within a 58 by 15 by 5.6 mm volume. The design of the high-frequency transformer is introduced and a 48-to-IV DCX prototype with 300A output current is constructed, exhibiting a peak efficiency of 93.7% and a full load efficiency of 89.0%.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"71 1","pages":"1-5"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87968614","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221116
Ali Najmabadi, Kishan Srinivasan, P. Seiler, H. Hofmann
Accurate flux estimation is important for high-performance control of the Permanent Magnet Synchronous Machines (PMSMs). Parameter uncertainty reduces this accuracy and degrades the controller’s performance. This paper presents a vector control of PMSMs which utilizes a combination of the flux estimation based on current and voltage models of PMSMs via a weighting factor to ensure the best performance at all speeds for excitation at dominant frequencies. The weighting factor can be chosen so that the controller can effectively act as a flux regulator or a current regulator. Furthermore, this paper introduces a framework to formulate the system dynamics suitable for robust analysis and determine the Worst Case Gain (WCG) of the reference tracking transfer function of the closed loop system. The weighting factor is optimized in order to minimize the WCG in presence of parameter uncertainty for inductances and resistance. Using this analysis, the proposed regulator can benefit from the optimal blending of the two flux estimation methods and is robust to parameter uncertainty compared to conventional current and flux regulators.
{"title":"A Robust Vector Control of Permanent Magnet Synchronous Machines Resilient to Parameter Uncertainty","authors":"Ali Najmabadi, Kishan Srinivasan, P. Seiler, H. Hofmann","doi":"10.1109/COMPEL52896.2023.10221116","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221116","url":null,"abstract":"Accurate flux estimation is important for high-performance control of the Permanent Magnet Synchronous Machines (PMSMs). Parameter uncertainty reduces this accuracy and degrades the controller’s performance. This paper presents a vector control of PMSMs which utilizes a combination of the flux estimation based on current and voltage models of PMSMs via a weighting factor to ensure the best performance at all speeds for excitation at dominant frequencies. The weighting factor can be chosen so that the controller can effectively act as a flux regulator or a current regulator. Furthermore, this paper introduces a framework to formulate the system dynamics suitable for robust analysis and determine the Worst Case Gain (WCG) of the reference tracking transfer function of the closed loop system. The weighting factor is optimized in order to minimize the WCG in presence of parameter uncertainty for inductances and resistance. Using this analysis, the proposed regulator can benefit from the optimal blending of the two flux estimation methods and is robust to parameter uncertainty compared to conventional current and flux regulators.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"26 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88601159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221159
Zerui Dong, Wei Li
Voltage source converter (VSC) based high voltage DC (HVDC) systems are an effective way to connect offshore wind farms to power grids. To better resolve the issues caused by excess wind power during a grid fault, a modular DC chopper, containing hundreds of submodules, has been proposed to absorb the excess power in the VSC-HVDC system. The real-time HIL test bench is an efficient way to validate the DC chopper and its controllers. However, conventional electromagnetic transient (EMT) simulation tools have difficulties modeling the choppers of hundreds of submodules for real-time simulation. In this paper, a high-fidelity real-time model of the modular DC chopper is developed and implemented in FPGA and tested by using a real-time simulator. The modular chopper model is implemented in the field programmable gate array (FPGA) with sub-microsecond time resolution, and its small form-factor pluggable (SFP) IOs allow connection to external controllers through optical fibers and exchanging hundreds of signals in a few microseconds. The model is developed with flexibility allowing easy model scale expansion and capability of controller hardware-in-the-loop (C-HIL) testing. The DC chopper model is validated in real-time simulation along with an HVDC system and the real-time HIL test results are provided.
{"title":"FPGA-based Modular DC Chopper Model for Real-time Simulation & HIL Tests","authors":"Zerui Dong, Wei Li","doi":"10.1109/COMPEL52896.2023.10221159","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221159","url":null,"abstract":"Voltage source converter (VSC) based high voltage DC (HVDC) systems are an effective way to connect offshore wind farms to power grids. To better resolve the issues caused by excess wind power during a grid fault, a modular DC chopper, containing hundreds of submodules, has been proposed to absorb the excess power in the VSC-HVDC system. The real-time HIL test bench is an efficient way to validate the DC chopper and its controllers. However, conventional electromagnetic transient (EMT) simulation tools have difficulties modeling the choppers of hundreds of submodules for real-time simulation. In this paper, a high-fidelity real-time model of the modular DC chopper is developed and implemented in FPGA and tested by using a real-time simulator. The modular chopper model is implemented in the field programmable gate array (FPGA) with sub-microsecond time resolution, and its small form-factor pluggable (SFP) IOs allow connection to external controllers through optical fibers and exchanging hundreds of signals in a few microseconds. The model is developed with flexibility allowing easy model scale expansion and capability of controller hardware-in-the-loop (C-HIL) testing. The DC chopper model is validated in real-time simulation along with an HVDC system and the real-time HIL test results are provided.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"1 1","pages":"1-7"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79797988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10221045
Arka Basu, Kody Froehle, D. Costinett
This article presents the weight optimization of a receiver for wireless drone charging applications. There is need for comprehensive modeling to minimize the onboard weight on the flying drone platform. A systematic approach that codesigns all stages of the wireless charger, based on comprehensive loss, weight, and thermal modeling, is put forward to minimize the onboard weight for drone wireless charging applications. A 200 W, GaN-based prototype is implemented to validate the modeling. The prototype has been tested up to 204 W without any active cooling. The receiver achieves a gravimetric power density of 8.3 W/g excluding the weight of connectors, sensing, and control. Index Terms-Wireless power transfer (WPT), power density, synchronous rectifier.
{"title":"Design and Optimization of a High Gravimetric Power Density Receiver for Wireless Charging of Drones","authors":"Arka Basu, Kody Froehle, D. Costinett","doi":"10.1109/COMPEL52896.2023.10221045","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10221045","url":null,"abstract":"This article presents the weight optimization of a receiver for wireless drone charging applications. There is need for comprehensive modeling to minimize the onboard weight on the flying drone platform. A systematic approach that codesigns all stages of the wireless charger, based on comprehensive loss, weight, and thermal modeling, is put forward to minimize the onboard weight for drone wireless charging applications. A 200 W, GaN-based prototype is implemented to validate the modeling. The prototype has been tested up to 204 W without any active cooling. The receiver achieves a gravimetric power density of 8.3 W/g excluding the weight of connectors, sensing, and control. Index Terms-Wireless power transfer (WPT), power density, synchronous rectifier.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"139 1","pages":"1-8"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79971441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-06-25DOI: 10.1109/COMPEL52896.2023.10220974
M. Solomentsev, Alex J. Hanson
On-vehicle integration of photovoltaics can extend the range of electric vehicles by a useful amount each day. However, partial shading can significantly limit PV power production even in stationary installations, and this is expected to be more severe in vehicles. Differential power processing (DPP) approaches can maximize PV output power despite partial shading. This work presents a PV-to-isolated-bus DPP architecture specifically for electric vehicle integration and a converter module that is designed to be extensible and inexpensive. The proposed architecture uses the vehicle’s existing low voltage battery as the common bus for the DPP modules and reuses the existing onboard charger to interface the solar string to the high-voltage battery. The proposed converter module achieves maximum power point tracking (MPPT) for the cell(s) it is connected to without requiring any communication or power transfer across the isolation barrier while allowing bidirectional power with synchronous rectification. The proposed architecture offers an inexpensive solution with high system efficiency and simple control that scales easily to large numbers of DPP units. The paper will include modeling of the advantages of the architecture, experimental characterization of the proposed DPP module, and experimental demonstration in a multi-cell, multi-DPP system.
{"title":"Highly-Scalable Differential Power Processing Architecture for On-Vehicle Photovoltaics","authors":"M. Solomentsev, Alex J. Hanson","doi":"10.1109/COMPEL52896.2023.10220974","DOIUrl":"https://doi.org/10.1109/COMPEL52896.2023.10220974","url":null,"abstract":"On-vehicle integration of photovoltaics can extend the range of electric vehicles by a useful amount each day. However, partial shading can significantly limit PV power production even in stationary installations, and this is expected to be more severe in vehicles. Differential power processing (DPP) approaches can maximize PV output power despite partial shading. This work presents a PV-to-isolated-bus DPP architecture specifically for electric vehicle integration and a converter module that is designed to be extensible and inexpensive. The proposed architecture uses the vehicle’s existing low voltage battery as the common bus for the DPP modules and reuses the existing onboard charger to interface the solar string to the high-voltage battery. The proposed converter module achieves maximum power point tracking (MPPT) for the cell(s) it is connected to without requiring any communication or power transfer across the isolation barrier while allowing bidirectional power with synchronous rectification. The proposed architecture offers an inexpensive solution with high system efficiency and simple control that scales easily to large numbers of DPP units. The paper will include modeling of the advantages of the architecture, experimental characterization of the proposed DPP module, and experimental demonstration in a multi-cell, multi-DPP system.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"20 1","pages":"1-7"},"PeriodicalIF":0.7,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72785653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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