Pub Date : 2020-01-01DOI: 10.1109/CJECE.2019.2914959
A. Yetgin
In induction motors, the leakage reactance values are obtained from the motor short circuit operation experiment. However, these values do not give clear results for different geometries. For this reason, taking into the parameters of the slot geometry accounts for determining the stator and rotor leakage reactance values that are important in terms of obtaining more accurate results. This paper has investigated the stator slot permeance values of nine different stator slot structures commonly used in industrial type of three-phase squirrel cage induction motors for obtaining the best starting torque. The stator inductance and leakage reactance values were calculated for each stator slot structure. The change of starting torque of the induction motor has been analyzed by using the MATLAB code. As a result of the analysis, the stator slot structure, which gives the best starting torque, has been obtained. It has been also shown that a 16% improvement can be achieved by changing the stator slot structure at the starting torque. This increase in the starting torque will provide a great advantage for the motor’s acceleration versus a heavy load.
{"title":"Investigation of the Effects of Stator Slot Permeance on Induction Motor and Obtaining the Best Starting Torque Using Permeance Calculation","authors":"A. Yetgin","doi":"10.1109/CJECE.2019.2914959","DOIUrl":"https://doi.org/10.1109/CJECE.2019.2914959","url":null,"abstract":"In induction motors, the leakage reactance values are obtained from the motor short circuit operation experiment. However, these values do not give clear results for different geometries. For this reason, taking into the parameters of the slot geometry accounts for determining the stator and rotor leakage reactance values that are important in terms of obtaining more accurate results. This paper has investigated the stator slot permeance values of nine different stator slot structures commonly used in industrial type of three-phase squirrel cage induction motors for obtaining the best starting torque. The stator inductance and leakage reactance values were calculated for each stator slot structure. The change of starting torque of the induction motor has been analyzed by using the MATLAB code. As a result of the analysis, the stator slot structure, which gives the best starting torque, has been obtained. It has been also shown that a 16% improvement can be achieved by changing the stator slot structure at the starting torque. This increase in the starting torque will provide a great advantage for the motor’s acceleration versus a heavy load.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"25-29"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2019.2914959","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/CJECE.2020.3002243
Jiayi Fan, Yongkeun Lee
The demagnetization of switched reluctance motor (SRM) is usually a nonnegligible problem as the speed increases due to large back electromotive force (EMF). A slow demagnetization causes long tail current and negative torque, which reduces the efficiency and the output capability of SRM. In the conventional SRM design method, the inductance slope is normally designed to be high. However, it causes the problems of slow demagnetization in the negative torque region and low utilization efficiency of the torque-generative region. This article proposed a totally contrary way of SRM design, a small value of the inductance slope is chosen. Therefore, the effect of the back EMF can be diminished and the demagnetization is improved. The utilization of the torque-generative region is also improved due to the delayed turn-off angle. Simulation results are provided to verify the advantages of the proposed idea compared with the conventional one.
{"title":"A Concept of Accelerating the Demagnetization of Switched Reluctance Motor","authors":"Jiayi Fan, Yongkeun Lee","doi":"10.1109/CJECE.2020.3002243","DOIUrl":"https://doi.org/10.1109/CJECE.2020.3002243","url":null,"abstract":"The demagnetization of switched reluctance motor (SRM) is usually a nonnegligible problem as the speed increases due to large back electromotive force (EMF). A slow demagnetization causes long tail current and negative torque, which reduces the efficiency and the output capability of SRM. In the conventional SRM design method, the inductance slope is normally designed to be high. However, it causes the problems of slow demagnetization in the negative torque region and low utilization efficiency of the torque-generative region. This article proposed a totally contrary way of SRM design, a small value of the inductance slope is chosen. Therefore, the effect of the back EMF can be diminished and the demagnetization is improved. The utilization of the torque-generative region is also improved due to the delayed turn-off angle. Simulation results are provided to verify the advantages of the proposed idea compared with the conventional one.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"326-330"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2020.3002243","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/CJECE.2020.3005316
Jaspreet Singh, A. Refaey, J. Koilpillai
The use of cloud Infrastructure as a Service (IaaS) for enterprise applications is at an all-time high and is charted to continue growing to approximately 73% by 2022. IaaS suffers from several security concerns, such as hypervisor hijacking, virtual machine (VM) hopping, and account hijacking. With such a large percentage of enterprise traffic on the cloud, a strong security framework is demanded. To secure IaaS, this article proposes a software-defined perimeter (SDP) as a solution. SDP provides a logical perimeter to restrict access to services with a layer of authentication and authorization to allow. Only authorized clients may connect to services hidden by SDP gateways. SDP is implemented and verified in an AWS cloud environment. Port scanning is used to verify SDP behavior as well. The results demonstrate the SDP’s ability to “darken” services behind a gateway. The performance of SDP against a denial-of-service (DoS) attack is demonstrated in a local environment. The test results demonstrate that SDP is indeed capable of resisting DoS attacks while allowing legitimate user traffic even under the duration of the attack. These results lead to a discussion on future research for SDP in IaaS.
{"title":"Adoption of the Software-Defined Perimeter (SDP) Architecture for Infrastructure as a Service","authors":"Jaspreet Singh, A. Refaey, J. Koilpillai","doi":"10.1109/CJECE.2020.3005316","DOIUrl":"https://doi.org/10.1109/CJECE.2020.3005316","url":null,"abstract":"The use of cloud Infrastructure as a Service (IaaS) for enterprise applications is at an all-time high and is charted to continue growing to approximately 73% by 2022. IaaS suffers from several security concerns, such as hypervisor hijacking, virtual machine (VM) hopping, and account hijacking. With such a large percentage of enterprise traffic on the cloud, a strong security framework is demanded. To secure IaaS, this article proposes a software-defined perimeter (SDP) as a solution. SDP provides a logical perimeter to restrict access to services with a layer of authentication and authorization to allow. Only authorized clients may connect to services hidden by SDP gateways. SDP is implemented and verified in an AWS cloud environment. Port scanning is used to verify SDP behavior as well. The results demonstrate the SDP’s ability to “darken” services behind a gateway. The performance of SDP against a denial-of-service (DoS) attack is demonstrated in a local environment. The test results demonstrate that SDP is indeed capable of resisting DoS attacks while allowing legitimate user traffic even under the duration of the attack. These results lead to a discussion on future research for SDP in IaaS.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"357-363"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2020.3005316","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/cjece.2020.3008805
M. S. Shehata, A. Refaey, Yang Shi
Welcome to a Special Issue of the IEEE Canadian Journal of Electrical and Computer Engineering, which presents some of the top articles (in extended form) from the Canadian Conference of Electrical and Computer Engineering (CCECE 2019) held in Edmonton, AB, Canada, May 5–8, 2019. This conference was hosted by the Northern Canada Section, with four technical sponsors (IEEE Canada, IEEE Northern Canada Section, IEEE Southern Alberta Section, and the IAS/PES Northern Canada Chapter).
{"title":"Guest Editorial Special Issue on CCECE 2019","authors":"M. S. Shehata, A. Refaey, Yang Shi","doi":"10.1109/cjece.2020.3008805","DOIUrl":"https://doi.org/10.1109/cjece.2020.3008805","url":null,"abstract":"Welcome to a Special Issue of the IEEE Canadian Journal of Electrical and Computer Engineering, which presents some of the top articles (in extended form) from the Canadian Conference of Electrical and Computer Engineering (CCECE 2019) held in Edmonton, AB, Canada, May 5–8, 2019. This conference was hosted by the Northern Canada Section, with four technical sponsors (IEEE Canada, IEEE Northern Canada Section, IEEE Southern Alberta Section, and the IAS/PES Northern Canada Chapter).","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"121-121"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81963848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/CJECE.2019.2961477
R. Tervo
A custom hardware coprocessor is described to improve the efficiency of applications using arithmetic in the Galois field GF(2) and the extension fields GF( $2^{m}$ ). The evaluation of such processor enhancements requires a variety of test exercises based on GF(2) arithmetic. Various test procedures are presented, which leverage the properties of finite fields to exercise the GF(2) arithmetic coprocessor incorporated with a 32-bit field-programmable gate array (FPGA)-based soft processor (Nios II). Up to 60 times speed improvement was achieved in typical calculations using the coprocessor. Résumé—Un coprocesseur personnalisé a été décrit pour améliorer l’efficacité des applications utilisant l’arithmétique en extension de Galois GF(2) et l’extension de corps GF(2m). L’évaluation des améliorations d’un tel processeur nécessite une variété d’exercices tests qui se basent sur l’arithmétique de GF(2). De nombreux tests de procédures ont été présentés, ils exploitent les propriétés des corps finis afin d’exercer le coprocesseur arithmétique GF(2). Ce dernier a été incorporé sur une matrice de portes programmables par l’utilisateur (FPGA) à 32 bits en se basant sur un processeur embarqué (Nios II). La vitesse des calculs a été améliorée jusqu’à 60 fois en utilisant le processeur.
{"title":"Testing Methodology for a GF(2) Coprocessor Méthodologie de test pour un coprocesseur GF(2)","authors":"R. Tervo","doi":"10.1109/CJECE.2019.2961477","DOIUrl":"https://doi.org/10.1109/CJECE.2019.2961477","url":null,"abstract":"A custom hardware coprocessor is described to improve the efficiency of applications using arithmetic in the Galois field GF(2) and the extension fields GF( $2^{m}$ ). The evaluation of such processor enhancements requires a variety of test exercises based on GF(2) arithmetic. Various test procedures are presented, which leverage the properties of finite fields to exercise the GF(2) arithmetic coprocessor incorporated with a 32-bit field-programmable gate array (FPGA)-based soft processor (Nios II). Up to 60 times speed improvement was achieved in typical calculations using the coprocessor. Résumé—Un coprocesseur personnalisé a été décrit pour améliorer l’efficacité des applications utilisant l’arithmétique en extension de Galois GF(2) et l’extension de corps GF(2m). L’évaluation des améliorations d’un tel processeur nécessite une variété d’exercices tests qui se basent sur l’arithmétique de GF(2). De nombreux tests de procédures ont été présentés, ils exploitent les propriétés des corps finis afin d’exercer le coprocesseur arithmétique GF(2). Ce dernier a été incorporé sur une matrice de portes programmables par l’utilisateur (FPGA) à 32 bits en se basant sur un processeur embarqué (Nios II). La vitesse des calculs a été améliorée jusqu’à 60 fois en utilisant le processeur.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"61 1","pages":"129-135"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2019.2961477","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/CJECE.2020.2966733
Mohammad Halim Deedar, S. Muñoz-Hernández
We present a parametric framework (UFleSe) with a user-friendly interface having a search engine that enables regular users (without the need of neither technical nor theoretical knowledge) to define their fuzzy concepts, rules, similarity relations, synonyms, antonyms, and personalizing their definitions for different users, and to link them with the crisp database fields for performing flexible, expressive queries in a language close to natural language. It works over multiple modern and conventional data formats, such as JSON, SQL, Prolog, CSV, XLS, and XLSX. We present the syntax involved in the construction of our various flexible searching criteria and their personalizations. Furthermore, we present the architecture of this novel system that combines fuzzy, crisp data, and similarity relations in its queries to return constructive answers ordered by a degree of searching criteria satisfaction (truth-value between 0 and 1). Finally, we include a comparative analysis of different fuzzy querying systems here, and we provide various experiments, to show the system behavior, performance, efficiency, and scalability as well.
{"title":"UFleSe: User-Friendly Parametric Framework for Expressive Flexible Searches","authors":"Mohammad Halim Deedar, S. Muñoz-Hernández","doi":"10.1109/CJECE.2020.2966733","DOIUrl":"https://doi.org/10.1109/CJECE.2020.2966733","url":null,"abstract":"We present a parametric framework (UFleSe) with a user-friendly interface having a search engine that enables regular users (without the need of neither technical nor theoretical knowledge) to define their fuzzy concepts, rules, similarity relations, synonyms, antonyms, and personalizing their definitions for different users, and to link them with the crisp database fields for performing flexible, expressive queries in a language close to natural language. It works over multiple modern and conventional data formats, such as JSON, SQL, Prolog, CSV, XLS, and XLSX. We present the syntax involved in the construction of our various flexible searching criteria and their personalizations. Furthermore, we present the architecture of this novel system that combines fuzzy, crisp data, and similarity relations in its queries to return constructive answers ordered by a degree of searching criteria satisfaction (truth-value between 0 and 1). Finally, we include a comparative analysis of different fuzzy querying systems here, and we provide various experiments, to show the system behavior, performance, efficiency, and scalability as well.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"235-250"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2020.2966733","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/cjece.2020.2978459
Michal Aibin
These days, the majority of devices are connected to the Internet of Things. One of the areas that need further research is the smart thermostats’ operation. In this article, we perform an analysis of efficient household heating and air conditioning with smart thermostats. To the best of our knowledge, this is the first article that correlates real data from the smart thermostats and weather to predict heating, ventilation, and air conditioning (HVAC) operation. The main problem that we focus on is the study of overheated and overcooled homes. Our results show that adaptive strategies that learn the weather impact on the house enabled three times reduction of heating time and four times reduction of air conditioning, with the most significant improvement during sunny days.
{"title":"The Weather Impact on Heating and Air Conditioning With Smart Thermostats","authors":"Michal Aibin","doi":"10.1109/cjece.2020.2978459","DOIUrl":"https://doi.org/10.1109/cjece.2020.2978459","url":null,"abstract":"These days, the majority of devices are connected to the Internet of Things. One of the areas that need further research is the smart thermostats’ operation. In this article, we perform an analysis of efficient household heating and air conditioning with smart thermostats. To the best of our knowledge, this is the first article that correlates real data from the smart thermostats and weather to predict heating, ventilation, and air conditioning (HVAC) operation. The main problem that we focus on is the study of overheated and overcooled homes. Our results show that adaptive strategies that learn the weather impact on the house enabled three times reduction of heating time and four times reduction of air conditioning, with the most significant improvement during sunny days.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"20 1","pages":"190-194"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/cjece.2020.2978459","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/CJECE.2020.3002855
T. Kandil, Mohamed Adel Ahmed
This article presents a dynamic voltage restorer (DVR) topology based on the adaptive noise canceling (ANC) technique, which can be used for both voltage compensation and harmonic mitigation. Furthermore, this article aims to investigate the DVR performance when installed in a microgrid (MG) during both normal operation of the utility and during utility disturbances. One of the main objectives of this article is to reduce the cost of inverter-based DVR by reducing both the size of the dc-link capacitor and rating of switching elements. The voltage of the dc-link capacitor is regulated to low voltage level using a transformer and a pulsewidth modulation (PWM) rectifier to achieve both effective voltage regulation and drawing a sinusoidal line current from the grid and thus not to contribute to the increase of the THD of the utility current. Furthermore, the voltage across the switches can be limited to low value by an adequate design of dc-link capacitor size, capacitor voltage, and sag level to be compensated. Finally, the effectiveness and fast response of the proposed DVR for the compensation of voltage disturbances and current harmonics is confirmed by simulation using MATLAB/Simulink during the steady-state and transient operations to analyze the performance of the scheme under different operating conditions.
{"title":"Control and Operation of Dynamic Voltage Restorer With Online Regulated DC-Link Capacitor in Microgrid System","authors":"T. Kandil, Mohamed Adel Ahmed","doi":"10.1109/CJECE.2020.3002855","DOIUrl":"https://doi.org/10.1109/CJECE.2020.3002855","url":null,"abstract":"This article presents a dynamic voltage restorer (DVR) topology based on the adaptive noise canceling (ANC) technique, which can be used for both voltage compensation and harmonic mitigation. Furthermore, this article aims to investigate the DVR performance when installed in a microgrid (MG) during both normal operation of the utility and during utility disturbances. One of the main objectives of this article is to reduce the cost of inverter-based DVR by reducing both the size of the dc-link capacitor and rating of switching elements. The voltage of the dc-link capacitor is regulated to low voltage level using a transformer and a pulsewidth modulation (PWM) rectifier to achieve both effective voltage regulation and drawing a sinusoidal line current from the grid and thus not to contribute to the increase of the THD of the utility current. Furthermore, the voltage across the switches can be limited to low value by an adequate design of dc-link capacitor size, capacitor voltage, and sag level to be compensated. Finally, the effectiveness and fast response of the proposed DVR for the compensation of voltage disturbances and current harmonics is confirmed by simulation using MATLAB/Simulink during the steady-state and transient operations to analyze the performance of the scheme under different operating conditions.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"331-341"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2020.3002855","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/CJECE.2020.2968404
A. Delavari, P. Brunelle, C. Mugombozi
This article contributes to the evaluation of the performance and the precision of the IEC 61850 protocol implementation for real-time simulation. The importance of this study stems from two facts. First, the simulation is a required stage of any design process including that of an IEC 61850 model of utilities, which may include an automation system from two or more vendors. Second, verification of the vendor’s claim to be compliant with a specific edition of IEC 61850 relies in part on the simulation. We validate the interfacing of the IEC 61850 generic object-oriented substation event (GOOSE) and sampled value (SV) packets through the I/O modules of the simulation environment. In addition, this protocol interfacing is applied to validate a distance protection relay model using the IEC 61850 modules of GOOSEs and SVs in the HYPERSIM real-time simulator taking advantage of an SGI parallel supercomputer. The distance protection relay is implemented in Simulink, tested and validated with MATLAB Simscape Power Systems and imported into HYPERSIM via the HYPERLINK module. The simulation result has been evaluated in terms of reliability and time delay which plays an important role for the communication and cyber systems in smart grids. This real-time simulation setup is valuable for prototyping, analysis, and validation of control algorithms compliant with IEC 61850.
本文对iec61850协议实现实时仿真的性能和精度进行了评价。这项研究的重要性源于两个事实。首先，模拟是任何设计过程的必要阶段，包括IEC 61850公用事业模型，其中可能包括来自两个或更多供应商的自动化系统。其次，验证供应商声称符合IEC 61850的特定版本部分依赖于模拟。我们通过模拟环境的I/O模块验证了IEC 61850通用面向对象变电站事件(GOOSE)和采样值(SV)数据包的接口。此外，该协议接口应用于利用SGI并行超级计算机的HYPERSIM实时模拟器中使用IEC 61850的goose和sv模块验证距离保护继电器模型。该距离保护继电器在Simulink中实现，在MATLAB Simscape Power Systems中进行测试和验证，并通过HYPERLINK模块导入HYPERSIM。从可靠性和时延两个方面对仿真结果进行了评价，这对智能电网中的通信和网络系统具有重要意义。这种实时仿真设置对于符合IEC 61850的控制算法的原型，分析和验证是有价值的。
{"title":"Real-Time Modeling and Testing of Distance Protection Relay Based on IEC 61850 Protocol","authors":"A. Delavari, P. Brunelle, C. Mugombozi","doi":"10.1109/CJECE.2020.2968404","DOIUrl":"https://doi.org/10.1109/CJECE.2020.2968404","url":null,"abstract":"This article contributes to the evaluation of the performance and the precision of the IEC 61850 protocol implementation for real-time simulation. The importance of this study stems from two facts. First, the simulation is a required stage of any design process including that of an IEC 61850 model of utilities, which may include an automation system from two or more vendors. Second, verification of the vendor’s claim to be compliant with a specific edition of IEC 61850 relies in part on the simulation. We validate the interfacing of the IEC 61850 generic object-oriented substation event (GOOSE) and sampled value (SV) packets through the I/O modules of the simulation environment. In addition, this protocol interfacing is applied to validate a distance protection relay model using the IEC 61850 modules of GOOSEs and SVs in the HYPERSIM real-time simulator taking advantage of an SGI parallel supercomputer. The distance protection relay is implemented in Simulink, tested and validated with MATLAB Simscape Power Systems and imported into HYPERSIM via the HYPERLINK module. The simulation result has been evaluated in terms of reliability and time delay which plays an important role for the communication and cyber systems in smart grids. This real-time simulation setup is valuable for prototyping, analysis, and validation of control algorithms compliant with IEC 61850.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"157-162"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2020.2968404","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62193714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-01-01DOI: 10.1109/CJECE.2019.2923050
Omer Turksoy, S. Ayasun, Yakup Hameş, Şahin Sönmez
This paper deals with the computation of all proportional-integral (PI)-based pitch controllers which achieve the desired frequency-domain specifications, namely, gain and phase margins (GPMs) of a large wind turbine (LWT) with communication delays. An efficient graphical method based on extracting the boundaries of stability regions in PI controller parameter space having user-defined GPMs has been employed to determine GPM-based stability regions for a wide range of time delays. The theoretical region boundaries are validated by using a powerful numerical method known as the quasi-polynomial mapping-based root finder (QPmR) and time-domain simulations. Results indicate that the proposed scheme gives an improved dynamic response compared to the recently developed scheme based on stability only for the pitch control of LWTs with communication delays.
{"title":"Computation of Robust PI-Based Pitch Controller Parameters for Large Wind Turbines","authors":"Omer Turksoy, S. Ayasun, Yakup Hameş, Şahin Sönmez","doi":"10.1109/CJECE.2019.2923050","DOIUrl":"https://doi.org/10.1109/CJECE.2019.2923050","url":null,"abstract":"This paper deals with the computation of all proportional-integral (PI)-based pitch controllers which achieve the desired frequency-domain specifications, namely, gain and phase margins (GPMs) of a large wind turbine (LWT) with communication delays. An efficient graphical method based on extracting the boundaries of stability regions in PI controller parameter space having user-defined GPMs has been employed to determine GPM-based stability regions for a wide range of time delays. The theoretical region boundaries are validated by using a powerful numerical method known as the quasi-polynomial mapping-based root finder (QPmR) and time-domain simulations. Results indicate that the proposed scheme gives an improved dynamic response compared to the recently developed scheme based on stability only for the pitch control of LWTs with communication delays.","PeriodicalId":55287,"journal":{"name":"Canadian Journal of Electrical and Computer Engineering-Revue Canadienne De Genie Electrique et Informatique","volume":"43 1","pages":"57-63"},"PeriodicalIF":1.7,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/CJECE.2019.2923050","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62192816","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：