Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058849
Farzad Yazdani, R. Mansour
This paper presents a novel approach to tunable delay lines to address the demand for high resolution tunable delay lines for full duplex transceivers. A novel design is presented based on distributed MEMS transmission line technique, which employs switchable transmission line stubs to minimize the unwanted loading in different states. The proposed design is capable of utilizing a minimum number of switches to achieve a delay resolution of 32 picoseconds and a return loss of more than 15 dB for all states over a bandwidth of 100 MHz around 2.45 GHz. A switch module, MM-3100 by Menlo Microsystems composed of 6 MEMS switches integrated on a single-chip, is used to realize the proposed design. Simulation and measurements are in close agreement and their negligible discrepancies are justified. The proposed design promises to be useful in applications such as analog RF interference cancelation, analog signal processing (ASP), and antenna beamforming.
{"title":"High resolution MEMS-based switched delay lines","authors":"Farzad Yazdani, R. Mansour","doi":"10.1109/MWSYM.2017.8058849","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058849","url":null,"abstract":"This paper presents a novel approach to tunable delay lines to address the demand for high resolution tunable delay lines for full duplex transceivers. A novel design is presented based on distributed MEMS transmission line technique, which employs switchable transmission line stubs to minimize the unwanted loading in different states. The proposed design is capable of utilizing a minimum number of switches to achieve a delay resolution of 32 picoseconds and a return loss of more than 15 dB for all states over a bandwidth of 100 MHz around 2.45 GHz. A switch module, MM-3100 by Menlo Microsystems composed of 6 MEMS switches integrated on a single-chip, is used to realize the proposed design. Simulation and measurements are in close agreement and their negligible discrepancies are justified. The proposed design promises to be useful in applications such as analog RF interference cancelation, analog signal processing (ASP), and antenna beamforming.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87735656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058986
A. Carter, M. Urteaga, Z. Griffith, K. J. Lee, J. Roderick, P. Rowell, J. Bergman, S. Hong, B. Patti, C. Petteway, G. Fountain
Q-Band receiver and transmitter beamformer channels using 250 nm InP HBTs and 130 nm Si CMOS have been fabricated in a three-dimensional wafer-stacking platform. Room-temperature face-to-face wafer bonding is accomplished using a hybrid bonding technique (Direct Bond Interconnect®) of 2.5 micron wide, 5 micron pitch copper inlaid in silicon dioxide to form electrically active vertical interconnects. 3-bit amplitude and 4-bit phase modulation receive and transmit channels are characterized. At 40 GHz, the receiver and transmitter chains have more than 25 dB gain, with 6 dB variable gain tuning, and less than 5° RMS phase error. The transmitter saturated output power is 20.3 dBm. To the authors' knowledge, this is the first demonstration of wafer-scale three-dimensional integration of Si and InP MMICs towards RF beamforming applications.
采用250 nm InP hts和130 nm Si CMOS在三维晶圆堆叠平台上制备了q波段接收和发射波束形成通道。室温面对面晶圆键合是使用2.5微米宽，5微米间距的铜镶嵌在二氧化硅中的混合键合技术(Direct Bond Interconnect®)来完成的，以形成电活性垂直互连。对3位振幅调制和4位相位调制的接收和发射信道进行了表征。在40 GHz时，接收和发射链的增益大于25 dB，具有6 dB可变增益调谐，相位误差小于5°RMS。发射机饱和输出功率为20.3 dBm。据作者所知，这是硅和InP mmic面向射频波束成形应用的晶圆级三维集成的第一次演示。
{"title":"Q-band InP/CMOS receiver and transmitter beamformer channels fabricated by 3D heterogeneous integration","authors":"A. Carter, M. Urteaga, Z. Griffith, K. J. Lee, J. Roderick, P. Rowell, J. Bergman, S. Hong, B. Patti, C. Petteway, G. Fountain","doi":"10.1109/MWSYM.2017.8058986","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058986","url":null,"abstract":"Q-Band receiver and transmitter beamformer channels using 250 nm InP HBTs and 130 nm Si CMOS have been fabricated in a three-dimensional wafer-stacking platform. Room-temperature face-to-face wafer bonding is accomplished using a hybrid bonding technique (Direct Bond Interconnect®) of 2.5 micron wide, 5 micron pitch copper inlaid in silicon dioxide to form electrically active vertical interconnects. 3-bit amplitude and 4-bit phase modulation receive and transmit channels are characterized. At 40 GHz, the receiver and transmitter chains have more than 25 dB gain, with 6 dB variable gain tuning, and less than 5° RMS phase error. The transmitter saturated output power is 20.3 dBm. To the authors' knowledge, this is the first demonstration of wafer-scale three-dimensional integration of Si and InP MMICs towards RF beamforming applications.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87905966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058893
Yi-Ming Chen, Shih-Cheng Lin, Sheng-Fuh Chang, Hsin-Yen Yang
This paper presents a compact 55–65 GHz single-ended-to-balanced bandpass filter in CMOS technology. The bandpass filters is designed based on three-line stepped-impedance resonator to obtain differential output phases. The stepped-impedance open stub is incorporated to generate stopband transmission zero. To meet the stringent chip area restriction in CMOS realization, the grounded pedestal structure is adopted by fully utilizing the multiple metal layer feature. The measured insertion loss is less than 4.7 dB and the return loss is larger than 9 dB in 55–65 GHz. The power imbalance is less than 0.7 dB and the phase imbalance is less than 2°. The chip size without pad is 0.293×0.136 mm2, equivalent to 0.007 Ig2.
{"title":"A compact CMOS single-ended-to-balanced bandpass filter in millimeter-wave band","authors":"Yi-Ming Chen, Shih-Cheng Lin, Sheng-Fuh Chang, Hsin-Yen Yang","doi":"10.1109/MWSYM.2017.8058893","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058893","url":null,"abstract":"This paper presents a compact 55–65 GHz single-ended-to-balanced bandpass filter in CMOS technology. The bandpass filters is designed based on three-line stepped-impedance resonator to obtain differential output phases. The stepped-impedance open stub is incorporated to generate stopband transmission zero. To meet the stringent chip area restriction in CMOS realization, the grounded pedestal structure is adopted by fully utilizing the multiple metal layer feature. The measured insertion loss is less than 4.7 dB and the return loss is larger than 9 dB in 55–65 GHz. The power imbalance is less than 0.7 dB and the phase imbalance is less than 2°. The chip size without pad is 0.293×0.136 mm2, equivalent to 0.007 Ig2.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88287231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8059028
Wenyao Zhai, Morris Repeta, David Wessel, Wen Tong
In this paper, a high-gain, steerable mm-Wave large-scale phased array is designed for 5G communication. In order to reduce system/circuit complexity, 8-element sub-arrays are used. These sub-arrays are randomly tiled to disrupt the periodicity in the array in order to keep side lobe level (SLL) and grating lobe level (GLL) low. Limited field of view (LFOV) of ±15o in both Azimuth and Elevation planes is achieved with < −10dBc SLL and 60% efficiency. A boresight and a +15o θ0, φ0 beam steered 256-element Eband phased arrays were prototyped with LTCC technology to validate the concept. Measured results are presented and compared with simulations. This design is also scalable if higher antenna gain is required making this proposed phased array a good candidate for next generation high speed 5G communications.
{"title":"mm-Wave large-scale phased array based on randomly tiled rectangular sub-arrays for 5G communications","authors":"Wenyao Zhai, Morris Repeta, David Wessel, Wen Tong","doi":"10.1109/MWSYM.2017.8059028","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8059028","url":null,"abstract":"In this paper, a high-gain, steerable mm-Wave large-scale phased array is designed for 5G communication. In order to reduce system/circuit complexity, 8-element sub-arrays are used. These sub-arrays are randomly tiled to disrupt the periodicity in the array in order to keep side lobe level (SLL) and grating lobe level (GLL) low. Limited field of view (LFOV) of ±15o in both Azimuth and Elevation planes is achieved with < −10dBc SLL and 60% efficiency. A boresight and a +15o θ0, φ0 beam steered 256-element Eband phased arrays were prototyped with LTCC technology to validate the concept. Measured results are presented and compared with simulations. This design is also scalable if higher antenna gain is required making this proposed phased array a good candidate for next generation high speed 5G communications.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83865930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058850
J. Stegner, U. Stehr, Cheng Tu, Joshua E-Y Lee, M. Hein
Reference oscillators are crucial hardware components of radio-frequency receiver circuits, as their performance directly affects the system performance. Especially in GHz applications, such as 4G/5G mobile communications, a low error-vector magnitude is required, which is strongly influenced by the phase noise of the reference oscillator. This paper reports the results of the design, simulation, and measurement of a MEMS oscillator with very low phase noise. Therefore, it is suitable for use as reference oscillator operating at high frequencies in RF receiver systems. While the MEMS device is a plate-shaped contour-mode resonator in an aluminium-nitride-on-silicon technology, the active part of the oscillator is designed and fabricated in a 180 nm CMOS technology. By adding the parasitic effects of the assembly, taken from measurements of the submodules, the results from system simulation and measurement show good agreement, i.e. only 3 dB deviation in the noise floor of −142 dBc/Hz. The phase-noise level of the oscillator at an offset of 1kHz from the operating frequency of 256 MHz is −112 dBc/Hz, among the lowest values reported for MEMS-based oscillators at this high frequency.
{"title":"Very-low phase noise RF-MEMS reference oscillator using AlN-on-Si resonators achieved by accurate co-simulation","authors":"J. Stegner, U. Stehr, Cheng Tu, Joshua E-Y Lee, M. Hein","doi":"10.1109/MWSYM.2017.8058850","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058850","url":null,"abstract":"Reference oscillators are crucial hardware components of radio-frequency receiver circuits, as their performance directly affects the system performance. Especially in GHz applications, such as 4G/5G mobile communications, a low error-vector magnitude is required, which is strongly influenced by the phase noise of the reference oscillator. This paper reports the results of the design, simulation, and measurement of a MEMS oscillator with very low phase noise. Therefore, it is suitable for use as reference oscillator operating at high frequencies in RF receiver systems. While the MEMS device is a plate-shaped contour-mode resonator in an aluminium-nitride-on-silicon technology, the active part of the oscillator is designed and fabricated in a 180 nm CMOS technology. By adding the parasitic effects of the assembly, taken from measurements of the submodules, the results from system simulation and measurement show good agreement, i.e. only 3 dB deviation in the noise floor of −142 dBc/Hz. The phase-noise level of the oscillator at an offset of 1kHz from the operating frequency of 256 MHz is −112 dBc/Hz, among the lowest values reported for MEMS-based oscillators at this high frequency.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82677342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8059105
E. Shaulov, S. Jameson, E. Socher
An innovative topology for W-band energy harvesting is proposed using 65-nm CMOS, including an on-chip antenna. The rectifying circuit is based on inverse operation of a differential Colpitts VCO and a loop on-chip antenna is coupled to the rectifying circuit. Occupying total area of 0.611 mm2, the harvester has a peak output power of 0.2 mW with an efficiency of 6%, while the rectifier circuit itself achieved a measured efficiency of 21.5%. Implementing a 3×3 array of CMOS rectennas on a PCB enabled a x3.5 increase in harvested power at 95GHz.
{"title":"W-band energy harvesting rectenna array in 65-nm CMOS","authors":"E. Shaulov, S. Jameson, E. Socher","doi":"10.1109/MWSYM.2017.8059105","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8059105","url":null,"abstract":"An innovative topology for W-band energy harvesting is proposed using 65-nm CMOS, including an on-chip antenna. The rectifying circuit is based on inverse operation of a differential Colpitts VCO and a loop on-chip antenna is coupled to the rectifying circuit. Occupying total area of 0.611 mm2, the harvester has a peak output power of 0.2 mW with an efficiency of 6%, while the rectifier circuit itself achieved a measured efficiency of 21.5%. Implementing a 3×3 array of CMOS rectennas on a PCB enabled a x3.5 increase in harvested power at 95GHz.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82868183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058620
W. Haines, Parisa Momenroodaki, E. Berry, Michael Fromandi, Z. Popovic
A wireless wearable device aimed at continuously monitoring internal temperature a few centimeters deep in the body is presented. A radiometer operating in the 1.4–1.427 GHz quiet band is used with a circular patch probe to measure the thermal radiation emitted by the body, which is proportional to temperature. The output is digitized and transmitted over Bluetooth by a TI CC2541. The wearable device is powered by a 3.7 V Li-Ion battery, through three buck-conversion circuits. The sensor design trades performance (continuous calibration) for simplicity to reduce size and power consumption. Validated measurement data of water temperature inside the cheek demonstrates the feasibility of radiometric internal temperature measurement in a wearable platform.
{"title":"Wireless system for continuous monitoring of core body temperature","authors":"W. Haines, Parisa Momenroodaki, E. Berry, Michael Fromandi, Z. Popovic","doi":"10.1109/MWSYM.2017.8058620","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058620","url":null,"abstract":"A wireless wearable device aimed at continuously monitoring internal temperature a few centimeters deep in the body is presented. A radiometer operating in the 1.4–1.427 GHz quiet band is used with a circular patch probe to measure the thermal radiation emitted by the body, which is proportional to temperature. The output is digitized and transmitted over Bluetooth by a TI CC2541. The wearable device is powered by a 3.7 V Li-Ion battery, through three buck-conversion circuits. The sensor design trades performance (continuous calibration) for simplicity to reduce size and power consumption. Validated measurement data of water temperature inside the cheek demonstrates the feasibility of radiometric internal temperature measurement in a wearable platform.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86765735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058687
A. Tessmann, A. Leuther, S. Wagner, H. Massler, M. Kuri, H. Stulz, M. Zink, M. Riessle, T. Merkle
A WR-3 (220–330 GHz) low-noise amplifier (LNA) circuit has been developed for use in next-generation high resolution imaging applications and ultra-high capacity communication links. The submillimeter-wave monolithic integrated circuit (S-MMIC) was realized by using a 35 nm InAlAs/InGaAs based metamorphic high electron mobility transistor (mHEMT) technology in combination with grounded coplanar waveguide topology (GCPW) and cascode transistors, thus leading to a very low noise figure in combination with high gain and large operational bandwidth. The packaged LNA circuit achieved a maximum gain of 29 dB at 314 GHz and more than 26 dB in the frequency range from 252 to 330 GHz. An average room temperature (T = 293 K) noise figure of 6.5 dB was measured between 280 and 330 GHz. Furthermore, the LNA circuit has been used to realize a very compact WR-3 single-chip receiver module, demonstrating an average conversion gain of 6.5 dB and a noise figure of 8.6 dB at the frequency of operation.
{"title":"A 300 GHz low-noise amplifier S-MMIC for use in next-generation imaging and communication applications","authors":"A. Tessmann, A. Leuther, S. Wagner, H. Massler, M. Kuri, H. Stulz, M. Zink, M. Riessle, T. Merkle","doi":"10.1109/MWSYM.2017.8058687","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058687","url":null,"abstract":"A WR-3 (220–330 GHz) low-noise amplifier (LNA) circuit has been developed for use in next-generation high resolution imaging applications and ultra-high capacity communication links. The submillimeter-wave monolithic integrated circuit (S-MMIC) was realized by using a 35 nm InAlAs/InGaAs based metamorphic high electron mobility transistor (mHEMT) technology in combination with grounded coplanar waveguide topology (GCPW) and cascode transistors, thus leading to a very low noise figure in combination with high gain and large operational bandwidth. The packaged LNA circuit achieved a maximum gain of 29 dB at 314 GHz and more than 26 dB in the frequency range from 252 to 330 GHz. An average room temperature (T = 293 K) noise figure of 6.5 dB was measured between 280 and 330 GHz. Furthermore, the LNA circuit has been used to realize a very compact WR-3 single-chip receiver module, demonstrating an average conversion gain of 6.5 dB and a noise figure of 8.6 dB at the frequency of operation.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83088233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058957
K. Haddadi, O. Haenssler, C. Boyaval, D. Théron, G. Dambrine
The design, fabrication and experimental validation of a novel near-field scanning millimeter-wave microscope (NSMM) built inside a scanning electron microscope (SEM) is presented. The instrument developed can perform hybrid characterizations by providing simultaneously atomic force, complex microwave impedance and electron microscopy images of a sample with nanometer spatial resolution. By combining the measured data, the system offers unprecedentable capabilities for tackling the issue between spatial resolution and high frequency quantitative measurements.
{"title":"Near-field scanning millimeter-wave microscope combined with a scanning electron microscope","authors":"K. Haddadi, O. Haenssler, C. Boyaval, D. Théron, G. Dambrine","doi":"10.1109/MWSYM.2017.8058957","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058957","url":null,"abstract":"The design, fabrication and experimental validation of a novel near-field scanning millimeter-wave microscope (NSMM) built inside a scanning electron microscope (SEM) is presented. The instrument developed can perform hybrid characterizations by providing simultaneously atomic force, complex microwave impedance and electron microscopy images of a sample with nanometer spatial resolution. By combining the measured data, the system offers unprecedentable capabilities for tackling the issue between spatial resolution and high frequency quantitative measurements.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80708809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-06-01DOI: 10.1109/MWSYM.2017.8058632
T. Hosotani, F. Kasuya, H. Taniguchi, Takayuki Watanabe, T. Suemitsu, T. Otsuji, T. Ishibashi, M. Shimizu, A. Satou
Asymmetric-dual-grating-gate high-electron-mobility-transistors (ADGG-HEMTs) are expected for high responsivity, room-temperature operating, and high-speed THz detectors. However, their low light coupling efficiency is one of the serious concerns because of the large focused spot size of free-space THz waves. To improve this, we examine shrinking the THz wave spot size by integrating a detector with a hyper-hemispherical silicon lens. We report the 6-fold enhancement of the coupling efficiency by the silicon lens integration. Also, we show that the dependence of the detector module responsivity on incident THz wave frequency is given by the product of the internal responsivity of ADGG-HEMTs and the light coupling efficiency owing to the silicon lens.
{"title":"Lens-integrated asymmetric-dual-grating-gate high-electron-mobility-transistor for plasmonic terahertz detection","authors":"T. Hosotani, F. Kasuya, H. Taniguchi, Takayuki Watanabe, T. Suemitsu, T. Otsuji, T. Ishibashi, M. Shimizu, A. Satou","doi":"10.1109/MWSYM.2017.8058632","DOIUrl":"https://doi.org/10.1109/MWSYM.2017.8058632","url":null,"abstract":"Asymmetric-dual-grating-gate high-electron-mobility-transistors (ADGG-HEMTs) are expected for high responsivity, room-temperature operating, and high-speed THz detectors. However, their low light coupling efficiency is one of the serious concerns because of the large focused spot size of free-space THz waves. To improve this, we examine shrinking the THz wave spot size by integrating a detector with a hyper-hemispherical silicon lens. We report the 6-fold enhancement of the coupling efficiency by the silicon lens integration. Also, we show that the dependence of the detector module responsivity on incident THz wave frequency is given by the product of the internal responsivity of ADGG-HEMTs and the light coupling efficiency owing to the silicon lens.","PeriodicalId":6481,"journal":{"name":"2017 IEEE MTT-S International Microwave Symposium (IMS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83745410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：