Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7354911
A. Anuar, S. Johari, Y. Wahab, M. Zainol, H. Fazmir, M. Mazalan, M. Arshad
This paper reports on the development of a piezoresistive microcantilever sensor read-out circuitry to detect acceleration, biological or chemical activities. Laser micromachining technique is used in fabricating the piezoresistive microcantilever sensor as well as assisting in the cantilever beam and piezoresistor shape formation. In order to test the sensor performance, a Wheatstone bridge which acts as resistive sensor is integrated with three other resistors and the fabricated sensor. A set of amplifier circuit consisting of INA128 is developed to amplify and extract the electrical signal component of the bridge circuit. The resistance and output voltage characteristic of the Wheatstone bridge is investigated, where the percentages difference between the calculated and measured output voltage is very low and similar to each other. The sensor response to vibration is also studied using an electro-dynamic vibration system. The system is designed specifically to enable the accessibility of a small resistivity change due to outside reaction.
{"title":"Development of a read-out circuitry for piezoresistive microcantilever electrical properties measurement","authors":"A. Anuar, S. Johari, Y. Wahab, M. Zainol, H. Fazmir, M. Mazalan, M. Arshad","doi":"10.1109/RSM.2015.7354911","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354911","url":null,"abstract":"This paper reports on the development of a piezoresistive microcantilever sensor read-out circuitry to detect acceleration, biological or chemical activities. Laser micromachining technique is used in fabricating the piezoresistive microcantilever sensor as well as assisting in the cantilever beam and piezoresistor shape formation. In order to test the sensor performance, a Wheatstone bridge which acts as resistive sensor is integrated with three other resistors and the fabricated sensor. A set of amplifier circuit consisting of INA128 is developed to amplify and extract the electrical signal component of the bridge circuit. The resistance and output voltage characteristic of the Wheatstone bridge is investigated, where the percentages difference between the calculated and measured output voltage is very low and similar to each other. The sensor response to vibration is also studied using an electro-dynamic vibration system. The system is designed specifically to enable the accessibility of a small resistivity change due to outside reaction.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"21 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86003691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7355004
Lai Chin Yung, C. C. Fei
Leadframe fabrication process normally involves additional thin film metal layer plating on the bulk copper substrate surface for wire bond purpose. The recent commonly adopted plating materials are silver, tin, and copper flake. To assess the thickness quality, the conventional X-section methods involving grinding and polishing process are utilized. However, the process may lead to inaccurate results, which stems from the occurrence of sample preparation artifact, such as smearing effect attributable to the grinding or polishing process. Thus, alternative advanced methods are developed for assessing the thin film metal layer thickness, such as Focus Ion Beam (FIB), SIMS profiling or XPS, readily available in worldwide market. However, these alternative measurement services are very costly and time consuming per sample measure. To cater the cost and long sample preparation time due to the abovementioned advanced methods, an Energy Dispersive X-ray (EDX) can be applied. In this study, the newly invented methodology breakthrough had been validated by applying EDX for the first time on known bulk elemental analysis purpose. EDX feature is not only useful for elemental analysis but also applicable for thin film-metal layer thickness measurement and bulk material densification determination. A promising result was observed from the detailed experiment work through applying EDX in this evaluation.
{"title":"Verification of the thin film metal layer thickness by energy dispersive X-ray","authors":"Lai Chin Yung, C. C. Fei","doi":"10.1109/RSM.2015.7355004","DOIUrl":"https://doi.org/10.1109/RSM.2015.7355004","url":null,"abstract":"Leadframe fabrication process normally involves additional thin film metal layer plating on the bulk copper substrate surface for wire bond purpose. The recent commonly adopted plating materials are silver, tin, and copper flake. To assess the thickness quality, the conventional X-section methods involving grinding and polishing process are utilized. However, the process may lead to inaccurate results, which stems from the occurrence of sample preparation artifact, such as smearing effect attributable to the grinding or polishing process. Thus, alternative advanced methods are developed for assessing the thin film metal layer thickness, such as Focus Ion Beam (FIB), SIMS profiling or XPS, readily available in worldwide market. However, these alternative measurement services are very costly and time consuming per sample measure. To cater the cost and long sample preparation time due to the abovementioned advanced methods, an Energy Dispersive X-ray (EDX) can be applied. In this study, the newly invented methodology breakthrough had been validated by applying EDX for the first time on known bulk elemental analysis purpose. EDX feature is not only useful for elemental analysis but also applicable for thin film-metal layer thickness measurement and bulk material densification determination. A promising result was observed from the detailed experiment work through applying EDX in this evaluation.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"14 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84704212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7354955
Foughalia Aissa, R. A. Rahim, A. Nordin, S. Ibrahim
The paper presents numerical analysis in three-dimensional (3D) of a hybrid micro-separator that uses magnetophoresis (MAP) and hydrodynamic forces for blood cells separation. The separation between red blood cells (RBC) and white blood cells (WBC) is done by manipulating the differences of their physical and magnetic susceptibilities. The MAP force is induced from ferromagnetic line fabricated on a glass slide while the hydrodynamic force is obtained by a `U' shape microfluidic channel. The analysis was conducted using finite element software, COMSOL Multiphysics®. The particles trajectories, which represent the actual blood cells' movements on the micro-separator, were profiled and show successful separation between RBCs and WBCs by using the MAP and hydrodynamic forces. This study also provides insights of challenges associated with blood separation towards the realization of better diagnostic devices.
{"title":"Simulation of an hybrid blood cells micro-separator","authors":"Foughalia Aissa, R. A. Rahim, A. Nordin, S. Ibrahim","doi":"10.1109/RSM.2015.7354955","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354955","url":null,"abstract":"The paper presents numerical analysis in three-dimensional (3D) of a hybrid micro-separator that uses magnetophoresis (MAP) and hydrodynamic forces for blood cells separation. The separation between red blood cells (RBC) and white blood cells (WBC) is done by manipulating the differences of their physical and magnetic susceptibilities. The MAP force is induced from ferromagnetic line fabricated on a glass slide while the hydrodynamic force is obtained by a `U' shape microfluidic channel. The analysis was conducted using finite element software, COMSOL Multiphysics®. The particles trajectories, which represent the actual blood cells' movements on the micro-separator, were profiled and show successful separation between RBCs and WBCs by using the MAP and hydrodynamic forces. This study also provides insights of challenges associated with blood separation towards the realization of better diagnostic devices.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"60 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89519585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7355022
J. Husna, M. A. Mohamed, J. Sampe, A. M. Md Zain
We have theoretically demonstrated the variation of geometrical parameters for the cavities design of one dimensional (1D) photonic crystal nanocavity based on silicon on insulator (SOI) waveguides. To evaluate the cavity numerically, we have successfully computed it using the 2D finite difference time domain (FDTD) approach. We have varied the geometrical hole size, lattice and number of cavity. We have also varied the length of the cavity parameter, from 530 to 675 nm and for lattice constant from 345 to 410 nm. The optimized quality factors of approximately 4300 at 1617.9 nm resonance wavelengths were obtained and the free spectral range (FSR) was calculated to be in the range of 10 to 60 nm.
{"title":"Numerical simulation of one dimensional (1D) photonic crystal multiple cavities based on silicon on insulator (SOI)","authors":"J. Husna, M. A. Mohamed, J. Sampe, A. M. Md Zain","doi":"10.1109/RSM.2015.7355022","DOIUrl":"https://doi.org/10.1109/RSM.2015.7355022","url":null,"abstract":"We have theoretically demonstrated the variation of geometrical parameters for the cavities design of one dimensional (1D) photonic crystal nanocavity based on silicon on insulator (SOI) waveguides. To evaluate the cavity numerically, we have successfully computed it using the 2D finite difference time domain (FDTD) approach. We have varied the geometrical hole size, lattice and number of cavity. We have also varied the length of the cavity parameter, from 530 to 675 nm and for lattice constant from 345 to 410 nm. The optimized quality factors of approximately 4300 at 1617.9 nm resonance wavelengths were obtained and the free spectral range (FSR) was calculated to be in the range of 10 to 60 nm.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"33 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81744365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7354978
N. Farid, S. Hassan, R. Sanusi, A. Rahim
A 40 GHz power amplifier (PA) driver for the remote antenna unit (RAU) transceiver of a mm-wave radio-over-fiber (RoF) system is presented in this paper. Mm-wave RAU is proposed as a complementary technology to fiber-to-the-home to minimize costs and to increase bandwidth. In order for RoF to be feasible, the cost of the RAU must be minimized through low-cost technology such as CMOS. The PA driver is designed using a 0.13μm RF CMOS process. The architecture used is a 3-stage, double-cascode amplifier. It has input and output reflection coefficients that are better than -10 dB over a bandwidth of 7 GHz. Maximum gain is 33.6 dB and output P1dB is 7.6 dBm. This is the first reported use of a three-stage, double-cascode, 130nm CMOS amplifier for the implementation of a 40 GHz radio-over-fiber system.
{"title":"A 3-stage 40 GHz CMOS power amplifier driver for radio-over-fiber technology","authors":"N. Farid, S. Hassan, R. Sanusi, A. Rahim","doi":"10.1109/RSM.2015.7354978","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354978","url":null,"abstract":"A 40 GHz power amplifier (PA) driver for the remote antenna unit (RAU) transceiver of a mm-wave radio-over-fiber (RoF) system is presented in this paper. Mm-wave RAU is proposed as a complementary technology to fiber-to-the-home to minimize costs and to increase bandwidth. In order for RoF to be feasible, the cost of the RAU must be minimized through low-cost technology such as CMOS. The PA driver is designed using a 0.13μm RF CMOS process. The architecture used is a 3-stage, double-cascode amplifier. It has input and output reflection coefficients that are better than -10 dB over a bandwidth of 7 GHz. Maximum gain is 33.6 dB and output P1dB is 7.6 dBm. This is the first reported use of a three-stage, double-cascode, 130nm CMOS amplifier for the implementation of a 40 GHz radio-over-fiber system.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"1 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82496352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7354957
Mawahib Gafare, M. H. M. Md Khir, A. Rabih, A. Ahmed, J. Dennis
This paper reports modeling and simulation of polysilicon piezoresistors as sensing mechanism using commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process. The CMOS-MEMS resonator is designed to detect change in mass. The designed piezoresistors are composed of two types; longitudinal and transverse. CMOS polysilicon thin film is used as the piezoresistive sensing material. The finite element analysis (FEA) software CoventorWare is adopted to simulate the piezoresistors and hence, compare its values with the modeled one. When actuation voltage is applied to the piezoresistors, it generates a change in resistance which is detected by the change in current. The percentage difference between simulated stressed and unstressed current is found to be 0.28 % and 0.47 % while the difference in the resistance between the model and simulation is 1.96 % and 4.54 % for the transverse and longitudinal piezoresistors, respectively.
{"title":"Modeling and simulation of polysilicon piezoresistors in a CMOS-MEMS resonator for mass detection","authors":"Mawahib Gafare, M. H. M. Md Khir, A. Rabih, A. Ahmed, J. Dennis","doi":"10.1109/RSM.2015.7354957","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354957","url":null,"abstract":"This paper reports modeling and simulation of polysilicon piezoresistors as sensing mechanism using commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process. The CMOS-MEMS resonator is designed to detect change in mass. The designed piezoresistors are composed of two types; longitudinal and transverse. CMOS polysilicon thin film is used as the piezoresistive sensing material. The finite element analysis (FEA) software CoventorWare is adopted to simulate the piezoresistors and hence, compare its values with the modeled one. When actuation voltage is applied to the piezoresistors, it generates a change in resistance which is detected by the change in current. The percentage difference between simulated stressed and unstressed current is found to be 0.28 % and 0.47 % while the difference in the resistance between the model and simulation is 1.96 % and 4.54 % for the transverse and longitudinal piezoresistors, respectively.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"33 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74973095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7354994
N. Kamsani, Veeraiyah Thangasamy, S. Hashim, Z. Yusoff, M. Bukhori, M. Hamidon
In this paper, a high-speed low-power full adder design using multiplexer based pass transistor logic featuring full-swing output is proposed. The adder is designed and simulated using the industry standard 130 nm CMOS technology, at a supply voltage of 1.2 V. The obtained Power Delay Product (PDP) of its critical path is 29×10-18 J and its power consumption is 2.01μW. The proposed full adder is also capable to function at lower supply voltages of 0.4 V and 0.8 V without significant performance degradation. The proposed adder when cascaded in a 4-bit ripple carry adder configuration, its power, delay and PDP performance are better than the other adders making it suitable for larger arithmetic circuits.
{"title":"A low power multiplexer based pass transistor logic full adder","authors":"N. Kamsani, Veeraiyah Thangasamy, S. Hashim, Z. Yusoff, M. Bukhori, M. Hamidon","doi":"10.1109/RSM.2015.7354994","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354994","url":null,"abstract":"In this paper, a high-speed low-power full adder design using multiplexer based pass transistor logic featuring full-swing output is proposed. The adder is designed and simulated using the industry standard 130 nm CMOS technology, at a supply voltage of 1.2 V. The obtained Power Delay Product (PDP) of its critical path is 29×10-18 J and its power consumption is 2.01μW. The proposed full adder is also capable to function at lower supply voltages of 0.4 V and 0.8 V without significant performance degradation. The proposed adder when cascaded in a 4-bit ripple carry adder configuration, its power, delay and PDP performance are better than the other adders making it suitable for larger arithmetic circuits.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"26 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90981641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7354965
Z. H. A. Rahman, M. H. M. Md Khir, Z. A. Burhanudin
This paper presents the design and simulation of a new concept of CMOS-MEMS thermoelectric generator (TEG) capable of converting thermal energy into electrical energy for use in low power medical devices. The TEG is designed with three unique features that will ensure optimum heat transfer that result in achievement of larger temperature difference between two junctions. First, a thicker dielectric layer is designed between two metal layers. Second, trenches isolation is introduced to isolate the hot and cold junction area. Third, thermal insulator and heat sink layer are deposited on the top surface of the TEG at the hot and cold junction area, respectively. Based on the simulation results of these three abovementioned features, a device with size of 25 mm2 consisting of 1712 thermocouples with 5 K temperature difference between two sides, is capable of producing output voltage and power of 3.294 V and 0.925 μW, respectively. Voltage factor is 2.635 Vcm-2K-1 and power factor is 0.148 μWcm-2K-2.
{"title":"CMOS-MEMS thermoelectric generator for low power medical devices","authors":"Z. H. A. Rahman, M. H. M. Md Khir, Z. A. Burhanudin","doi":"10.1109/RSM.2015.7354965","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354965","url":null,"abstract":"This paper presents the design and simulation of a new concept of CMOS-MEMS thermoelectric generator (TEG) capable of converting thermal energy into electrical energy for use in low power medical devices. The TEG is designed with three unique features that will ensure optimum heat transfer that result in achievement of larger temperature difference between two junctions. First, a thicker dielectric layer is designed between two metal layers. Second, trenches isolation is introduced to isolate the hot and cold junction area. Third, thermal insulator and heat sink layer are deposited on the top surface of the TEG at the hot and cold junction area, respectively. Based on the simulation results of these three abovementioned features, a device with size of 25 mm2 consisting of 1712 thermocouples with 5 K temperature difference between two sides, is capable of producing output voltage and power of 3.294 V and 0.925 μW, respectively. Voltage factor is 2.635 Vcm-2K-1 and power factor is 0.148 μWcm-2K-2.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"78 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87308869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/RSM.2015.7354954
N. Zaidon, A. Nordin, A. Ismail
This paper presents microfluidic network analysis using electric circuit methods by modifying the length of the channel segments that represent hydraulic resistance. It is crucial to precisely predicts flow and pressure in the channel by an accurate estimation of the hydraulic resistance of each segment, as microfluidics network become more complex and challenging. Furthermore, manipulation of channel length and size can be applied to design concentration gradient that based on repeated splitting, mixing and recombination fluid flow process, thereby producing a desired concentration profile. By using Hagen-Poiseuille's law-Ohm's law analogy, a batch of simulation 3D-microfluidic geometries was done using FLUENT while PSpice was used to validate the correlations of flow rate to current and hydraulic resistance to electrical resistance. This is done by characterizing hydraulic resistance of microchannels with different length to make-controlled volumetric mixing ratios at each branch. Different velocity magnitude contours and pressure profiles obtained from the channel length combinations agree well this analogy.
{"title":"Modelling of microfluidics network using electric circuits","authors":"N. Zaidon, A. Nordin, A. Ismail","doi":"10.1109/RSM.2015.7354954","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354954","url":null,"abstract":"This paper presents microfluidic network analysis using electric circuit methods by modifying the length of the channel segments that represent hydraulic resistance. It is crucial to precisely predicts flow and pressure in the channel by an accurate estimation of the hydraulic resistance of each segment, as microfluidics network become more complex and challenging. Furthermore, manipulation of channel length and size can be applied to design concentration gradient that based on repeated splitting, mixing and recombination fluid flow process, thereby producing a desired concentration profile. By using Hagen-Poiseuille's law-Ohm's law analogy, a batch of simulation 3D-microfluidic geometries was done using FLUENT while PSpice was used to validate the correlations of flow rate to current and hydraulic resistance to electrical resistance. This is done by characterizing hydraulic resistance of microchannels with different length to make-controlled volumetric mixing ratios at each branch. Different velocity magnitude contours and pressure profiles obtained from the channel length combinations agree well this analogy.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"53 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82047052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-11DOI: 10.1109/RSM.2015.7354972
T. Yaakub, J. Yunas, B. Majlis
This report presented a 2D model for electroosmotic (EOF) aqueous fluid flow analysis along nanochannels connecting two reservoirs. The model uses the Navier-Stokes equations with electroosmotic velocity boundary condition at nanochannel wall. Zeta potential of the wall surface is varied and the influences on the velocity profile are observed for various channel height. Shear stress rate near the nanochannel entrance of different width has also been investigated. The magnitude velocity lies on the magnitude of zeta potential or the surface charge of the wall. The increased charged on the solid wall, also increased the velocity flow. The decreased height of channel helps to increase the flow velocity along it. The maximum and minimum flow velocities are recorded at channel height of 50nm and 250nm respectively with 35% difference. At all simulated channel height, the flow at the entrance of nanochannel is increased and formed a peak velocity but it will decrease and become uniform at the position far from the channel wall. The shear stress at the reservoir-nanochannel edge is increased with the decreased of channel height due to low aspect ratio of reservoir-channel dimension.
{"title":"Effect of zeta potential variation in single phase flow characteristics of a rectangular nanochannel","authors":"T. Yaakub, J. Yunas, B. Majlis","doi":"10.1109/RSM.2015.7354972","DOIUrl":"https://doi.org/10.1109/RSM.2015.7354972","url":null,"abstract":"This report presented a 2D model for electroosmotic (EOF) aqueous fluid flow analysis along nanochannels connecting two reservoirs. The model uses the Navier-Stokes equations with electroosmotic velocity boundary condition at nanochannel wall. Zeta potential of the wall surface is varied and the influences on the velocity profile are observed for various channel height. Shear stress rate near the nanochannel entrance of different width has also been investigated. The magnitude velocity lies on the magnitude of zeta potential or the surface charge of the wall. The increased charged on the solid wall, also increased the velocity flow. The decreased height of channel helps to increase the flow velocity along it. The maximum and minimum flow velocities are recorded at channel height of 50nm and 250nm respectively with 35% difference. At all simulated channel height, the flow at the entrance of nanochannel is increased and formed a peak velocity but it will decrease and become uniform at the position far from the channel wall. The shear stress at the reservoir-nanochannel edge is increased with the decreased of channel height due to low aspect ratio of reservoir-channel dimension.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"115 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2015-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79099822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：