Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198986
S. Gonzalez, Edgardo Desardén-Carrero, Nicholas S. Gurule, Erick E. Aponte-Bezares
The high penetration of photovoltaic (PV) distributed energy resources (DER) facilitates the need for today’s systems to provide grid support functions and ride-through voltage and frequency events to minimize the adverse impacts on the distribution power system. These new capabilities and its requirements have created concerns that autonomous unintentional islanding (UI) algorithms are not sufficient to prevent a condition were the loss of utility is detected. Type tests in IEEE 1547-2018 have evolved to thoroughly evaluate DER capabilities and a new method includes power hardware-in-the-loop (PHIL) testing. Sandia National Laboratories is performing a detailed laboratory comparison of the tuned Resistive, Inductive, Capacitive (RLC) circuit method using discrete elements and the PHIL that applies the PV inverter equipment under test (EUT), real-time simulator, and a power amplifier. The PHIL method allows UI assessments without the need for potentially expensive, large, heat generating discrete loads.
{"title":"Unintentional Islanding Evaluation Utilizing Discrete RLC Circuit Versus Power Hardware-in-the Loop Method","authors":"S. Gonzalez, Edgardo Desardén-Carrero, Nicholas S. Gurule, Erick E. Aponte-Bezares","doi":"10.1109/PVSC40753.2019.9198986","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198986","url":null,"abstract":"The high penetration of photovoltaic (PV) distributed energy resources (DER) facilitates the need for today’s systems to provide grid support functions and ride-through voltage and frequency events to minimize the adverse impacts on the distribution power system. These new capabilities and its requirements have created concerns that autonomous unintentional islanding (UI) algorithms are not sufficient to prevent a condition were the loss of utility is detected. Type tests in IEEE 1547-2018 have evolved to thoroughly evaluate DER capabilities and a new method includes power hardware-in-the-loop (PHIL) testing. Sandia National Laboratories is performing a detailed laboratory comparison of the tuned Resistive, Inductive, Capacitive (RLC) circuit method using discrete elements and the PHIL that applies the PV inverter equipment under test (EUT), real-time simulator, and a power amplifier. The PHIL method allows UI assessments without the need for potentially expensive, large, heat generating discrete loads.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"9 1","pages":"1-8"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74671946","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198957
Amir H. Ghahremani, T. Druffel
The promising growth of Organic-inorganic perovskite solar cells (PSCs) efficiency and durability has led to development and research towards commercialization through high throughput automated manufacturing of these photovoltaic (PV) devices. Rapid thermal annealing of the deposited metal oxide layers and the photoactive layer, along with the use of additives, can potentially diminish device fabrication time and enhance device performance through improved thin film characteristics. Applying millisecond pulses of energetic light can form high-quality morphology for the transparent conductive oxide electron transport layer as well as the perovskite absorber film. It was observed that the addition of an alkyl halide, such as diiodo methane (CH2I2), to the perovskite photoactive layer could considerably improve the power conversion efficiency (PCE) of the cells through stitching the grain boundaries that act as charge recombination centers. This manuscript spans the material characterization results of the CH2I2 assisted mixed cation perovskite films through Scanning electron microscope (SEM) as well as X-ray diffraction spectroscopy (XRD) techniques. It was observed that the synergy of millisecond pulsed annealing and CH2I2 additive could enhance the PSCs photovoltaic parameters, resulting in an in crease from 6.45 % for the pristine devices to 11.34 % efficiency for the mixed cation PSC with photonic pulsed annealing when processed in the ambient with humidity of about 60%. This manuscript highlights the significance of intense pulsed light on rapid annealing of electron transport thin films as well as the impact of released halide from the alky halide to boost the quality of absorber films, which can be a potential candidate for high throughput automated fabrication of PSC PSCs.
{"title":"Realizing Perovskite Solar Cells on Roll Roll-to-Roll Compatible Processes","authors":"Amir H. Ghahremani, T. Druffel","doi":"10.1109/PVSC40753.2019.9198957","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198957","url":null,"abstract":"The promising growth of Organic-inorganic perovskite solar cells (PSCs) efficiency and durability has led to development and research towards commercialization through high throughput automated manufacturing of these photovoltaic (PV) devices. Rapid thermal annealing of the deposited metal oxide layers and the photoactive layer, along with the use of additives, can potentially diminish device fabrication time and enhance device performance through improved thin film characteristics. Applying millisecond pulses of energetic light can form high-quality morphology for the transparent conductive oxide electron transport layer as well as the perovskite absorber film. It was observed that the addition of an alkyl halide, such as diiodo methane (CH2I2), to the perovskite photoactive layer could considerably improve the power conversion efficiency (PCE) of the cells through stitching the grain boundaries that act as charge recombination centers. This manuscript spans the material characterization results of the CH2I2 assisted mixed cation perovskite films through Scanning electron microscope (SEM) as well as X-ray diffraction spectroscopy (XRD) techniques. It was observed that the synergy of millisecond pulsed annealing and CH2I2 additive could enhance the PSCs photovoltaic parameters, resulting in an in crease from 6.45 % for the pristine devices to 11.34 % efficiency for the mixed cation PSC with photonic pulsed annealing when processed in the ambient with humidity of about 60%. This manuscript highlights the significance of intense pulsed light on rapid annealing of electron transport thin films as well as the impact of released halide from the alky halide to boost the quality of absorber films, which can be a potential candidate for high throughput automated fabrication of PSC PSCs.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"114 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77698944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198951
Tao Song, T. Moriarty, D. Levi
Emerging PV technologies (e.g. Perovskite, and Quantum Dot) are commonly known to possess challenges for accurate performance measurement under the existing IEC 60904 series of standards, which were developed for conventional Si solar cells. Potential performance artifacts depending on scan rates and directions and light bias exposure history are often seen in those emerging solar cells. To avoid these artifacts and provide an unbiased and reliable efficiency measurement, NREL's Cell and Module Performance (CMP) Group has developed a steady-state performance calibration protocol - the asymptotic PMAX method. In this paper, we applied this procedure to four PV cell technologies, Si, CIGS, perovskite, and Quantum Dot (QD), and compared their performance variations between the transient and the steady-state conditions. By comparison, we found that the performance parameters ( i.e. VOC, ISC, FF, η) measured between fast I-V scans (and the asymptotic method (steady-state) change significantly for perovskite and QD cells. These changes do not happen for Si and CIGS cells. Furthermore, the statistical performance analysis on nearly 100 emerging cells received globally (including OPV, Perovskite, and QD) shows that over 70 % of the fast I-V scans have a relative performance deviation larger than 1% compared to those determined using the asymptotic PMAX scan. Given the complex dynamic behavior observed in emerging PV devices, the CMP group at NREL thus only certifies their steady steady-state performance using the Asymptotic PMAX method. We highly recommend similar steady-state performance calibration protocol for all researchers in emerging PV because accuracy in reported efficiencies is critical to the long-term success of those promising new PV technologies.
{"title":"Accurate Efficiency Measurements for Emerging PV: A Comparison of NREL's Steady-State Performance Calibration Protocol Between Conventional and Emerging PV Technologies","authors":"Tao Song, T. Moriarty, D. Levi","doi":"10.1109/PVSC40753.2019.9198951","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198951","url":null,"abstract":"Emerging PV technologies (e.g. Perovskite, and Quantum Dot) are commonly known to possess challenges for accurate performance measurement under the existing IEC 60904 series of standards, which were developed for conventional Si solar cells. Potential performance artifacts depending on scan rates and directions and light bias exposure history are often seen in those emerging solar cells. To avoid these artifacts and provide an unbiased and reliable efficiency measurement, NREL's Cell and Module Performance (CMP) Group has developed a steady-state performance calibration protocol - the asymptotic PMAX method. In this paper, we applied this procedure to four PV cell technologies, Si, CIGS, perovskite, and Quantum Dot (QD), and compared their performance variations between the transient and the steady-state conditions. By comparison, we found that the performance parameters ( i.e. VOC, ISC, FF, η) measured between fast I-V scans (and the asymptotic method (steady-state) change significantly for perovskite and QD cells. These changes do not happen for Si and CIGS cells. Furthermore, the statistical performance analysis on nearly 100 emerging cells received globally (including OPV, Perovskite, and QD) shows that over 70 % of the fast I-V scans have a relative performance deviation larger than 1% compared to those determined using the asymptotic PMAX scan. Given the complex dynamic behavior observed in emerging PV devices, the CMP group at NREL thus only certifies their steady steady-state performance using the Asymptotic PMAX method. We highly recommend similar steady-state performance calibration protocol for all researchers in emerging PV because accuracy in reported efficiencies is critical to the long-term success of those promising new PV technologies.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"25 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84131592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198972
Wei‐Chao Chen, L. Stolt, M. Edoff
Here, we specifically address device performance in ultra-thin CIGS (UT UT-CIGS) films with thickness around 500 nm by systematically implementing varying in in-depth grading of the GGI (Ga/(Ga+In)ratio). By adjusting the GGI slope, the open circuit voltage can be significantly improved, indicating a reduction of recombination in the quasiquasi-neutral region and at the back contact; the photocarrier collection efficiency over the whole absorption spectrum enhanced significantly with an aggressive GGI profile. Ultimately, a power conversion efficiency of UT-CIGS device over 12% with thickness around 500 nm by carefully applying a an appropriate GGI profile was demonstrated.
在这里，我们通过系统地实现GGI (Ga/(Ga+ in)比)的深度分级，专门研究了厚度约为500 nm的超薄CIGS (UT -CIGS)薄膜的器件性能。通过调节GGI斜率，开路电压可以显著提高，表明准中性区和背触点的复合减少;在整个吸收光谱的光载流子收集效率显著提高与侵略性的GGI剖面。最终，在厚度为500 nm左右的情况下，通过适当的GGI配置，证明了UT-CIGS器件的功率转换效率超过12%。
{"title":"Ga/(Ga + In) grading effects on ultra-thin (UT) CIGS solar cell","authors":"Wei‐Chao Chen, L. Stolt, M. Edoff","doi":"10.1109/PVSC40753.2019.9198972","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198972","url":null,"abstract":"Here, we specifically address device performance in ultra-thin CIGS (UT UT-CIGS) films with thickness around 500 nm by systematically implementing varying in in-depth grading of the GGI (Ga/(Ga+In)ratio). By adjusting the GGI slope, the open circuit voltage can be significantly improved, indicating a reduction of recombination in the quasiquasi-neutral region and at the back contact; the photocarrier collection efficiency over the whole absorption spectrum enhanced significantly with an aggressive GGI profile. Ultimately, a power conversion efficiency of UT-CIGS device over 12% with thickness around 500 nm by carefully applying a an appropriate GGI profile was demonstrated.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"32 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84149481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198991
R. Patterson, Wenhao Xu, S. Wei, M. Green, X. Hao
New semiconductors having the potential for excellent performance, scalable manufacturing and stability on a 25 year horizon are needed to enable silicon tandem solar cells. Here we explore theoretically a new class of non-toxic sulfoiodide compounds (CuxZnySyIx) has the potential to crystallize with the 4-fold coordinated “adamantine” structure. The band gaps predicted may be suitable for silicon multi-junction tandems. Initial calculations show tolerance to Cu vacancies, which do not appear to lead to deep levels in the band gap. These materials could potentially offer the “best of both worlds,” solution processability like an iodide and improved stability like a sulfide.
{"title":"Ab-initio assessment of new sulfo-iodide compounds as candidate top-cell materials for silicon-based multi-junction tandem solar cells","authors":"R. Patterson, Wenhao Xu, S. Wei, M. Green, X. Hao","doi":"10.1109/PVSC40753.2019.9198991","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198991","url":null,"abstract":"New semiconductors having the potential for excellent performance, scalable manufacturing and stability on a 25 year horizon are needed to enable silicon tandem solar cells. Here we explore theoretically a new class of non-toxic sulfoiodide compounds (CuxZnySyIx) has the potential to crystallize with the 4-fold coordinated “adamantine” structure. The band gaps predicted may be suitable for silicon multi-junction tandems. Initial calculations show tolerance to Cu vacancies, which do not appear to lead to deep levels in the band gap. These materials could potentially offer the “best of both worlds,” solution processability like an iodide and improved stability like a sulfide.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"16 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86940089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198961
Shujian Xue, A. Augusto, S. Bowden
The integration of multiple solar cells in series in a single wafer increases the output voltage, and reduces the output current. With this new concept we can power small appliances with a single wafer, and if these solar cells are integrated in a larger module the series resistance losses are mitigated. To isolate the individual cells, we space them apart in the wafer. The challenge is to optimize the spacing between cells to balance the short-circuit losses with leakages (narrow spacing). Increasing the surface recombination in the intercell region reduces the effect of leakage current, reducing the spacing between cell leading to higher current. Although initially simulations of monolithic solar cell only have less than 15% of efficiency, the new design can improve the efficiency to over 20%. The new design increased the leakage resistance between the parallel cells which decreased the leakage current to less than 10% of the original value and increase the FF from 58.9% to 79.8%.
{"title":"Sentaurus Simulation of Monolithic Solar Cells with High Open-Circuit Voltage","authors":"Shujian Xue, A. Augusto, S. Bowden","doi":"10.1109/PVSC40753.2019.9198961","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198961","url":null,"abstract":"The integration of multiple solar cells in series in a single wafer increases the output voltage, and reduces the output current. With this new concept we can power small appliances with a single wafer, and if these solar cells are integrated in a larger module the series resistance losses are mitigated. To isolate the individual cells, we space them apart in the wafer. The challenge is to optimize the spacing between cells to balance the short-circuit losses with leakages (narrow spacing). Increasing the surface recombination in the intercell region reduces the effect of leakage current, reducing the spacing between cell leading to higher current. Although initially simulations of monolithic solar cell only have less than 15% of efficiency, the new design can improve the efficiency to over 20%. The new design increased the leakage resistance between the parallel cells which decreased the leakage current to less than 10% of the original value and increase the FF from 58.9% to 79.8%.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"95 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80663424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198969
J. Hernandez-Alvidrez, A. Summers, M. Reno, J. Flicker, N. Pragallapati
Modern power grids include a variety of renewable Distributed Energy Resources (DERs) as a strategy to comply with new environmental and renewable portfolio standards (RPSs) imposed by state and federal agencies. Typically, DERs include the use of power electronic (PE) interfaces to interact with the power grid. Recently this interaction has not only been focused on supplying maximum available energy, but also on supporting the power grid under abnormal conditions such as low voltage/frequency conditions or non-unity power factor. Over the last few years, grid-following inverters (GFLIs) have proven their value while providing these ancillary grid-support services either at residential or utility scale. However, the use of grid-forming inverters (GFMIs) is gaining momentum as the penetration-level of DERs increases and system inertia decreases. Under abnormal operating conditions, GFMIs tend to better preserve grid stability due to their intrinsic ability to balance loads without the aid of coordination controls. In order to gain and propose fundamental insights into the interfacing of GFMIs to real time simulation, this paper analyzes the dynamics of two different GFMI simulation models in terms of stability and load changes using a Power Hardware-in-the-Loop (PHIL) simulation testbed.
{"title":"Simulation of Grid-Forming Inverters Dynamic Models using a Power Hardware-in-the-Loop Testbed","authors":"J. Hernandez-Alvidrez, A. Summers, M. Reno, J. Flicker, N. Pragallapati","doi":"10.1109/PVSC40753.2019.9198969","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198969","url":null,"abstract":"Modern power grids include a variety of renewable Distributed Energy Resources (DERs) as a strategy to comply with new environmental and renewable portfolio standards (RPSs) imposed by state and federal agencies. Typically, DERs include the use of power electronic (PE) interfaces to interact with the power grid. Recently this interaction has not only been focused on supplying maximum available energy, but also on supporting the power grid under abnormal conditions such as low voltage/frequency conditions or non-unity power factor. Over the last few years, grid-following inverters (GFLIs) have proven their value while providing these ancillary grid-support services either at residential or utility scale. However, the use of grid-forming inverters (GFMIs) is gaining momentum as the penetration-level of DERs increases and system inertia decreases. Under abnormal operating conditions, GFMIs tend to better preserve grid stability due to their intrinsic ability to balance loads without the aid of coordination controls. In order to gain and propose fundamental insights into the interfacing of GFMIs to real time simulation, this paper analyzes the dynamics of two different GFMI simulation models in terms of stability and load changes using a Power Hardware-in-the-Loop (PHIL) simulation testbed.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"29 1","pages":"1-8"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90725751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198950
Ryan M. Francea, John F. Geisza, M. Steinera, K. Schultea, Iván Garcíab, Waldo Olavarriaa, M. Younga, Daniel J. Friedmana
We show 6-junction inverted metamorphic solar cells with high efficiencies under both the global and direct spectrum, and discuss improvements to device components. High voltage AlGaInP subcells are demonstrated on GaAs substrates miscut 2° towards (111)B by using Sb surfactant to reduce atomic ordering. This miscut enables high voltage and low dislocation density GaInAs subcells by using atomically-ordered GaInP-based graded buffers. One-sun efficiencies of 39.2 ± 1.3% under the global spectrum and 39.4 ± 1.1% direct spectrum have been demonstrated by using these high voltage subcell components. For high efficiency under the concentrated direct spectrum, low resistance is also necessary, which requires a challenging and nonintuitive optimization of tunnel junctions and heterobarriers. Increasing the thickness of a (Al)GaInAs spacer layer between the back surface fields (BSF) and tunnel junctions (TJ) of latticemismatched subcells reduces nonlinear resistance, which implies a detrimental interaction between the BSF and TJ. Concentrator devices with optimized spacer layers show reduced effective resistance and maintain fill factor ≫ 75% at 1100 suns. Device efficiencies under the concentrated direct spectrum peak at 47.1 ± 3.2% at 143 suns.
{"title":"High efficiency 6-junction solar cells for the global and direct spectra","authors":"Ryan M. Francea, John F. Geisza, M. Steinera, K. Schultea, Iván Garcíab, Waldo Olavarriaa, M. Younga, Daniel J. Friedmana","doi":"10.1109/PVSC40753.2019.9198950","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198950","url":null,"abstract":"We show 6-junction inverted metamorphic solar cells with high efficiencies under both the global and direct spectrum, and discuss improvements to device components. High voltage AlGaInP subcells are demonstrated on GaAs substrates miscut 2° towards (111)B by using Sb surfactant to reduce atomic ordering. This miscut enables high voltage and low dislocation density GaInAs subcells by using atomically-ordered GaInP-based graded buffers. One-sun efficiencies of 39.2 ± 1.3% under the global spectrum and 39.4 ± 1.1% direct spectrum have been demonstrated by using these high voltage subcell components. For high efficiency under the concentrated direct spectrum, low resistance is also necessary, which requires a challenging and nonintuitive optimization of tunnel junctions and heterobarriers. Increasing the thickness of a (Al)GaInAs spacer layer between the back surface fields (BSF) and tunnel junctions (TJ) of latticemismatched subcells reduces nonlinear resistance, which implies a detrimental interaction between the BSF and TJ. Concentrator devices with optimized spacer layers show reduced effective resistance and maintain fill factor ≫ 75% at 1100 suns. Device efficiencies under the concentrated direct spectrum peak at 47.1 ± 3.2% at 143 suns.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"92 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73405607","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198974
Martin Waters, C. Deline, J. Kemnitz, J. Webber
Capacity tests such as those described in ASTM 2848 and IEC 61724-2 are widely used during the contracting and acceptance testing of photovoltaic systems. With the increasing deployment of bifacial photovoltaic modules, there is a need to develop a standardized approach to capacity test these systems. Although variability and bias error were inherently higher for the measured capacity of bifacial systems, they could be reduced to a level consistent with the monofacial reference system by appropriate incorporation of rear irradiance—either measured or modeled. Three field installations provided bifacial system capacity that was measured with a mean bias error and standard deviation within 1% over the 2–10-month observation period. Capacity test accuracy could be improved further by using the measured back-of-module temperature and the IEC 61724-2 test method for well curated systems.
{"title":"Suggested Modifications for Bifacial Capacity Testing","authors":"Martin Waters, C. Deline, J. Kemnitz, J. Webber","doi":"10.1109/PVSC40753.2019.9198974","DOIUrl":"https://doi.org/10.1109/PVSC40753.2019.9198974","url":null,"abstract":"Capacity tests such as those described in ASTM 2848 and IEC 61724-2 are widely used during the contracting and acceptance testing of photovoltaic systems. With the increasing deployment of bifacial photovoltaic modules, there is a need to develop a standardized approach to capacity test these systems. Although variability and bias error were inherently higher for the measured capacity of bifacial systems, they could be reduced to a level consistent with the monofacial reference system by appropriate incorporation of rear irradiance—either measured or modeled. Three field installations provided bifacial system capacity that was measured with a mean bias error and standard deviation within 1% over the 2–10-month observation period. Capacity test accuracy could be improved further by using the measured back-of-module temperature and the IEC 61724-2 test method for well curated systems.","PeriodicalId":6749,"journal":{"name":"2019 IEEE 46th Photovoltaic Specialists Conference (PVSC)","volume":"43 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2019-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85276827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-06-16DOI: 10.1109/PVSC40753.2019.9198968
H. Seigneur, E. Schneller, Jason Lincoln, Hossein Ebrahimi, Hossein Ebrahimi, A. Gabor, M. Rowell, Victor Victor Huayamave
A single brief exposure of a photovoltaic (PV) module or coupon to cold temperatures down to -40°C, the lower limit in IEC photovoltaic testing standards, significantly degrades the fracture strength of silicon solar cells. To understand the mechanism behind the fracture strength degradation, we built a finite element model of a single cell encapsulated coupon and reduced the temperature isothermally from 25°C to -40°C and from 150°C to -40°C. Our modeling results confirm that the regions next to the interconnect wires see high stresses. The silicon wafer bends around the top wire towards the glass; whereas, the entire coupon curves in the opposite direction. The first-principle stress in the entire silicon wafer was found to be compressive, mostly in plane in the direction perpendicular to the wires, yet unable to cause a failure due to the much larger compressive strength of silicon. On the other hand, out-of-plane shear stresses on each side of the ribbons were observed to exceed considerably the shear strength of silicon, most likely causing the formation of microcracks. These microcracks that form during cooling can later propagate into full cracks at relatively low front side loads that place the cells into tensile stress. We also investigated whether the silicon cell may be buckling due to high compressive stresses due to the backsheet and encapsulant shrinkage. Index Terms— Cooling, Failure analysis, Numerical models, Photovoltaic cells, Solar Panels, Surface cracks, Thermal analysis, Thermal expansion, Thermal stresses.
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