Pub Date : 2024-07-12DOI: 10.1109/TBCAS.2024.3427396
Hyun-Su Lee, Hyung-Min Lee
This paper proposes an envelope-detector-less (EDL) amplitude-shift-keying (ASK) forward telemetry (FT) demodulator for wireless power/data transfer (WPDT) systems. The EDL ASK FT demodulator can substitute bulky and power-hungry components, which are an envelope detector and an analog comparator in the conventional ASK FT demodulator, with a digital controller, reducing both power dissipation and chip area. The proposed demodulator shares the gate control signals of pass transistors, which are used in an ac-dc regulator for wireless power reception, to maintain a constant load voltage while efficiently demodulating the forward telemetry data. Also, a proposed digital cleaner in the EDL demodulator refines this control signal into a wide pulse without suffering from resonant frequency noise, while a synchronizer can align its frequency with the data rate and resonant frequency. The 0.25-μm CMOS prototype chip of the proposed power-path-less EDL ASK FT demodulator, equipped with the ac-dc regulator, demonstrates a significant 38.2% reduction in power dissipation compared to the conventional ASK FT demodulator. Moreover, the EDL ASK FT demodulator occupies only 0.023-mm2 silicon area and achieves a low bit error rate (BER) less than 10-4 while maintaining a regulated voltage of 4.5 V on the load.
本文提出了一种用于无线功率/数据传输(WPDT)系统的无包络探测器(EDL)振幅偏移键控(ASK)前向遥测(FT)解调器。EDL ASK FT 解调器可以用数字控制器替代传统 ASK FT 解调器中的包络检测器和模拟比较器等体积庞大、功耗高的元件,从而减少功耗和芯片面积。拟议的解调器共享用于无线功率接收交流-直流稳压器的通路晶体管的栅极控制信号,以便在有效解调前向遥测数据的同时保持恒定的负载电压。此外,EDL 解调器中的数字清零器可将该控制信号细化为宽脉冲,而不会受到谐振频率噪声的影响,同时同步器可使其频率与数据速率和谐振频率保持一致。与传统的 ASK FT 解调器相比,配备交流-直流稳压器的无功率路径 EDL ASK FT 解调器 0.25μm CMOS 原型芯片的功耗大幅降低了 38.2%。此外,EDL ASK FT 解调器仅占 0.023 平方毫米的硅面积,误码率 (BER) 低于 10-4,同时负载上的稳压电压保持在 4.5 V。
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Pub Date : 2024-07-11DOI: 10.1109/TBCAS.2024.3425858
Junjun Huan, Vida Pashaei, Steve J A Majerus, Swarup Bhunia, Soumyajit Mandal
Low-intensity focused ultrasound (FUS) is an emerging non-invasive and spatially/temporally precise method for modulating the firing rates and patterns of peripheral nerves. This paper describes an image-guided platform for chronic and patient-specific FUS neuromodulation. The system uses custom wearable probes containing separate ultrasound imaging and modulation transducer arrays realized using piezoelectric transducers assembled on a flexible printed circuit board (PCB). Dual-mode probes operating around 4 MHz (imaging) and 1.3 MHz (modulation) were fabricated and tested on tissue phantoms. The resulting B-mode images were analyzed using a template-matching algorithm to estimate the location of the target nerve and then direct the modulation beam toward the target. The ultrasound transmit voltage used to excite the modulation array was optimized in real-time by automatically regulating functional feedback signals (the average rates of emulated muscle twitches detected by an on-board motion sensor) through a proportional and integral (PI) controller, thus providing robustness to inter-subject variability and probe positioning errors. The proposed closed-loop neuromodulation paradigm was experimentally demonstrated in vitro using an active tissue phantom that integrates models of the posterior tibial nerve and nearby blood vessels together with embedded sensors and actuators.
低强度聚焦超声(FUS)是一种新兴的非侵入性、空间/时间精确调节周围神经发射率和模式的方法。本文介绍了一种用于慢性和特定患者 FUS 神经调控的图像引导平台。该系统使用定制的可穿戴探头,其中包含独立的超声成像和调制换能器阵列,这些阵列使用组装在柔性印刷电路板(PCB)上的压电换能器实现。双模探头的工作频率分别为 4 MHz(成像)和 1.3 MHz(调制),已制作完成并在组织模型上进行了测试。利用模板匹配算法对生成的 B 型图像进行分析,以估计靶神经的位置,然后将调制束导向靶点。用于激励调制阵列的超声波发射电压通过一个比例和积分(PI)控制器自动调节功能反馈信号(由板载运动传感器检测到的模拟肌肉抽搐的平均速率)进行实时优化,从而提供对受试者间变异性和探头定位误差的鲁棒性。所提出的闭环神经调控范例在体外实验中得到了验证,该范例使用了一个主动组织模型,该模型将胫后神经和附近血管的模型与嵌入式传感器和致动器集成在一起。
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Pub Date : 2024-07-10DOI: 10.1109/TBCAS.2024.3407794
Jun Wang, Ren Liu, Youngbin Tchoe, Alessio Paolo Buccino, Akshay Paul, Deborah Pre, Agnieszka D'Antonio-Chronowska, Frazer A Kelly, Anne G Bang, Chul Kim, Shadi Dayeh, Gert Cauwenberghs
Intracellular electrophysiology, a vital and versatile technique in cellular neuroscience, is typically conducted using the patch-clamp method. Despite its effectiveness, this method poses challenges due to its complexity and low throughput. The pursuit of multi-channel parallel neural intracellular recording has been a long-standing goal, yet achieving reliable and consistent scaling has been elusive because of several technological barriers. In this work, we introduce a micropower integrated circuit, optimized for scalable, high-throughput in vitro intrinsically intracellular electrophysiology. This system is capable of simultaneous recording and stimulation, implementing all essential functions such as signal amplification, acquisition, and control, with a direct interface to electrodes integrated on the chip. The electrophysiology system-on-chip (eSoC), fabricated in 180nm CMOS, measures 2.236 mm × 2.236 mm. It contains four 8 × 8 arrays of nanowire electrodes, each with a 50 μm pitch, placed over the top-metal layer on the chip surface, totaling 256 channels. Each channel has a power consumption of 0.47 μW, suitable for current stimulation and voltage recording, and covers 80 dB adjustable range at a sampling rate of 25 kHz. Experimental recordings with the eSoC from cultured neurons in vitro validate its functionality in accurately resolving chemically induced multi-unit intracellular electrical activity.
{"title":"Low-Power Fully Integrated 256-Channel Nanowire Electrode-on-Chip Neural Interface for Intracellular Electrophysiology.","authors":"Jun Wang, Ren Liu, Youngbin Tchoe, Alessio Paolo Buccino, Akshay Paul, Deborah Pre, Agnieszka D'Antonio-Chronowska, Frazer A Kelly, Anne G Bang, Chul Kim, Shadi Dayeh, Gert Cauwenberghs","doi":"10.1109/TBCAS.2024.3407794","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3407794","url":null,"abstract":"<p><p>Intracellular electrophysiology, a vital and versatile technique in cellular neuroscience, is typically conducted using the patch-clamp method. Despite its effectiveness, this method poses challenges due to its complexity and low throughput. The pursuit of multi-channel parallel neural intracellular recording has been a long-standing goal, yet achieving reliable and consistent scaling has been elusive because of several technological barriers. In this work, we introduce a micropower integrated circuit, optimized for scalable, high-throughput in vitro intrinsically intracellular electrophysiology. This system is capable of simultaneous recording and stimulation, implementing all essential functions such as signal amplification, acquisition, and control, with a direct interface to electrodes integrated on the chip. The electrophysiology system-on-chip (eSoC), fabricated in 180nm CMOS, measures 2.236 mm × 2.236 mm. It contains four 8 × 8 arrays of nanowire electrodes, each with a 50 μm pitch, placed over the top-metal layer on the chip surface, totaling 256 channels. Each channel has a power consumption of 0.47 μW, suitable for current stimulation and voltage recording, and covers 80 dB adjustable range at a sampling rate of 25 kHz. Experimental recordings with the eSoC from cultured neurons in vitro validate its functionality in accurately resolving chemically induced multi-unit intracellular electrical activity.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141581899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-04DOI: 10.1109/TBCAS.2024.3422282
Miguel Lima Teixeira;João P. Oliveira;José C. Príncipe;João Goes
Continuous-time asynchronous data converters namely, analog-to-digital converters and analog-to-time converters, can be beneficial for certain types of applications, such as, processing of biological signals with sparse information. A particular case of these converters is the integrate-and-fire converter (IFC) that is inspired by the neural system. If it is possible to develop a standard-cell-based (SCB) IFC circuit to perform well in advanced technology nodes, it will benefit from the simplicity of SCB circuit designs and can be implemented in widely available field-programmable gate arrays (FPGAs). This way, this paper proposes two IFC circuits designed and prototyped in a 130 nm CMOS standard process. The first is a novel SCB open-loop dynamic IFC. The latter, is a closed-loop analog IFC with conventional blocks. This paper presents a through comparison between the two IFC circuits. They have a power dissipation of 59 $boldsymbol{mu}$