Pub Date : 2025-12-10DOI: 10.1109/TBCAS.2025.3642345
Hyunjoong Kim, Sanghyeon Cho, Myeong Woo Kim, Chan Sam Park, Kwangmuk Lee, Solwoong Song, Dae Sik Keum, Sangmoon Lee, Hoon Eui Jeong, Dong Pyo Jang, Jae Joon Kim
A behind-the-ear (BTE) integrated interface for mental healthcare applications is presented, featuring optimized BTE electrode configurations and wide multimodal biomedical IC with adaptive compensation capabilities. The proposed IC supports 8 bio-potential (ExG), 1 photoplethysmogram (PPG), 1 galvanic skin response (GSR), 1 bio-impedance (BioZ), and 2 stimulation channels. The ExG channel achieves 2.5GΩ input impedance, boosted by 308 times with offset compensated auxiliary path (OCAP) architecture, and its AC input impedancecharacteristic is boosted further by dual resolution external positive feedback loop (DR-EPFL) scheme. An area and energy-efficient GSR-embedded ECG recording scheme is presented. For comprehensive multimodal sensing features, dual-slope PPG channel with parasitic capacitance compensation, electrode-tissue impedance adaptive stimulator, and high dynamic range BioZ channel are integrated. The IC was fabricated in a 0.18-μm BCD process and integrated into a BTE patch-type device prototype. System-level feasibility was experimentally verified through in-vivo stress measurements with virtual reality (VR) environment, demonstrating effective mental health monitoring capabilities.
{"title":"A Behind-The-Ear Patch-Type Mental Healthcare Integrated Interface with Adaptive Multimodal Offset Compensation and Parasitic Cancellation.","authors":"Hyunjoong Kim, Sanghyeon Cho, Myeong Woo Kim, Chan Sam Park, Kwangmuk Lee, Solwoong Song, Dae Sik Keum, Sangmoon Lee, Hoon Eui Jeong, Dong Pyo Jang, Jae Joon Kim","doi":"10.1109/TBCAS.2025.3642345","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3642345","url":null,"abstract":"<p><p>A behind-the-ear (BTE) integrated interface for mental healthcare applications is presented, featuring optimized BTE electrode configurations and wide multimodal biomedical IC with adaptive compensation capabilities. The proposed IC supports 8 bio-potential (ExG), 1 photoplethysmogram (PPG), 1 galvanic skin response (GSR), 1 bio-impedance (BioZ), and 2 stimulation channels. The ExG channel achieves 2.5GΩ input impedance, boosted by 308 times with offset compensated auxiliary path (OCAP) architecture, and its AC input impedancecharacteristic is boosted further by dual resolution external positive feedback loop (DR-EPFL) scheme. An area and energy-efficient GSR-embedded ECG recording scheme is presented. For comprehensive multimodal sensing features, dual-slope PPG channel with parasitic capacitance compensation, electrode-tissue impedance adaptive stimulator, and high dynamic range BioZ channel are integrated. The IC was fabricated in a 0.18-μm BCD process and integrated into a BTE patch-type device prototype. System-level feasibility was experimentally verified through in-vivo stress measurements with virtual reality (VR) environment, demonstrating effective mental health monitoring capabilities.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145727785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-09DOI: 10.1109/TBCAS.2025.3641977
Ali Ameri, Ali M Niknejad
This paper presents an injection-locked voltage-controlled oscillator-based sensing platform capable of detecting and characterizing single mammalian cells at 114GHz. The sensor is equipped with on-chip Dielectrophoresis (DEP) force generators that focus and align the sample with the sensor, maximizing the sensitivity and repeatability of the measurements. The chip, fabricated in a bulk 28nm CMOS technology, is packaged with microfluidics using a single-mask lithography technique that enables continuous sample delivery, measurement, and removal. The platform is demonstrated in differentiating various materials, three cell lines (HeLa GFP, HCT-116, SK-MEL-28), and, most importantly, the growth and mitotic states of a single cell line. These unique capabilities establish a foundation for streamlining cell-based assays and enabling real-time monitoring of drug-cell interactions.
{"title":"Mm-Wave CMOS Biosensor with Integrated Dielectrophoresis for Single-Cell Detection and Characterization.","authors":"Ali Ameri, Ali M Niknejad","doi":"10.1109/TBCAS.2025.3641977","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3641977","url":null,"abstract":"<p><p>This paper presents an injection-locked voltage-controlled oscillator-based sensing platform capable of detecting and characterizing single mammalian cells at 114GHz. The sensor is equipped with on-chip Dielectrophoresis (DEP) force generators that focus and align the sample with the sensor, maximizing the sensitivity and repeatability of the measurements. The chip, fabricated in a bulk 28nm CMOS technology, is packaged with microfluidics using a single-mask lithography technique that enables continuous sample delivery, measurement, and removal. The platform is demonstrated in differentiating various materials, three cell lines (HeLa GFP, HCT-116, SK-MEL-28), and, most importantly, the growth and mitotic states of a single cell line. These unique capabilities establish a foundation for streamlining cell-based assays and enabling real-time monitoring of drug-cell interactions.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145717136","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-05DOI: 10.1109/TBCAS.2025.3625580
Rahul Lall;Youngho Seo;Ali M. Niknejad;Mekhail Anwar
Surgical tumor resection aims to remove all cancer cells in the tumor margin and at centimeter-scale depths below the tissue surface. During surgery, microscopic clusters of disease are intraoperatively difficult to visualize and are often left behind, significantly increasing the risk of cancer recurrence. Radioguided surgery (RGS) has shown the ability to selectively tag cancer cells with gamma (γ) photon emitting radioisotopes to identify them, but require a mm-scale γ photon spectrometer to localize the position of these cells in the tissue margin (i.e., a function of incident γ photon energy) with high specificity. Here we present a 9.9 mm2 integrated circuit (IC)-based γ spectrometer implemented in 180 nm CMOS, to enable the measurement of single γ photons and their incident energy with sub-keV energy resolution. We use small $2 times 2$ µm reverse-biased diodes that have low depletion region capacitance, and therefore produce millivolt-scale voltage signals in response to the small charge generated by incident γ photons. A low-power energy spectrometry method is implemented by measuring the decay time it takes for the generated voltage signal to settle back to DC after a γ detection event, instead of measuring the voltage drop directly. This spectrometry method is implemented in three different pixel architectures that allow for configurable pixel sensitivity, energy-resolution, and energy dynamic range based on the widely heterogenous surgical and patient presentation in RGS. The spectrometer was tested with three common γ-emitting radioisotopes (64Cu, 133Ba, 177Lu), and is able to resolve activities down to 1 µCi with sub-keV energy resolution and 1.315 MeV energy dynamic range, using 5-minute acquisitions.
{"title":"Configurable γ Photon Spectrometer to Enable Precision Radioguided Tumor Resection","authors":"Rahul Lall;Youngho Seo;Ali M. Niknejad;Mekhail Anwar","doi":"10.1109/TBCAS.2025.3625580","DOIUrl":"10.1109/TBCAS.2025.3625580","url":null,"abstract":"Surgical tumor resection aims to remove all cancer cells in the tumor margin and at centimeter-scale depths below the tissue surface. During surgery, microscopic clusters of disease are intraoperatively difficult to visualize and are often left behind, significantly increasing the risk of cancer recurrence. Radioguided surgery (RGS) has shown the ability to selectively tag cancer cells with gamma (γ) photon emitting radioisotopes to identify them, but require a mm-scale γ photon spectrometer to localize the position of these cells in the tissue margin (i.e., a function of incident γ photon energy) with high specificity. Here we present a 9.9 mm<sup>2</sup> integrated circuit (IC)-based γ spectrometer implemented in 180 nm CMOS, to enable the measurement of single γ photons and their incident energy with sub-keV energy resolution. We use small <inline-formula><tex-math>$2 times 2$</tex-math></inline-formula> µm reverse-biased diodes that have low depletion region capacitance, and therefore produce millivolt-scale voltage signals in response to the small charge generated by incident γ photons. A low-power energy spectrometry method is implemented by measuring the decay time it takes for the generated voltage signal to settle back to DC after a γ detection event, instead of measuring the voltage drop directly. This spectrometry method is implemented in three different pixel architectures that allow for configurable pixel sensitivity, energy-resolution, and energy dynamic range based on the widely heterogenous surgical and patient presentation in RGS. The spectrometer was tested with three common γ-emitting radioisotopes (<sup>64</sup>Cu, <sup>133</sup>Ba, <sup>177</sup>Lu), and is able to resolve activities down to 1 µCi with sub-keV energy resolution and 1.315 MeV energy dynamic range, using 5-minute acquisitions.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 6","pages":"1048-1064"},"PeriodicalIF":4.9,"publicationDate":"2025-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145688770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
TThis article presents the first co-designed MRI imaging and magnetic positioning system for real-time dynamic motion compensation, achieving sub-millimeter tracking accuracy while preserving diagnostic image quality. The core innovation lies in a system-level co-design of an MRI imaging system and a magnetic localization system, featuring a customized receiver IC for processing magnetic signals coupled by the frontend RF coils, enabling artifact-free MRI imaging in dynamic scenarios. This integration enables a median positioning accuracy of 0.66 mm across a 40×40×50 cm³ field-of-view with a total power consumption of 997 $μ$W. The key innovations include: 1) a time-division multiplexing scheme to enable signal detection from different coils while achieving spectral isolation between 1.4 MHz positioning signals and MRI Larmor frequencies through FPGA-synchronized blanking; 2) a dynamic calibration algorithm fusing magnetic tracking data with multi-frame MRI imaging, reducing spatial blur radius by 40% via weighted averaging; 3) an MRI-optimized Levenberg-Marquardt algorithm incorporating dynamic magnetic beacon weighting and spatial constraints, improving localization accuracy by 53% versus conventional algorithm. The system utilizes planar magnetic beacons with a dimension of 3×3 cm², reducing spatial occupancy compared to prior designs. This work bridges critical gaps between high-precision tracking and artifact-free MRI, enabling real-time imaging of non-autonomous motion and respiratory motion compensation, representing a paradigm shift for MRI-guided interventions.
{"title":"Magnetic Positioning System with CMOS Receiver for Calibrating Motion Artifacts During MRI Experiments.","authors":"Boyang Cao, Qi Zhou, Shuhao Fan, Rui Martins, Pui-In Mak, Ka-Meng Lei","doi":"10.1109/TBCAS.2025.3639358","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3639358","url":null,"abstract":"<p><p>TThis article presents the first co-designed MRI imaging and magnetic positioning system for real-time dynamic motion compensation, achieving sub-millimeter tracking accuracy while preserving diagnostic image quality. The core innovation lies in a system-level co-design of an MRI imaging system and a magnetic localization system, featuring a customized receiver IC for processing magnetic signals coupled by the frontend RF coils, enabling artifact-free MRI imaging in dynamic scenarios. This integration enables a median positioning accuracy of 0.66 mm across a 40×40×50 cm<sup>³</sup> field-of-view with a total power consumption of 997 $μ$W. The key innovations include: 1) a time-division multiplexing scheme to enable signal detection from different coils while achieving spectral isolation between 1.4 MHz positioning signals and MRI Larmor frequencies through FPGA-synchronized blanking; 2) a dynamic calibration algorithm fusing magnetic tracking data with multi-frame MRI imaging, reducing spatial blur radius by 40% via weighted averaging; 3) an MRI-optimized Levenberg-Marquardt algorithm incorporating dynamic magnetic beacon weighting and spatial constraints, improving localization accuracy by 53% versus conventional algorithm. The system utilizes planar magnetic beacons with a dimension of 3×3 cm<sup>²</sup>, reducing spatial occupancy compared to prior designs. This work bridges critical gaps between high-precision tracking and artifact-free MRI, enabling real-time imaging of non-autonomous motion and respiratory motion compensation, representing a paradigm shift for MRI-guided interventions.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145673364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-02DOI: 10.1109/TBCAS.2025.3639063
Christopher Santos, Dong-Hwi Choi, Sohmyung Ha, Minkyu Je
This paper presents a 64-channel time-domain multiplexed (TDM) neural recording IC that achieves a high total input impedance (T-ZIN) for direct interfacing with a time-multiplexed microelectrode array (MEA). Unlike conventional IC-side multiplexing implementations, the proposed system performs multiplexing at the electrode side, creating a shared external parasitic path across channels and allows the dual positive feedback loop (DPFL) to use shared feedback capacitors and a single calibration code. The DPFL cancels both internal and external parasitics, thereby boosting T-ZIN. Thus, the proposed scheme eliminates parasitic mismatch and improves scalability and T-ZIN than prior works. Fabricated in a 180 nm CMOS process, the system implements 8 to 1 multiplexing per analog front end, achieves 3.3 GΩ T-ZIN at 10 Hz with 3 pF added external capacitance, and demonstrates saline-based spike recording with 6.66 $μ$VRMS input referred noise over 1 Hz to 10 kHz, while consuming 8.87 $μ$W per channel and 0.0619 mm2 per channel.
{"title":"A Neural Recording IC for 64-Channel Time-Multiplexed MEA with 3.3-GΩ Total Input Impedance Using Dual Positive Feedback Loop Z<sub>IN</sub>-Boosting.","authors":"Christopher Santos, Dong-Hwi Choi, Sohmyung Ha, Minkyu Je","doi":"10.1109/TBCAS.2025.3639063","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3639063","url":null,"abstract":"<p><p>This paper presents a 64-channel time-domain multiplexed (TDM) neural recording IC that achieves a high total input impedance (T-Z<sub>IN</sub>) for direct interfacing with a time-multiplexed microelectrode array (MEA). Unlike conventional IC-side multiplexing implementations, the proposed system performs multiplexing at the electrode side, creating a shared external parasitic path across channels and allows the dual positive feedback loop (DPFL) to use shared feedback capacitors and a single calibration code. The DPFL cancels both internal and external parasitics, thereby boosting T-Z<sub>IN</sub>. Thus, the proposed scheme eliminates parasitic mismatch and improves scalability and T-Z<sub>IN</sub> than prior works. Fabricated in a 180 nm CMOS process, the system implements 8 to 1 multiplexing per analog front end, achieves 3.3 GΩ T-Z<sub>IN</sub> at 10 Hz with 3 pF added external capacitance, and demonstrates saline-based spike recording with 6.66 $μ$V<sub>RMS</sub> input referred noise over 1 Hz to 10 kHz, while consuming 8.87 $μ$W per channel and 0.0619 mm<sup>2</sup> per channel.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145663023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-24DOI: 10.1109/TBCAS.2025.3635731
Yili Shen, Changgui Yang, Weixiao Wang, Yunshan Zhang, Chaonan Yu, Kedi Xu, Gang Pan, Bo Zhao
Minimally invasive wireless implants distributed in the nervous system can transfer various neural signals to an external device, offering an effective hardware tool for neuro-disorder monitoring. Battery-free wireless techniques based on wireless power transfer (WPT) have been adopted to minimize the neural implants, but the effective reading ranges of most conventional works are not long enough to access deep-tissue nerves. The existing ultrasonic coupling and binary-driven passive body-channel-communication (BCC) techniques extended the reading range but suffered from a low data rate and a high energy in wireless communication. In this work, we demonstrate a battery-free wireless neural implant based on the proposed pulse-width-modulation (PWM) passive-BCC technique, which improves the data rate and further reduces the energy per bit. The proposed technique is implemented in a neural-recording chip fabricated by a 65nm CMOS process. Measured results show that the proposed wireless neural implant achieves a battery-free reading range of 6cm, with an energy efficiency of 36.2pJ/bit. In-vivo experiment is performed in a Sprague-Dawley rat to record the neural signals wirelessly in a battery-free way.
{"title":"A Battery-Free Neural Implant Achieving 6cm Reading Range and 36.2pJ/bit Efficiency by PWM Passive Body-Channel Communication.","authors":"Yili Shen, Changgui Yang, Weixiao Wang, Yunshan Zhang, Chaonan Yu, Kedi Xu, Gang Pan, Bo Zhao","doi":"10.1109/TBCAS.2025.3635731","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3635731","url":null,"abstract":"<p><p>Minimally invasive wireless implants distributed in the nervous system can transfer various neural signals to an external device, offering an effective hardware tool for neuro-disorder monitoring. Battery-free wireless techniques based on wireless power transfer (WPT) have been adopted to minimize the neural implants, but the effective reading ranges of most conventional works are not long enough to access deep-tissue nerves. The existing ultrasonic coupling and binary-driven passive body-channel-communication (BCC) techniques extended the reading range but suffered from a low data rate and a high energy in wireless communication. In this work, we demonstrate a battery-free wireless neural implant based on the proposed pulse-width-modulation (PWM) passive-BCC technique, which improves the data rate and further reduces the energy per bit. The proposed technique is implemented in a neural-recording chip fabricated by a 65nm CMOS process. Measured results show that the proposed wireless neural implant achieves a battery-free reading range of 6cm, with an energy efficiency of 36.2pJ/bit. In-vivo experiment is performed in a Sprague-Dawley rat to record the neural signals wirelessly in a battery-free way.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145598440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The liquid state machine (LSM), a reservoir computing variant of spiking neural networks (SNNs), has been widely adopted for its low training complexity. In this work, we propose C2-LSM, a neuromorphic processor designed through algorithm-hardware co-design to achieve high accuracy across diverse tasks. At the algorithm level, inspired by the "small-world" structure of the biological brain, we introduce a novel reservoir layer in which neurons are interconnected using a cubecluster topology. For hardware implementation, the customized C2-LSM processor supports runtime configurability of reservoir size and connection sparsity, enabling high classification accuracy across a range of spatiotemporal tasks. Additionally, a Network-on-Chip (NoC) with a Storm routing algorithm is developed to improve the spike event transmission throughput among reservoir neurons. C2-LSM is implemented on an AMD Virtex UltraScale+ VCU129 FPGA running at 250 MHz. With on-chip learning, it achieves accuracies of 98.02%, 94.26%, and 93.00% on MNIST, N-MNIST, and FSDD datasets, respectively, outperforming recently benchmarked LSM neuromorphic processors across all three tasks. For the MNIST task, it achieves an inference speed of 1155 FPS and a learning speed of 1154 FPS, along with a high power efficiency of 103 GSOPS/W.
{"title":"C2-LSM: A Storm-NoC Based Neuromorphic Processor for High-Accuracy Liquid State Machine with Cube-Cluster Topology.","authors":"Enyi Yao, Zhibin Luo, Zongfan Wu, Dong Jiang, Xin Wu, Yongkui Yang","doi":"10.1109/TBCAS.2025.3635611","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3635611","url":null,"abstract":"<p><p>The liquid state machine (LSM), a reservoir computing variant of spiking neural networks (SNNs), has been widely adopted for its low training complexity. In this work, we propose C2-LSM, a neuromorphic processor designed through algorithm-hardware co-design to achieve high accuracy across diverse tasks. At the algorithm level, inspired by the \"small-world\" structure of the biological brain, we introduce a novel reservoir layer in which neurons are interconnected using a cubecluster topology. For hardware implementation, the customized C2-LSM processor supports runtime configurability of reservoir size and connection sparsity, enabling high classification accuracy across a range of spatiotemporal tasks. Additionally, a Network-on-Chip (NoC) with a Storm routing algorithm is developed to improve the spike event transmission throughput among reservoir neurons. C2-LSM is implemented on an AMD Virtex UltraScale+ VCU129 FPGA running at 250 MHz. With on-chip learning, it achieves accuracies of 98.02%, 94.26%, and 93.00% on MNIST, N-MNIST, and FSDD datasets, respectively, outperforming recently benchmarked LSM neuromorphic processors across all three tasks. For the MNIST task, it achieves an inference speed of 1155 FPS and a learning speed of 1154 FPS, along with a high power efficiency of 103 GSOPS/W.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145598456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-20DOI: 10.1109/TBCAS.2025.3634251
Cheng-Jung Tsai, Kea-Tiong Tang
In this work, a biphasic and bipolar current-controlled stimulator with high loading adaptability is proposed. The stimulator consisted of an on-chip high voltage generator, output driver and an 8-bit current DAC (Digital-to-Analog Converter), can constantly provide the required stimulus currents ranging from 0.1mA to a maximum of 20mA, as the loading impedance varied within 0.5kΩ - 5kΩ. With a nearly 12 V output voltage, the overstress and reliability issues of the circuits are thoroughly considered and carefully addressed in this work. To achieve high loading impedance adaptability, this paper proposes a novel PAM (Pulse Amplitude Modulation) loop control architecture to drive the charge pump (CP), which provides a significantly higher output dynamic range compared to conventional methods such as PFM (Pulse Frequency Modulation) and PSM (Pulse Skip Modulation). In addition, to further improve the Power Conversion Efficiency (PCE) of the high voltage generator, a new technique, PAM-based Dual-Domain Voltage Scaling (PAM-DDVS), is proposed to minimize unnecessary energy consumption while achieving high adaptive range. The fully-integrated stimulus chip with 2 output channels is fabricated in TSMC 0.18μm 1.8V/3.3V process, and occupies a core die area of approximately 1.6 mm2. Imitation tests are conducted to validate the functionality of the stimulus chip.
{"title":"A Neurostimulator for Deep Brain Stimulation with Wide Load Current and Impedance Adaptation Capability.","authors":"Cheng-Jung Tsai, Kea-Tiong Tang","doi":"10.1109/TBCAS.2025.3634251","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3634251","url":null,"abstract":"<p><p>In this work, a biphasic and bipolar current-controlled stimulator with high loading adaptability is proposed. The stimulator consisted of an on-chip high voltage generator, output driver and an 8-bit current DAC (Digital-to-Analog Converter), can constantly provide the required stimulus currents ranging from 0.1mA to a maximum of 20mA, as the loading impedance varied within 0.5kΩ - 5kΩ. With a nearly 12 V output voltage, the overstress and reliability issues of the circuits are thoroughly considered and carefully addressed in this work. To achieve high loading impedance adaptability, this paper proposes a novel PAM (Pulse Amplitude Modulation) loop control architecture to drive the charge pump (CP), which provides a significantly higher output dynamic range compared to conventional methods such as PFM (Pulse Frequency Modulation) and PSM (Pulse Skip Modulation). In addition, to further improve the Power Conversion Efficiency (PCE) of the high voltage generator, a new technique, PAM-based Dual-Domain Voltage Scaling (PAM-DDVS), is proposed to minimize unnecessary energy consumption while achieving high adaptive range. The fully-integrated stimulus chip with 2 output channels is fabricated in TSMC 0.18μm 1.8V/3.3V process, and occupies a core die area of approximately 1.6 mm<sup>2</sup>. Imitation tests are conducted to validate the functionality of the stimulus chip.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145566877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-13DOI: 10.1109/TBCAS.2025.3625650
Tun-Yu Chang;Jeng-Bang Wang;Yu-Hsuan Tsai;Yu Tsao;Chia-Hsiang Yang
Brain-machine interface (BMI) technology enables the human brain to communicate directly with machines. This work presents a neural signal processor for real-time BMI, supporting translation from user’s speech attempt to sentences. By employing speech attempt detection, the energy consumption is reduced by 46% and the number of channels for speech attempt detection can be decreased from 128 to 16. The proposed weight encoding, which leverages both sparse encoding and mixed-precision arithmetic, reduces the off-chip memory size of the neural network by 80%. Computation reordering decreases the processing latency by 55%. For the partial sum caching technique, the number of neural network operations is reduced by 25%. The processing element (PE) array in the neural network engine exploits both input and weight sparsity to lower the processing latency by 95%. By using the proposed mixed-precision multiplier in the PE array, the area is reduced by 27% compared with the PE array with the full precision. In the beam search engine, the proposed approximate top-k selection architecture exhibits 16$boldsymbol{times}$ fewer comparators. The neural signal processor achieves speech decoding with a phone error rate of 16.6% and a word error rate of 23.5%. Fabricated in 40-nm CMOS, the chip achieves the maximum communication rate of 200 words/min, which is 16.7-to-42.6$boldsymbol{times}$ faster than the state-of-the-art designs. This work is able to decode up to 125,000 words, which is not achievable by prior works that can only decode up to 31 characters.
{"title":"A 40-nm 3.9mW, 200words/Min Neural Signal Processor in Speech Decoding for Brain-Machine Interface","authors":"Tun-Yu Chang;Jeng-Bang Wang;Yu-Hsuan Tsai;Yu Tsao;Chia-Hsiang Yang","doi":"10.1109/TBCAS.2025.3625650","DOIUrl":"10.1109/TBCAS.2025.3625650","url":null,"abstract":"Brain-machine interface (BMI) technology enables the human brain to communicate directly with machines. This work presents a neural signal processor for real-time BMI, supporting translation from user’s speech attempt to sentences. By employing speech attempt detection, the energy consumption is reduced by 46% and the number of channels for speech attempt detection can be decreased from 128 to 16. The proposed weight encoding, which leverages both sparse encoding and mixed-precision arithmetic, reduces the off-chip memory size of the neural network by 80%. Computation reordering decreases the processing latency by 55%. For the partial sum caching technique, the number of neural network operations is reduced by 25%. The processing element (PE) array in the neural network engine exploits both input and weight sparsity to lower the processing latency by 95%. By using the proposed mixed-precision multiplier in the PE array, the area is reduced by 27% compared with the PE array with the full precision. In the beam search engine, the proposed approximate top-k selection architecture exhibits 16<inline-formula><tex-math>$boldsymbol{times}$</tex-math></inline-formula> fewer comparators. The neural signal processor achieves speech decoding with a phone error rate of 16.6% and a word error rate of 23.5%. Fabricated in 40-nm CMOS, the chip achieves the maximum communication rate of 200 words/min, which is 16.7-to-42.6<inline-formula><tex-math>$boldsymbol{times}$</tex-math></inline-formula> faster than the state-of-the-art designs. This work is able to decode up to 125,000 words, which is not achievable by prior works that can only decode up to 31 characters.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 6","pages":"1065-1077"},"PeriodicalIF":4.9,"publicationDate":"2025-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145515417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-03DOI: 10.1109/TBCAS.2025.3627980
Qi Zhou, Shuhao Fan, Yingying Liu, Rui P Martins, Pui-In Mak, Yanwei Jia, Ka-Meng Lei
Three-dimensional (3D) cell culture is gaining attention for its ability to better mimic tissue environments in vitro, enhancing drug screening efficiency. Tracking biological dynamics in such a setup requires advanced monitoring technologies. This paper presents a miniature magnetic resonance imaging (MRI) platform tailored for imaging 3D cell-culture morphology within a microliter-volume microwell, enabling real-time and on-site visualization of biological dynamics. The system utilizes an MRI application-specific integrated circuit for excitation and detection of the nuclear magnetic resonance (NMR) signal. To cope with the small-volume sensing, the platform features a customized frontend probe, which includes a miniaturized saddle coil and a PDMS-molded sample well for in-situ microliter sample containment and detection. Our proof-of-concept measurements on samples demonstrate an MRI image resolution of 90×128×88 $rm mu m$³, along with continuous, multi-perspective (transverse and longitudinal) imaging of 3D cultures, including spheroid slice visualization. These results highlight the system's applicability and potential for future biological analysis and drug screening, offering researchers a valuable tool for advancing in vitro studies.
三维(3D)细胞培养因其能够更好地模拟体外组织环境,提高药物筛选效率而受到关注。在这样的设置中跟踪生物动力学需要先进的监测技术。本文提出了一种微型磁共振成像(MRI)平台,专门用于在微孔内成像3D细胞培养形态,实现生物动力学的实时和现场可视化。该系统利用MRI应用专用集成电路对核磁共振(NMR)信号进行激励和检测。为了应对小体积传感,该平台配备了定制的前端探头,其中包括一个小型化的鞍形线圈和一个pdms模压样品孔,用于现场微升样品的密封和检测。我们对样品的概念验证测量表明,MRI图像分辨率为90×128×88 $rm mu m$³,以及3D培养的连续、多角度(横向和纵向)成像,包括球体切片可视化。这些结果突出了该系统在未来生物分析和药物筛选方面的适用性和潜力,为研究人员推进体外研究提供了有价值的工具。
{"title":"A Chip-based Miniature MRI Platform with Integrated Frontend Probe for In-Situ 3D Cell Culture Monitoring.","authors":"Qi Zhou, Shuhao Fan, Yingying Liu, Rui P Martins, Pui-In Mak, Yanwei Jia, Ka-Meng Lei","doi":"10.1109/TBCAS.2025.3627980","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3627980","url":null,"abstract":"<p><p>Three-dimensional (3D) cell culture is gaining attention for its ability to better mimic tissue environments in vitro, enhancing drug screening efficiency. Tracking biological dynamics in such a setup requires advanced monitoring technologies. This paper presents a miniature magnetic resonance imaging (MRI) platform tailored for imaging 3D cell-culture morphology within a microliter-volume microwell, enabling real-time and on-site visualization of biological dynamics. The system utilizes an MRI application-specific integrated circuit for excitation and detection of the nuclear magnetic resonance (NMR) signal. To cope with the small-volume sensing, the platform features a customized frontend probe, which includes a miniaturized saddle coil and a PDMS-molded sample well for in-situ microliter sample containment and detection. Our proof-of-concept measurements on samples demonstrate an MRI image resolution of 90×128×88 $rm mu m$<sup>³</sup>, along with continuous, multi-perspective (transverse and longitudinal) imaging of 3D cultures, including spheroid slice visualization. These results highlight the system's applicability and potential for future biological analysis and drug screening, offering researchers a valuable tool for advancing in vitro studies.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145440387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}